查看“MYZR-IMX6-CB200 硬件介绍”的源代码

= '''MY-IMX6-CB200视图''' =
----
== '''正面(front view)''' ==
[[文件:myimx6_cb200_1.0.0.1.png]]
== '''尺寸(size)''' ==
[[文件:myimx6_cb200_3.5.0.1.png]]

= '''MY-IMX6-CB200参数(MY-IMX6-CB200 parameter)''' =
----
== '''硬件配置(hardware configuration)''' ==
{| class="wikitable"
!核心板主型号<br>(core board main model) ||CPU ||内存容量<br>(memory capacity) ||存储容量<br>(storage capacity) ||启动方式<br>(boot mode) ||烧录方式<br>(burning mode) || 其它<br>(other)
|-
|rowspan=4 |MY-IMX6-CB200
|i.MX 6QP ||1G / 2G ||eMMC: 4G ~ 64G ||SPI Flash ||二位拨码<br>(two bit dialing) ||标配：内存1G，存储4G<br>(standard configuration：memory 1G，storage 4G)
|-
|i.MX 6Q ||1G / 2G ||eMMC: 4G ~ 64G ||SPI Flash ||二位拨码<br>(two bit dialing) ||标配：内存1G，存储4G<br>(standard configuration：memory 1G，storage 4G)
|-
|i.MX 6U ||1G ||eMMC: 4G ~ 64G ||SPI Flash ||二位拨码<br>(two bit dialing) ||标配：内存1G，存储4G<br>(standard configuration：memory 1G，storage 4G)
|-
|i.MX 6S ||512M / 1G ||eMMC: 4G ~ 64G ||SPI Flash ||二位拨码<br>(two bit dialing) ||标配：内存512M，存储4G<br>(standard configuration：memory 512M，storage 4G)
|-
|colspan=7 |
|-
|rowspan=3 |MY-IMX6-CB314
|i.MX 6QP ||1G / 2G ||eMMC: 4G ~ 64G ||SPI Flash ||二位拨码<br>(two bit dialing) ||标配：内存1G，存储4G<br>(standard configuration：memory 1G，storage 4G)
|-
|i.MX 6Q ||1G / 2G ||eMMC: 4G ~ 64G ||SPI Flash ||二位拨码<br>(two bit dialing) ||标配：内存1G，存储4G<br>(standard configuration：memory 1G，storage 4G)
|-
|i.MX 6U ||1G ||eMMC: 4G ~ 64G ||SPI Flash ||二位拨码<br>(two bit dialing) ||标配：内存1G，存储4G<br>(standard configuration：memory 1G，storage 4G)
|-
|colspan=7 |
|-
|rowspan=2 |MY-IMX6-CB336
|i.MX 6QP ||1G / 2G ||eMMC: 4G ~ 64G ||SPI Flash ||二位拨码<br>(two bit dialing) ||标配：内存1G，存储4G<br>(standard configuration：memory 1G，storage 4G)
|-
|i.MX 6Q ||1G / 2G ||eMMC: 4G ~ 64G ||SPI Flash ||二位拨码<br>(two bit dialing) ||标配：内存1G，存储4G<br>(standard configuration：memory 1G，storage 4G)
|-
|colspan=7 |
|-
|colspan=7 | 说明：以上系列核心板均可供应 '''汽车级/工业控制级/消费电子级''' 规格。标配为 '''消费电子级'''。<br>(instruction：the series of core boards mentioned above can be offered in grades of  '''automotive/industrial control/consumer electronic''' 。standard configuration is '''consumer electronic'''。)
|}

== '''温度范围(temperature range)''' ==
=== 工作环境温度(working temperature) ===
* 扩展消费级：<br>
<span style="background:#CCCCCC">expansion consumer：</span><br>
		-20°C ~ 85°C<br>
* 工业级：<br>
<span style="background:#CCCCCC">industrial：</span><br>
		-40°C ~ 85°C<br>
* 汽车级：<br>
<span style="background:#CCCCCC">automotive：</span><br>
		-40°C ~ 100°C<br>

=== 存储温度(storage temperature) ===
-60°C ~ 125°C<br>

== '''型号命令规则(model command rule)''' ==

[[文件:myimx6_name.png|640px]]

=== '''型号举例(model example)''' ===
* MY-IMX6-CB200-6Q5E-1024M-4G<br>
	　　CPU：MCIMX6Q5E<br>
	　　内存大小：1024MB<br>
　　　　<span style="background:#CCCCCC">memory size：1024MB</span><br>
	　　eMMC大小：4G<br>
　　　　<span style="background:#CCCCCC">eMMC size：4G</span><br>
* MY-IMX6-CB200-6S5D-512M-4G<br>
	　　CPU：MCIMX6S5D<br>
	　　内存大小：512MB<br>
　　　　<span style="background:#CCCCCC">memory size：512MB</span><br>
	　　eMMC大小：4G<br>
　　　　<span style="background:#CCCCCC">eMMC size：4G</span><br>

== '''操作系统支持(operating system support)''' ==
{| class="wikitable"
!colspan=2 |操作系统及版本<br>(operating system & version)||MY-IMX6-EK200 ||MY-IMX6-EK314 ||MY-IMX6-EK336 ||MY-IMX6-EK140
|-
|rowspan=2 |Linux
|Linux-3.0.35	||YES	||YES	||-		||-
|-
|Linux-3.14.52	||YES	||YES	||YES	||YES
|-
|rowspan=2 |Android
|Android 4.2.2	||YES	||-		||-		||-
|-
|Android 4.4.2	||YES	||YES	||-		||-
|-
|rowspan=2 |QT
|QT-4.8.5		||YES	||YES	||-		||YES
|-
|QT-5.5.0		||YES	||YES	||YES	||-
|-
|rowspan=2 |Ubuntu
|Ubuntu 11.10	||YES	||YES	||-		||-
|-
|Ubuntu 12.04	||YES	||YES	||-		||-
|}

== '''硬件接口(hardware interface)''' ==
{| class="wikitable"
|-
|rowspan=3|显示模块<br>(display module)
|HDMI	
|1路<br>(1 way)	
|1.4 port
|-
	
|LVDS	
|2路<br>(2 way)
|8bit模式up to 165 Mpixels/s<br>(8bit model up to 165 Mpixels/s)
|-
	
|RGB	
|1路<br>(1 way)	
|24bit模式<br>(24bit model)
|-
|rowspan=2|摄像头<br>(rowspan=2|camera)
|CSI	
|1路<br>(1 way)	
|8bit模式<br>(8bit model)
|-
	
|Mipi	
|1路<br>(1 way)	
|2 Lanes
|-
|rowspan=2|以太网摄像头<br>(ethernet camera)
|RMII	
|1路<br>(1 way)	
|100M
|-
	
|USB转以太网摄像头<br>(USB to ethernet camera)	
|1路<br>(1 way)	
|100M
|-
|音频<br>(audio)
|I2S/SSI/AC97	
|1路<br>(1 way)	
|up to 1.4 Mbps
|-
|PCI Express	
|PCI Express	
|1路<br>(1 way)	
|Gen 2.0
|-
|rowspan=2|存储<br>(storage)
|SD/MMC卡<br>(SD/MMC card)	
|2路<br>(2 way)	
|4/8bit
|-
	
|SATA	
|1路<br>(1 way)	
|SATA II, 3.0 Gbps
|-
|rowspan=2|USB	
|USBOTG	
|1路<br>(1 way)	
|480M高速<br>(480M high speed)
|-
	
|USBHOST	
|1路<br>(1 way)	
|480M高速<br>(480M high speed)
|-
|CSPI	
|CSPI	
|2路<br>(2 way)	
|高速<br>(high speed)
|-
|UART	
|UART	
|5	
|up to 4.0 Mbps
|-
|CAN	
|CAN	
|2路<br>(2 way)	
|1 Mbps each
|-
|PWM	
|PWM	
|1路<br>(1 way)	
|可选配置出4路<br>(cofiguration of 4 way is optional)
|-
|I2C	
|I2C	
|3路<br>(3 way)	
|supporting 400 kbps
|-
|IO扩展<br>(IO expansion)
|多路<br>(multiple way)
|21路<br>(21 way)	
|其它管脚可配置为IO<br>(other pins can be configured as IO)
|-
|Watchdog	
|看门狗<br>(watch dog)	
|1路<br>(1 way)	
|CPU内部的看门狗<br>(watchdog inside CPU)
|}

== '''供电电源(power supply)''' ==
5V输入<br>
== '''默认显示选择(defaulted display selection)''' ==
=== LVDS0 ===
LVDS0	7寸 TFT液晶显示（24bit LVDS接口）<br>
<span style="background:#CCCCCC">LVDS0	7寸 TFT crystal liquid display（24bit LVDS port）</span><br>
分辨率1024X600@60Hz<br>
<span style="background:#CCCCCC">resolution 1024X600@60Hz</span><br>
白色背光<br>
<span style="background:#CCCCCC">white backlight</span><br>
电容触摸<br>
<span style="background:#CCCCCC">capacitor touch</span><br>


=== LVDS1 ===
LVDS1	7寸 TFT液晶显示（24bit LVDS接口）<br>
<span style="background:#CCCCCC">LVDS1	7-inch TFT crystal liquid display（24bit LVDS port）</span><br>
分辨率1024X600@60Hz<br>
<span style="background:#CCCCCC">resolution 1024X600@60Hz</span><br>
白色背光<br>
<span style="background:#CCCCCC">white backlight</span><br>
电容触摸<br>
<span style="background:#CCCCCC">capacitor touch</span><br>


=== RGB ===
7寸 TFT液晶显示（24bit RGB接口）<br>
<span style="background:#CCCCCC">7-inch TFT crystal liquid display（24bit RGB port）</span><br>
分辨率800X480@60Hz<br>
<span style="background:#CCCCCC">resolution 800X480@60Hz</span><br>
白色背光<br>
<span style="background:#CCCCCC">white backlight</span><br>
电容触摸<br>
<span style="background:#CCCCCC">capacitor touch</span><br>


=== HDMI ===
HDMI输出 （24bit HDMI接口）<br>
<span style="background:#CCCCCC">HDMI-output （24bit HDMI port）</span><br>
1920X1080@60Hz 兼容16/18/24bpp<br>
<span style="background:#CCCCCC">compatible</span><br>

== '''管脚定义(definition of pin)''' ==
{| class="wikitable"
|1 ||rowspan=5|GND ||rowspan=5 colspan=2|POWER ||rowspan=5|5V_IN ||2
|-
|3 ||4
|-
|5  ||6
|-
|7 ||8
|-
|9 ||10
|-
|11 ||NANDF_CS0 ||rowspan=7|GPIO ||rowspan=4|POWER ||rowspan=4|3V_OUT ||12
|-
|13 ||NANDF_CS1   ||14
|-
|15 ||NANDF_CS2   ||16
|-
|17 ||SD1_DAT0   ||18
|-
|19 ||SD3_RST  ||rowspan=3|GPIO ||GPIO_4 ||20
|-
|21 ||KEY_COL2   ||EIM_BCLK ||22
|-
|23 ||EIM_D20   ||CSI0_DATA_EN ||24
|-
|25 ||CSPI2_CS0 ||rowspan=6|CSPI2 ||rowspan=4|UART2 ||UART2_CTS ||26
|-
|27 ||CSPI2_RDY ||UART2_RTS ||28
|-
|29 ||CSPI2_MOSI ||UART2_TXD ||30
|-
|31 ||CSPI2_CLK  ||UART2_RXD ||32
|-
|33 ||CSPI2_CS1  ||rowspan=4|UART3 ||UART3_CTS ||34
|-
|35 ||CSPI2_MISO  ||UART3_RTS ||36
|-
|37 ||MX6_ONOFF ||ON/OFF ||UART3_TXD ||38
|-
|39 ||nRESET ||nRESET IN  ||UART3_RXD ||40
|-
|41 ||CSPI1_CS0 ||rowspan=5|CSPI1 ||rowspan=6|SD2 ||SD2_DATA2 ||42
|-
|43 ||CSPI1_MISO  ||SD2_DATA0 ||44
|-
|45 ||CSPI1_MOSI  ||SD2_CLK ||46
|-
|47 ||CSPI1_CLK  ||SD2_DATA3 ||48
|-
|49 ||CSPI1_RDY  ||SD2_CMD ||50
|-
|51 ||GND ||POWER  ||SD2_DATA1 ||52
|-
|53 ||SD3_DATA3 ||rowspan=6|SD3 ||rowspan=4|SATA ||SATA_RXP ||54
|-
|55 ||SD3_DATA2 ||SATA_RXN ||56
|-
|57 ||SD3_CMD ||SATA_TXN ||58
|-
|59 ||SD3_CLK  ||SATA_TXP ||60
|-
|61 ||SD3_DATA1  ||rowspan=6|USBOTG ||USB_OTG_OC ||62
|-
|63 ||SD3_DATA0  ||USB_OTG_PWR_EN ||64
|-
|65 ||GND ||POWER  ||USB_OTG_DN ||66
|-
|67 ||USB_H1_PWR_EN  ||rowspan=5|USBHOST  ||USB_OTG_DP ||68
|-
|69 ||USB_HOST_DN  ||USB_OTG_VBUS ||70
|-
|71 ||USB_HOST_DP  ||USB_OTG_ID ||72
|-
|73 ||USB_H1_OC  ||rowspan=6|MINI_PCIE ||PCIE_RXP ||74
|-
|75 ||USB_H1_VBUS  ||PCIE_RXM ||76
|-
|77 ||CSI_D1M ||rowspan=6|MIPI_CSI  ||PCIE_TXP ||78
|-
|79 ||CSI_D1P  ||PCIE_TXM ||80
|-
|81 ||CSI_D0M  ||CLK1_P ||82
|-
|83 ||CSI_D0P  ||CLK1_N ||84
|-
|85 ||CSI_CLK0M  ||rowspan=10|HDMI ||HDMI_D2P ||86
|-
|87 ||CSI_CLK0P  ||HDMI_D2M ||88
|-
|89 ||UART1_RX ||rowspan=2|UART1  ||HDMI_CEC_IN ||90
|-
|91 ||UART1_TX  ||HDMI_HPD ||92
|-
|93 ||GND ||POWER  ||HDMI_D1P ||94
|-
|95 ||CSI0_DAT17 ||rowspan=11|CIS  ||HDMI_D1M ||96
|-
|97 ||CSI0_DAT16  ||HDMI_CLKP ||98
|-
|99 ||CSI0_DAT14  ||HDMI_CLKM ||100
|-
|101 ||CSI0_DAT19  ||HDMI_D0P ||102
|-
|103 ||CSI0_DAT18  ||HDMI_D0M ||104
|-
|105 ||CSI0_DAT13  ||rowspan=2|I2C1 ||I2C1_SCL ||106
|-
|107 ||CSI0_DAT12   ||I2C1_SDA ||108
|-
|109 ||CSI0_VSYNCH  ||rowspan=4|AUDIO ||AUD3_TXC ||110
|-
|111 ||CSI0_PIXCLK  ||AUD3_TXD ||112
|-
|113 ||CSI0_HSYNCH  ||AUD3_RXD ||114
|-
|115 ||CSI0_DAT15  ||AUD3_TXFS ||116
|-
|117 ||CAN1_TX ||rowspan=2|CAN1 ||rowspan=2|I2C3 ||I2C3_SCL ||118
|-
|119 ||CAN1_RX   ||I2C3_SDA ||120
|-
|121 ||UART4_TXD ||rowspan=2|UART4 ||rowspan=2|CAN2 ||CAN2_TX ||122
|-
|123 ||UART4_RXD   ||CAN2_RX ||124
|-
|125 ||UART5_RXD ||rowspan=2|UART5 ||CLKOUT ||GPIO_0_CLKO ||126
|-
|127 ||UART5_TXD ||POWER ||GND ||128
|-
|129 ||LVDS0_TX2_P ||rowspan=10|LVDS0 ||rowspan=10|LVDS1 ||LVDS1_TX1_N ||130
|-
|131 ||LVDS0_TX2_N  ||LVDS1_TX1_P ||132
|-
|133 ||LVDS0_TX0_N  ||LVDS1_TX0_P ||134
|-
|135 ||LVDS0_TX0_P  ||LVDS1_TX0_N ||136
|-
|137 ||LVDS0_TX3_N  ||LVDS1_TX3_N ||138
|-
|139 ||LVDS0_TX3_P  ||LVDS1_TX3_P ||140
|-
|141 ||LVDS0_CLK_N  ||LVDS1_TX2_P ||142
|-
|143 ||LVDS0_CLK_P  ||LVDS1_TX2_N ||144
|-
|145 ||LVDS0_TX1_N  ||LVDS1_CLK_N ||146
|-
|147 ||LVDS0_TX1_P  ||LVDS1_CLK_P ||148
|-
|149 ||GND ||POWER ||GPIO ||NANDF_ALE ||150
|-
|151 ||SD1_DAT1 ||rowspan=3 colspan=2|GPIO ||NANDF_CLE ||152
|-
|153 ||SD1_DAT2 ||NANDF_WP_B ||154
|-
|155 ||NANDF_CS3  ||SD1_CLK ||156
|-
|157 ||DISP0_DAT16 ||rowspan=22|LCD ||rowspan=2|I2C2 ||I2C2_SCL ||158
|-
|159 ||DISP0_DAT23   ||I2C2_SDA ||160
|-
|161 ||DISP0_DAT11  ||rowspan=7|LCD ||DISP0_DAT19 ||162
|-
|163 ||DISP0_DAT15  ||DISP0_DAT20 ||164
|-
|165 ||DISP0_DAT13  ||DISP0_DAT6 ||166
|-
|167 ||DISP0_DAT8  ||DISP0_DAT21 ||168
|-
|169 ||DISP0_DAT3  ||DISP0_DAT2 ||170
|-
|171 ||DISP0_DAT1 ||DISP0_DAT10 ||172
|-
|173 ||DISP0_DRDY   ||DISP0_DAT4 ||174
|-
|175 ||DISP0_VSYNCH  ||POWER ||GND ||176
|-
|177 ||DISP0_CONTRAST  ||rowspan=12|FEC ||ENET_REF_CLK ||178
|-
|179 ||DISP0_CLK  ||ENET_nINT ||180
|-
|181 ||DISP0_DAT18  ||ENET_RXD1 ||182
|-
|183 ||DISP0_DAT22  ||ENET_RX_ER ||184
|-
|185 ||DISP0_DAT14  ||ENET_nRST ||186
|-
|187 ||DISP0_DAT17  ||ENET_MDIO ||188
|-
|189 ||DISP0_DAT9 ||ENET_CRS_DV ||190
|-
|191 ||DISP0_DAT12  ||ENET_TX_EN ||192
|-
|193 ||DISP0_DAT5  ||ENET_TXD1 ||194
|-
|195 ||DISP0_DAT7  ||ENET_RXD0 ||196
|-
|197 ||DISP0_DAT0  ||ENET_MDC ||198
|-
|199 ||DISP0_HSYNCH ||ENET_TXD0 ||200
|}

== '''管脚详细功能说明(instruction of detailed function of pins)''' ==
=== 表1(form 1) ===
{| class="wikitable"
!Pin 
!CPU Ball Name 
!Pin Name 
!功能选择<br>(function selection)
!所属模块<br>(module affiliated) 
!功能描述 <br>(function description)
!电压<br>(voltage)
|-
|1 ||rowspan=5|NC ||rowspan=5|GND ||rowspan=5| ||rowspan=5|电源<br>(power supply) ||rowspan=5|数字地<br>(digitally) ||rowspan=5|0V
|-
|3 
|-
|5 
|-
|7 
|-
|9 
|-
|rowspan=5|11 ||rowspan=5|F15 ||rowspan=5|NANDF_CS0 ||0 ||rawnand ||CE0N ||rowspan=5|3.3V
|-
|3 ||usboh3 ||UH3_DFD_OUT[15] 
|-
|4 ||usboh3 ||UH2_DFD_OUT[15] 
|-
|5 ||gpio6 ||GPIO[11] 
|-
|7 ||pl301_mx6q_per1 ||HSIZE[2] 
|-
|rowspan=6|13 ||rowspan=6|C16 ||rowspan=6|NANDF_CS1 ||0 ||rawnand ||CE1N ||rowspan=6|3.3V
|-
| 1 ||usdhc4 ||VSELECT 
|-
| 2 ||usdhc3 ||VSELECT 
|-
| 4 ||pcie_ctrl ||DIAG_STATUS_BUS_MUX[3] 
|-
| 5 ||gpio6 ||GPIO[14] 
|-
| 7 ||pl301_mx6q_per1 ||HREADYOUT 
|-
|rowspan=7|15 ||rowspan=7|A17 ||rowspan=7|NANDF_CS2 ||0 ||rawnand ||CE2N ||rowspan=7|3.3V
|-
| 1 ||ipu1 ||SISG[0] 
|-
| 2 ||esai1 ||TX0 
|-
| 3 ||weim ||WEIM_CRE 
|-
| 4 ||ccm ||CLKO2 
|-
| 5 ||gpio6 ||GPIO[15] 
|-
| 6 ||ipu2 ||SISG[0] 
|-
|rowspan=7|17 ||rowspan=7|A21 ||rowspan=7|SD1_DAT0 ||0 ||usdhc1 ||DAT0 ||rowspan=7|3.3V
|-
| 1 ||ecspi5 ||MISO 
|-
| 2 ||caam_wrapper ||RNG_OSC_OBS 
|-
| 3 ||gpt ||CAPIN1 
|-
| 4 ||pcie_ctrl ||DIAG_STATUS_BUS_MUX[8] 
|-
| 5 ||gpio1 ||GPIO[16] 
|-
| 6 ||hdmi_tx ||OPHYDTB[1] 
|-
|rowspan=7|19 ||rowspan=7|D15 ||rowspan=7|SD3_RST ||0 ||usdhc3 ||RST ||rowspan=13|3.3V
|-
| 1 ||uart3 ||RTS 
|-
| 2 ||pcie_ctrl ||DIAG_STATUS_BUS_MUX[30] 
|-
| 3 ||usboh3 ||UH3_DFD_OUT[10] 
|-
| 4 ||usboh3 ||UH2_DFD_OUT[10] 
|-
| 5 ||gpio7 ||GPIO[8] 
|-
| 6 ||mipi_core ||DPHY_TEST_IN[22] 
|-
|rowspan=6|21 ||rowspan=6|W6 ||rowspan=6|KEY_COL2 ||2 ||can1 ||TXCAN 
|-
| 3 ||kpp ||COL[2] 
|-
| 4 ||enet ||MDC 
|-
| 5 ||gpio4 ||GPIO[10] 
|-
| 6 ||usboh3 ||H1USB_PWRCTL_WAKEUP 
|-
| 7 ||pl301_mx6q_per1 ||HADDR[3] 
|-
|rowspan=7|23 ||rowspan=7|G20 ||rowspan=7|EIM_D20 ||0 ||weim ||WEIM_D[20] ||rowspan=7|3.3V
|-
| 1 ||ecspi4 ||SS0 
|-
| 2 ||ipu1 ||DI0_PIN16 
|-
|3 ||ipu2 ||CSI1_D[15] 
|-
| 4 ||uart1 ||RTS 
|-
| 5 ||gpio3 ||GPIO[20] 
|-
| 6 ||epit2 ||EPITO 
|-
|rowspan=7|25 ||rowspan=7|K20 ||rowspan=7|CSPI2_CS0 ||0 ||weim ||WEIM_RW ||rowspan=7|3.3V
|-
| 1 ||ipu1 ||DI1_PIN8 
|-
| 2 ||ecspi2 ||SS0 
|-
| 4 ||mipi_core ||DPHY_TEST_OUT[27] 
|-
| 5 ||gpio2 ||GPIO[26] 
|-
| 6 ||tpsmp ||HDATA[10] 
|-
| 7 ||src ||BT_CFG[29] 
|-
|rowspan=8|27 ||rowspan=8|H19 ||rowspan=8|CSPI2_RDY ||0 ||weim ||WEIM_A[25] ||rowspan=8|3.3V
|-
| 1 ||ecspi4 ||SS1 
|-
| 2 ||ecspi2 ||RDY 
|-
| 3 ||ipu1 ||DI1_PIN12 
|-
| 4 ||ipu1 ||DI0_D1_CS 
|-
| 5 ||gpio5 ||GPIO[2] 
|-
| 6 ||hdmi_tx ||CEC_LINE 
|-
| 7 ||pl301_mx6q_per1 ||HBURST[0] 
|-
|rowspan=6|29 ||rowspan=6|J23 ||rowspan=6|CSPI2_MOSI ||0 ||weim ||WEIM_CS[1] ||rowspan=6|3.3V
|-
| 1 ||ipu1 ||DI1_PIN6 
|-
| 2 ||ecspi2 ||MOSI 
|-
| 4 ||mipi_core ||DPHY_TEST_OUT[25] 
|-
| 5 ||gpio2 ||GPIO[24] 
|-
| 6 ||tpsmp ||HDATA[8] 
|-
|rowspan=6|31 ||rowspan=6|H24 ||rowspan=6|CSPI2_CLK ||0 ||weim ||WEIM_CS[0] ||rowspan=6|3.3V
|-
| 1 ||ipu1 ||DI1_PIN5 
|-
| 2 ||ecspi2 ||SCLK 
|-
| 4 ||mipi_core ||DPHY_TEST_OUT[24] 
|-
| 5 ||gpio2 ||GPIO[23] 
|-
| 6 ||tpsmp ||HDATA[7] 
|-
|rowspan=6|33 ||rowspan=6|K22 ||rowspan=6|CSPI2_CS1 ||0 ||weim ||WEIM_LBA ||rowspan=6|3.3V
|-
| 1 ||ipu1 ||DI1_PIN17 
|-
| 2 ||ecspi2 ||SS1 
|-
| 5 ||gpio2 ||GPIO[27] 
|-
| 6 ||tpsmp ||HDATA[11] 
|-
| 7 ||src ||BT_CFG[26] 
|-
|rowspan=6|35 ||rowspan=6|J24 ||rowspan=6|CSPI2_MISO ||0 ||weim ||WEIM_OE ||rowspan=6|3.3V
|-
| 1 ||ipu1 ||DI1_PIN7 
|-
| 2 ||ecspi2 ||MISO 
|-
| 4 ||mipi_core ||DPHY_TEST_OUT[26] 
|-
| 5 ||gpio2 ||GPIO[25] 
|-
| 6 ||tpsmp ||HDATA[9] 
|-
|37 ||D12 ||MX6_ONOFF || ||MX6_ONOFF ||ON/OFF ||3.3V
|-
|39 ||NC ||nRESET || ||nRESET ||nRESET ||3.3V
|-
|rowspan=8|41 ||rowspan=8|E22 ||rowspan=8|CSPI1_CS0 ||0 ||weim ||WEIM_EB[2] ||rowspan=8|3.3V
|-
| 1 ||ecspi1 ||SS0 
|-
| 2 ||ccm ||DI1_EXT_CLK 
|-
| 3 ||ipu2 ||CSI1_D[19] 
|-
| 4 ||hdmi_tx ||DDC_SCL 
|-
| 5 ||gpio2 ||GPIO[30] 
|-
| 6 ||i2c2 ||SCL 
|-
| 7 ||src ||BT_CFG[30] 
|-
|rowspan=8|43 ||rowspan=8|F21 ||rowspan=8|CSPI1_MISO ||0 ||weim ||WEIM_D[17] ||rowspan=8|3.3V
|-
| 1 ||ecspi1 ||MISO 
|-
| 2 ||ipu1 ||DI0_PIN6 
|-
| 3 ||ipu2 ||CSI1_PIXCLK 
|-
| 4 ||dcic1 ||DCIC_OUT 
|-
| 5 ||gpio3 ||GPIO[17] 
|-
| 6 ||i2c3 ||SCL 
|-
| 7 ||pl301_mx6q_per1 ||HBURST[1] 
|-
|rowspan=8|45 ||rowspan=8|D24 ||rowspan=8|CSPI1_MOSI ||0 ||weim ||WEIM_D[18] ||rowspan=8|3.3V
|-
| 1 ||ecspi1 ||MOSI 
|-
| 2 ||ipu1 ||DI0_PIN7 
|-
| 3 ||ipu2 ||CSI1_D[17] 
|-
| 4 ||ipu1 ||DI1_D0_CS 
|-
| 5 ||gpio3 ||GPIO[18]
|-
| 6 ||i2c3 ||SDA
|-
| 7 ||pl301_mx6q_per1 ||HBURST[2] 
|-
|rowspan=7|47 ||rowspan=7|C25 ||rowspan=7|CSPI1_CLK ||0 ||weim ||WEIM_D[16] ||rowspan=7|3.3V
|-
| 1 ||ecspi1 ||SCLK 
|-
| 2 ||ipu1 ||DI0_PIN5 
|-
| 3 ||ipu2 ||CSI1_D[18] 
|-
| 4 ||hdmi_tx ||DDC_SDA 
|-
| 5 ||gpio3 ||GPIO[16]
|-
| 6 ||i2c2 ||SDA 
|-
|rowspan=8|49 ||rowspan=8|P5 ||rowspan=8|CSPI1_RDY ||0 ||kpp ||COL[5] ||rowspan=8|3.3V
|-
| 1 ||enet ||1588_EVENT0_OUT 
|-
| 2 ||spdif ||OUT1 
|-
| 3 ||ccm ||CLKO 
|-
| 4 ||ecspi1 ||RDY 
|-
| 5 ||gpio4 ||GPIO[5] 
|-
| 6 ||enet ||TX_ER 
|-
| 7 ||src ||INT_BOOT 
|-
|51 ||NC ||GND || || || ||0V
|-
|rowspan=7|53 ||rowspan=7|B15 ||rowspan=7|SD3_DATA3 ||0 ||usdhc3 ||DAT3 ||rowspan=7|3.3V
|-
|1 ||uart3 ||CTS 
|-
| 2 ||pcie_ctrl ||DIAG_STATUS_BUS_MUX[29] 
|-
|3 ||usboh3 ||UH3_DFD_OUT[9] 
|-
| 4 ||usboh3 ||UH2_DFD_OUT[9] 
|-
| 5 ||gpio7 ||GPIO[7] 
|-
| 6 ||mipi_core ||DPHY_TEST_IN[21] 
|-
|rowspan=6|55 ||rowspan=6|A15 ||rowspan=6|SD3_DATA2 ||0 ||usdhc3 ||DAT2 ||rowspan=6|3.3V
|-
| 2 ||pcie_ctrl ||DIAG_STATUS_BUS_MUX[28] 
|-
| 3 ||usboh3 ||UH3_DFD_OUT[8] 
|-
| 4 ||usboh3 ||UH2_DFD_OUT[8] 
|-
| 5 ||gpio7 ||GPIO[6]
|-
| 6 ||mipi_core ||DPHY_TEST_IN[20] 
|-
|rowspan=7|57 ||rowspan=7|B13 ||rowspan=7|SD3_CMD ||0 ||usdhc3 ||CMD ||rowspan=7|3.3V
|-
| 1 ||uart2 ||CTS 
|-
| 2 ||can1 ||TXCAN 
|-
| 3 ||usboh3 ||UH3_DFD_OUT[4] 
|-
| 4 ||usboh3 ||UH2_DFD_OUT[4] 
|-
| 5 ||gpio7 ||GPIO[2] 
|-
| 6 ||mipi_core ||DPHY_TEST_IN[16] 
|-
|rowspan=7|59 ||rowspan=7|D14 ||rowspan=7|SD3_CLK ||0 ||usdhc3 ||CLK ||rowspan=7|3.3V
|-
| 1 ||uart2 ||RTS 
|-
| 2 ||can1 ||RXCAN 
|-
| 3 ||usboh3 ||UH3_DFD_OUT[5] 
|-
| 4 ||usboh3 ||UH2_DFD_OUT[5] 
|-
| 5 ||gpio7 ||GPIO[3] 
|-
| 6 ||mipi_core ||DPHY_TEST_IN[17] 
|-
|rowspan=7|61 ||rowspan=7|F14 ||rowspan=7|SD3_DATA1 ||0 ||usdhc3 ||DAT1 ||rowspan=7|3.3V
|-
| 1 ||uart1 ||RTS
|-
| 2 ||can2 ||RXCAN 
|-
| 3 ||usboh3 ||UH3_DFD_OUT[7] 
|-
| 4 ||usboh3 ||UH2_DFD_OUT[7] 
|-
| 5 ||gpio7 ||GPIO[5] 
|-
| 6 ||mipi_core ||DPHY_TEST_IN[19] 
|-
|rowspan=7|63 ||rowspan=7|E14 ||rowspan=7|SD3_DATA0 ||0 ||usdhc3 ||DAT0 ||rowspan=7|3.3V
|-
| 1 ||uart1 ||CTS 
|-
| 2 ||can2 ||TXCAN 
|-
| 3 ||usboh3 ||UH3_DFD_OUT[6] 
|-
| 4 ||usboh3 ||UH2_DFD_OUT[6] 
|-
| 5 ||gpio7 ||GPIO[4] 
|-
| 6 ||mipi_core ||DPHY_TEST_IN[18] 
|-
|65 ||NC ||GND || || || ||0V
|-
|rowspan=7|67 ||rowspan=7|C13 ||rowspan=7|USB_H1_PWR_EN ||0 ||usdhc3 ||DAT5 ||rowspan=7|3.3V
|-
| 1 ||uart2 ||TXD_MUX 
|-
| 2 ||pcie_ctrl ||DIAG_STATUS_BUS_MUX[26]
|-
| 3 ||usboh3 ||UH3_DFD_OUT[2] 
|-
| 4 ||usboh3 ||UH2_DFD_OUT[2] 
|-
| 5 ||gpio7 ||GPIO[0] 
|-
| 6 ||mipi_core ||DPHY_TEST_IN[14] 
|-
|69 ||F10 ||USB_HOST_DN || ||USBHOST ||USB_HOST_DN ||2.5V
|-
|71 ||E10 ||USB_HOST_DP || ||USBHOST ||USB_HOST_DP ||2.5V
|-
|rowspan=8|73 ||rowspan=8|J20 ||rowspan=8|USB_H1_OC ||0 ||weim ||WEIM_D[30] ||rowspan=8|3.3V
|-
| 1 ||ipu1 ||DISP1_DAT[21] 
|-
| 2 ||ipu1 ||DI0_PIN11 
|-
| 3 ||ipu1 ||CSI0_D[3] 
|-
| 4 ||uart3 ||CTS 
|-
| 5 ||gpio3 ||GPIO[30] 
|-
| 6 ||usboh3 ||USBH1_OC 
|-
| 7 ||pl301_mx6q_per1 ||HPROT[0] 
|-
|75 ||D10 ||USB_H1_VBUS || || ||USB_H1_VBUS ||5V
|-
|77 ||D1 ||CSI_D1M || ||rowspan=6|CSI_MIPI ||CSI_D1M ||rowspan=6|2.5V
|-
|79 ||D2 ||CSI_D1P ||  ||CSI_D1P 
|-
|81 ||E4 ||CSI_D0M ||  ||CSI_D0M 
|-
|83 ||E3 ||CSI_D0P ||  ||CSI_D0P 
|-
|85 ||F4 ||CSI_CLK0M ||  ||CSI_CLK0M 
|-
|87 ||F3 ||CSI_CLK0P ||  ||CSI_CLK0P 
|-
|rowspan=8|89 ||rowspan=8|M3 ||rowspan=8|UART1_RX ||0 ||ipu1 ||CSI0_D[11] ||rowspan=8|2.5V
|-
| 1 ||audmux ||AUD3_RXFS 
|-
| 2 ||ecspi2 ||SS0 
|-
| 3 ||uart1 ||RXD_MUX 
|-
| 4 ||sdma ||DEBUG_PC[5] 
|-
| 5 ||gpio5 ||GPIO[29] 
|-
| 6 ||mmdc ||MMDC_DEBUG[34] 
|-
| 7 ||ARMCortexA9 MPCorePlatform ||TRACE[8] 
|-
|rowspan=8|91 ||rowspan=8|M1 ||rowspan=8|UART1_TX ||0 ||ipu1 ||CSI0_D[10] ||rowspan=8|2.5V
|-
| 1 ||audmux ||AUD3_RXC 
|-
| 2 ||ecspi2 ||MISO 
|-
| 3 ||uart1 ||TXD_MUX 
|-
| 4 ||sdma ||DEBUG_PC[4] 
|-
| 5 ||gpio5 ||GPIO[28] 
|-
| 6 ||mmdc ||MMDC_DEBUG[33] 
|-
| 7 ||ARMCortexA9 MPCorePlatform ||TRACE[7] 
|-
|93 ||NC ||GND || || || ||0V
|-
|rowspan=8|95 ||rowspan=8|L3 ||rowspan=8|CSI0_DAT17 ||0 ||ipu1 ||CSI0_D[17] ||rowspan=8|2.5V
|-
| 1 ||weim ||WEIM_D[13] 
|-
| 2 ||pcie_ctrl ||DIAG_STATUS_BUS_MUX[21] 
|-
| 3 ||uart4 ||CTS 
|-
| 4 ||sdma ||DEBUG_PC[11] 
|-
| 5 ||gpio6 ||GPIO[3] 
|-
| 6 ||mmdc ||MMDC_DEBUG[40] 
|-
| 7 ||ARMCortexA9 MPCorePlatform ||TRACE[14] 
|-
|rowspan=8|97 ||rowspan=8|L4 ||rowspan=8|CSI0_DAT16 ||0 ||ipu1 ||CSI0_D[16] ||rowspan=8|2.5V
|-
| 1 ||weim ||WEIM_D[12] 
|-
| 2 ||pcie_ctrl ||DIAG_STATUS_BUS_MUX[20] 
|-
| 3 ||uart4 ||RTS 
|-
| 4 ||sdma ||DEBUG_PC[10] 
|-
| 5 ||gpio6 ||GPIO[2] 
|-
| 6 ||mmdc ||MMDC_DEBUG[39] 
|-
| 7 ||ARMCortexA9 MPCorePlatform ||TRACE[13] 
|-
|rowspan=8|99 ||rowspan=8|M4 ||rowspan=8|CSI0_DAT14 ||0 ||ipu1 ||CSI0_D[14] ||rowspan=8|2.5V
|-
| 1 ||weim ||WEIM_D[10] 
|-
| 2 ||pcie_ctrl ||DIAG_STATUS_BUS_MUX[18] 
|-
| 3 ||uart5 ||TXD_MUX 
|-
| 4 ||sdma ||DEBUG_PC[8] 
|-
| 5 ||gpio6 ||GPIO[0] 
|-
| 6 ||mmdc ||MMDC_DEBUG[37] 
|-
| 7 ||ARMCortexA9 MPCorePlatform ||TRACE[11] 
|-
|rowspan=7|101 ||rowspan=7|L6 ||rowspan=7|CSI0_DAT19 ||0 ||ipu1 ||CSI0_D[19] ||rowspan=7|2.5V
|-
| 1 ||weim ||WEIM_D[15] 
|-
| 2 ||pcie_ctrl ||DIAG_STATUS_BUS_MUX[23] 
|-
| 3 ||uart5 ||CTS 
|-
| 4 ||sdma ||DEBUG_PC[13] 
|-
| 5 ||gpio6 ||GPIO[5] 
|-
| 6 ||mmdc ||MMDC_DEBUG[42] 
|-
|rowspan=8|103 ||rowspan=8|M6 ||rowspan=8|CSI0_DAT18 ||0 ||ipu1 ||CSI0_D[18] ||rowspan=8|2.5V
|-
| 1 ||weim ||WEIM_D[14] 
|-
| 2 ||pcie_ctrl ||DIAG_STATUS_BUS_MUX[22] 
|-
| 3 ||uart5 ||RTS 
|-
| 4 ||sdma ||DEBUG_PC[12] 
|-
| 5 ||gpio6 ||GPIO[4] 
|-
| 6 ||mmdc ||MMDC_DEBUG[41] 
|-
| 7 ||ARMCortexA9 MPCorePlatform ||TRACE[15] 
|-
|rowspan=8|105 ||rowspan=8|L1 ||rowspan=8|CSI0_DAT13 ||0 ||ipu1 ||CSI0_D[13] ||rowspan=8|2.5V
|-
| 1 ||weim ||WEIM_D[9] 
|-
| 2 ||pcie_ctrl ||DIAG_STATUS_BUS_MUX[17] 
|-
| 3 ||uart4 ||RXD_MUX 
|-
| 4 ||sdma ||DEBUG_PC[7] 
|-
| 5 ||gpio5 ||GPIO[31] 
|-
| 6 ||mmdc ||MMDC_DEBUG[36] 
|-
| 7 ||ARMCortexA9 MPCorePlatform ||TRACE[10] 
|-
|rowspan=8|107 ||rowspan=8|M2 ||rowspan=8|CSI0_DAT12 ||0 ||ipu1 ||CSI0_D[12] ||rowspan=8|2.5V
|-
| 1 ||weim ||WEIM_D[8] 
|-
| 2 ||pcie_ctrl ||DIAG_STATUS_BUS_MUX[16] 
|-
| 3 ||uart4 ||TXD_MUX 
|-
| 4 ||sdma ||DEBUG_PC[6] 
|-
| 5 ||gpio5 ||GPIO[30] 
|-
| 6 ||mmdc ||MMDC_DEBUG[35] 
|-
| 7 ||ARMCortexA9 MPCorePlatform ||TRACE[9] 
|-
|rowspan=7|109 ||rowspan=7|N2 ||rowspan=7|CSI0_VSYNCH ||0 ||ipu1 ||CSI0_VSYNC ||rowspan=7|2.5V
|-
| 1 ||weim ||WEIM_D[1] 
|-
| 2 ||pcie_ctrl ||DIAG_STATUS_BUS_MUX[15] 
|-
| 4 ||sdma ||DEBUG_PC[3] 
|-
| 5 ||gpio5 ||GPIO[21] 
|-
| 6 ||mmdc ||MMDC_DEBUG[32] 
|-
| 7 ||ARMCortexA9 MPCorePlatform ||TRACE[0] 
|-
|rowspan=6|111 ||rowspan=6|P1 ||rowspan=6|CSI0_PIXCLK ||0 ||ipu1 ||CSI0_PIXCLK ||rowspan=6|2.5V
|-
|2 ||pcie_ctrl ||DIAG_STATUS_BUS_MUX[12] 
|-
|4 ||sdma ||DEBUG_PC[0] 
|-
|5 ||gpio5 ||GPIO[18] 
|-
|6 ||mmdc ||MMDC_DEBUG[29] 
|-
|7 ||ARMCortexA9 MPCorePlatform ||EVENTO 
|-
|rowspan=7|113 ||rowspan=7|P4 ||rowspan=7|CSI0_HSYNCH ||0 ||ipu1 ||CSI0_HSYNC ||rowspan=7|2.5V
|-
| 2 ||pcie_ctrl ||DIAG_STATUS_BUS_MUX[13] 
|-
| 3 ||ccm ||CLKO 
|-
| 4 ||sdma ||DEBUG_PC[1] 
|-
| 5 ||gpio5 ||GPIO[19] 
|-
| 6 ||mmdc ||MMDC_DEBUG[30] 
|-
| 7 ||ARMCortexA9 MPCorePlatform ||TRCTL 
|-
|rowspan=8|115 ||rowspan=8|M5 ||rowspan=8|CSI0_DAT15 ||0 ||ipu1 ||CSI0_D[15] ||rowspan=8|2.5V
|-
| 1 ||weim ||WEIM_D[11] 
|-
| 2 ||pcie_ctrl ||DIAG_STATUS_BUS_MUX[19] 
|-
| 3 ||uart5 ||RXD_MUX 
|-
| 4 ||sdma ||DEBUG_PC[9] 
|-
| 5 ||gpio6 ||GPIO[1] 
|-
| 6 ||mmdc ||MMDC_DEBUG[38] 
|-
| 7 ||ARMCortexA9 MPCorePlatform ||TRACE[12] 
|-
|rowspan=8|117 ||rowspan=8|R3 ||rowspan=8|CAN1_TX ||0 ||esai1 ||TX4_RX1 ||rowspan=8|3.3V
|-
| 1 ||ecspi5 ||RDY 
|-
| 2 ||epit1 ||EPITO 
|-
| 3 ||can1 ||TXCAN 
|-
| 4 ||uart2 ||TXD_MUX 
|-
| 5 ||gpio1 ||GPIO[7] 
|-
| 6 ||spdif ||PLOCK 
|-
| 7 ||usboh3 ||OTGUSB_HOST_MODE 
|-
|rowspan=7|119 ||rowspan=7|R5 ||rowspan=7|CAN1_RX ||0 ||esai1 ||TX5_RX0 ||rowspan=7|3.3V
|-
| 2 ||epit2 ||EPITO 
|-
| 3 ||can1 ||RXCAN 
|-
| 4 ||uart2 ||RXD_MUX 
|-
| 5 ||gpio1 ||RXD_MUX 
|-
| 6 ||spdif ||SRCLK 
|-
| 7 ||usboh3 ||OTGUSB_PWRCTL_WAKEUP |
|-
|rowspan=8|121 ||rowspan=8|W5 ||rowspan=8|UART4_TXD ||0 ||ecspi1 ||SCLK ||rowspan=8|3.3V
|-
| 1 ||enet ||RDATA[3] 
|-
| 2 ||audmux ||AUD5_TXC 
|-
| 3 ||kpp ||COL[0] 
|-
| 4 ||uart4 ||TXD_MUX 
|-
| 5 ||gpio4 ||GPIO[6] 
|-
| 6 ||dcic1 ||DCIC_OUT 
|-
| 7 ||src ||ANY_PU_RST 
|-
|rowspan=8|123 ||rowspan=8|V6 ||rowspan=8|UART4_RXD ||0 ||ecspi1 ||MOSI ||rowspan=8|3.3V
|-
|  1 ||enet ||TDATA[3] 
|-
|  2 ||audmux ||AUD5_TXD 
|-
|  3 ||kpp ||ROW[0] 
|-
|  4 ||uart4 ||RXD_MUX 
|-
|  5 ||gpio4 ||GPIO[7] 
|-
|  6 ||dcic2 ||DCIC_OUT 
|-
|  7 ||pl301_mx6q_per1 ||HADDR[0] 
|-
|rowspan=8|125 ||rowspan=8|U6 ||rowspan=8|UART5_RXD ||0 ||ecspi1 ||SS0 ||rowspan=8|3.3V
|-
|  1 ||enet ||COL 
|-
|  2 ||audmux ||AUD5_RXD 
|-
|  3 ||kpp ||ROW[1] 
|-
|  4 ||uart5 ||RXD_MUX 
|-
|  5 ||gpio4 ||GPIO[9] 
|-
|  6 ||usdhc2 ||VSELECT 
|-
|  7 ||pl301_mx6q_per1 ||HADDR[2] 
|-
|rowspan=8|127 ||rowspan=8|U7 ||rowspan=8|UART5_TXD ||0 ||ecspi1 ||MISO ||rowspan=8|3.3V
|-
|1 ||enet ||MDIO 
|-
|  2 ||audmux ||AUD5_TXFS 
|-
|  3 ||kpp ||COL[1] 
|-
|  4 ||uart5 ||TXD_MUX 
|-
|  5 ||gpio4 ||GPIO[8] 
|-
|  6 ||usdhc1 ||VSELECT 
|-
|  7 ||pl301_mx6q_per1 ||HADDR[1] 
|-
|129 ||V1 ||LVDS0_TX2_P || ||rowspan=10|LVDS0 ||LVDS0_TX2_P ||rowspan=10|2.5V
|-
|131 ||V2 ||LVDS0_TX2_N || ||LVDS0_TX2_N 
|-
|133 ||U2 ||LVDS0_TX0_N  || ||LVDS0_TX0_N 
|-
|135 ||U1 ||LVDS0_TX0_P  || ||LVDS0_TX0_P 
|-
|137 ||W2 ||LVDS0_TX3_N  || ||LVDS0_TX3_N 
|-
|139 ||W1 ||LVDS0_TX3_P  || ||LVDS0_TX3_P 
|-
|141 ||V4 ||LVDS0_CLK_N  || ||LVDS0_CLK_N 
|-
|143 ||V3 ||LVDS0_CLK_P  || ||LVDS0_CLK_P 
|-
|145 ||U4 ||LVDS0_TX1_N  || ||LVDS0_TX1_N 
|-
|147 ||U3 ||LVDS0_TX1_P  || ||LVDS0_TX1_P 
|-
|149 ||NC ||GND   || || || ||0V
|-
|rowspan=7|151 ||rowspan=7|C20 ||rowspan=7|SD1_DAT1 ||0 ||usdhc1 ||DAT1 ||rowspan=7|3.3V
|-
|  1 ||ecspi5 ||SS0 
|-
|  2 ||pwm3 ||PWMO 
|-
|  3 ||gpt ||CAPIN2 
|-
|  4 ||pcie_ctrl ||DIAG_STATUS_BUS_MUX[7] 
|-
|  5 ||gpio1 ||GPIO[17] 
|-
|  6 ||hdmi_tx ||OPHYDTB[0] 
|-
|rowspan=7|153 ||rowspan=7|E19 ||rowspan=7|SD1_DAT2 ||0 ||usdhc1 ||DAT2 ||rowspan=7|3.3V
|-
|  1 ||ecspi5 ||SS1 
|-
|  2 ||gpt ||CMPOUT2 
|-
|  3 ||pwm2 ||PWMO 
|-
|  4 ||wdog1 ||WDOG_B 
|-
|  5 ||gpio1 ||GPIO[19] 
|-
|  6 ||wdog1 ||WDOG_RST_B_DEB 
|-
|rowspan=8|155 ||rowspan=8|D16 ||rowspan=8|NANDF_CS3 ||0 ||rawnand ||CE3N ||rowspan=8|3.3V
|-
|  1 ||ipu1 ||SISG[1] 
|-
|  2 ||esai1 ||TX1 
|-
|  3 ||weim ||WEIM_A[26] 
|-
|  4 ||pcie_ctrl ||DIAG_STATUS_BUS_MUX[4] 
|-
|  5 ||gpio6 ||GPIO[16] 
|-
|  6 ||ipu2 ||SISG[1] 
|-
|  7 ||tpsmp ||CLK 
|-
|rowspan=8|157 ||rowspan=8|T21 ||rowspan=8|DISP0_DAT16 ||0 ||ipu1 ||DISP0_DAT[16] ||rowspan=8|3.3V
|-
|  1 ||ipu2 ||DISP0_DAT[16] 
|-
|  2 ||ecspi2 ||MOSI 
|-
|  3 ||audmux ||AUD5_TXC 
|-
|  4 ||sdma ||SDMA_EXT_EVENT[0] 
|-
|  5 ||gpio5 ||GPIO[10] 
|-
|  6 ||mmdc ||MMDC_DEBUG[21] 
|-
|  7 ||pl301_mx6q_per1 ||HADDR[26] 
|-
|rowspan=8|159 ||rowspan=8|W24 ||rowspan=8|DISP0_DAT23 ||0 ||ipu1 ||DISP0_DAT[23] ||rowspan=8|3.3V
|-
|  1 ||ipu2 ||DISP0_DAT[23] 
|-
|  2 ||ecspi1 ||SS0 
|-
|  3 ||audmux ||AUD4_RXD 
|-
|  4 ||sdma ||DEBUG_BUS_DEVICE[2] 
|-
|  5 ||gpio5 ||GPIO[17] 
|-
|  6 ||mmdc ||MMDC_DEBUG[28]
|-
|  7 ||pl301_mx6q_per1 ||HADDR[31] 
|-
|rowspan=7|161 ||rowspan=7|T23 ||rowspan=7|DISP0_DAT11 ||0 ||ipu1 ||DISP0_DAT[11] ||rowspan=7|3.3V
|-
|  1 ||ipu2 ||DISP0_DAT[11] 
|-
|  3 ||usdhc1 ||USDHC_DEBUG[7] 
|-
|  4 ||sdma ||DEBUG_EVENT_CHANNEL[4] 
|-
|  5 ||gpio5 ||GPIO[5] 
|-
|  6 ||mmdc ||MMDC_DEBUG[16] 
|-
|  7 ||pl301_mx6q_per1 ||HADDR[22] 
|-
|rowspan=8|163 ||rowspan=8|T22 ||rowspan=8|DISP0_DAT15 ||0 ||ipu1 ||DISP0_DAT[15] ||rowspan=8|3.3V
|-
|  1 ||ipu2 ||DISP0_DAT[15] 
|-
|  2 ||ecspi1 ||SS1 
|-
|  3 ||ecspi2 ||SS1 
|-
|  4 ||sdma ||DEBUG_EVT_CHN_LINES[2] 
|-
|  5 ||gpio5 ||GPIO[9] 
|-
|  6 ||mmdc ||MMDC_DEBUG[20] 
|-
|  7 ||pl301_mx6q_per1 ||HADDR[25] 
|-
|rowspan=7|165 ||rowspan=7|R20 ||rowspan=7|DISP0_DAT13 ||0 ||ipu1 ||DISP0_DAT[13] ||rowspan=7|3.3V
|-
|  1 ||ipu2 ||DISP0_DAT[13] 
|-
|  3 ||audmux ||AUD5_RXFS 
|-
|  4 ||sdma ||DEBUG_EVT_CHN_LINES[0] 
|-
|  5 ||gpio5 ||GPIO[7] 
|-
|  6 ||mmdc ||MMDC_DEBUG[18] 
|-
|  7 ||pl301_mx6q_per1 ||HADDR[24] 
|-
|rowspan=8|167 ||rowspan=8|R22 ||rowspan=8|DISP0_DAT8 ||0 ||ipu1 ||DISP0_DAT[8] ||rowspan=8|3.3V
|-
|  1 ||ipu2 ||DISP0_DAT[8] 
|-
|  2 ||pwm1 ||PWMO 
|-
|  3 ||wdog1 ||WDOG_B 
|-
|  4 ||sdma ||DEBUG_EVENT_CHANNEL[1] 
|-
|  5 ||gpio4 ||GPIO[29] 
|-
|  6 ||mmdc ||MMDC_DEBUG[13] 
|-
|  7 ||pl301_mx6q_per1 ||HADDR[19] 
|-
|rowspan=8|169 ||rowspan=8|P21 ||rowspan=8|DISP0_DAT3 ||0 ||ipu1 ||DISP0_DAT[3] ||rowspan=8|3.3V
|-
|  1 ||ipu2 ||DISP0_DAT[3] 
|-
|  2 ||ecspi3 ||SS0 
|-
|  3 ||usdhc1 ||USDHC_DEBUG[3] 
|-
|  4 ||sdma ||DEBUG_BUS_ERROR 
|-
|  5 ||gpio4 ||GPIO[24] 
|-
|  6 ||mmdc ||MMDC_DEBUG[8] 
|-
|  7 ||pl301_mx6q_per1 ||HADDR[14] 
|-
|rowspan=8|171 ||rowspan=8|P22 ||rowspan=8|DISP0_DAT1 ||0 ||ipu1 ||DISP0_DAT[1] ||rowspan=8|3.3V
|-
|  1 ||ipu2 ||DISP0_DAT[1] 
|-
|  2 ||ecspi3 ||MOSI 
|-
|  3 ||usdhc1 ||USDHC_DEBUG[1] 
|-
|  4 ||sdma ||DEBUG_EVENT_CHANNEL_SEL
|-
|  5 ||gpio4 ||GPIO[22] 
|-
|  6 ||mmdc ||MMDC_DEBUG[6] 
|-
|  7 ||pl301_mx6q_per1 ||HADDR[12] 
|-
|rowspan=7|173 ||rowspan=7|N21 ||rowspan=7|DISP0_DRDY ||0 ||ipu1 ||DI0_PIN15 ||rowspan=7|3.3V
|-
|  1 ||ipu2 ||DI0_PIN15
|-
|  2 ||audmux ||AUD6_TXC 
|-
|  3 ||mipi_core ||DPHY_TEST_OUT[29]
|-
|  4 ||sdma ||DEBUG_CORE_STATE[1] 
|-
|  5 ||gpio4 ||GPIO[17] 
|-
|  6 ||mmdc ||MMDC_DEBUG[1] 
|-
|rowspan=8|175 ||rowspan=8|N20 ||rowspan=8|DISP0_VSYNCH ||0 ||ipu1 ||DI0_PIN3 ||rowspan=8|3.3V
|-
|  1 ||ipu2 ||DI0_PIN3 
|-
|  2 ||audmux ||AUD6_TXFS 
|-
|  3 ||mipi_core ||DPHY_TEST_OUT[31] 
|-
|  4 ||sdma ||DEBUG_CORE_STATE[3] 
|-
|  5 ||gpio4 ||GPIO[19] 
|-
|  6 ||mmdc ||MMDC_DEBUG[3] 
|-
|  7 ||pl301_mx6q_per1 ||HADDR[10] 
|-
|rowspan=7|177 ||rowspan=7|F18 ||rowspan=7|DISP0_CONTRAST ||0 ||usdhc1 ||DAT3 ||rowspan=7|3.3V
|-
|  1 ||ecspi5 ||SS2 
|-
|  2 ||gpt ||CMPOUT3 
|-
|  3 ||pwm1 ||PWMO 
|-
|  4 ||wdog2 ||WDOG_B 
|-
|  5 ||gpio1 ||GPIO[21] 
|-
|  6 ||wdog2 ||WDOG_RST_B_DEB 
|-
|rowspan=6|179 ||rowspan=6|N19 ||rowspan=6|DISP0_CLK ||0 ||ipu1 ||DI0_DISP_CLK ||rowspan=6|3.3V
|-
|  1 ||ipu2 ||DI0_DISP_CLK 
|-
|  3 ||mipi_core ||DPHY_TEST_OUT[28] 
|-
|  4 ||sdma ||DPHY_TEST_OUT[28] 
|-
|  5 ||gpio4 ||GPIO[16] 
|-
|  6 ||mmdc ||MMDC_DEBUG[0] 
|-
|rowspan=8|181 ||rowspan=8|V25 ||rowspan=8|DISP0_DAT18 ||0 ||ipu1 ||DISP0_DAT[18] ||rowspan=8|3.3V
|-
|  1 ||ipu2 ||DISP0_DAT[18] 
|-
|  2 ||ecspi2 ||SS0 
|-
|  3 ||audmux ||AUD5_TXFS 
|-
|  4 ||audmux ||AUD4_RXFS 
|-
|  5 ||gpio5 ||GPIO[12] 
|-
|  6 ||mmdc ||MMDC_DEBUG[23] 
|-
|  7 ||weim ||WEIM_CS[2] 
|-
|rowspan=8|183 ||rowspan=8|V24 ||rowspan=8|DISP0_DAT22 ||0 ||ipu1 ||DISP0_DAT[22] ||rowspan=8|3.3V
|-
|  1 ||ipu2 ||DISP0_DAT[22] 
|-
|  2 ||ecspi1 ||MISO 
|-
|  3 ||audmux ||AUD4_TXFS 
|-
|  4 ||sdma ||DEBUG_BUS_DEVICE[1] 
|-
|  5 ||gpio5 ||GPIO[16] 
|-
|  6 ||mmdc ||MMDC_DEBUG[27] 
|-
|  7 ||pl301_mx6q_per1 ||HADDR[30] 
|-
|rowspan=6|185 ||rowspan=6|U25 ||rowspan=6|DISP0_DAT14 ||0 ||ipu1 ||DISP0_DAT[14] ||rowspan=6|3.3V
|-
|  1 ||ipu2 ||DISP0_DAT[14] 
|-
|  3 ||audmux ||AUD5_RXC 
|-
|  4 ||sdma ||DEBUG_EVT_CHN_LINES[1] 
|-
|  5 ||gpio5 ||GPIO[8] 
|-
|  6 ||mmdc ||MMDC_DEBUG[19] 
|-
|rowspan=8|187 ||rowspan=8|U24 ||rowspan=8|DISP0_DAT17 ||0 ||ipu1 ||DISP0_DAT[17] ||rowspan=8|3.3V
|-
|  1 ||ipu2 ||DISP0_DAT[17] 
|-
|  2 ||ecspi2 ||DISP0_DAT[17] 
|-
|  3 ||audmux ||AUD5_TXD
|-
|  4 ||sdma ||SDMA_EXT_EVENT[1] 
|-
|  5 ||gpio5 ||GPIO[11] 
|-
|  6 ||mmdc ||MMDC_DEBUG[22] 
|-
|  7 ||pl301_mx6q_per1 ||HADDR[27] 
|-
|rowspan=8|189 ||rowspan=8|T25 ||rowspan=8|DISP0_DAT9 ||0 ||ipu1 ||DISP0_DAT[9] ||rowspan=8|3.3V
|-
|  1 ||ipu2 ||DISP0_DAT[9] 
|-
|  2 ||pwm2 ||PWMO 
|-
|  3 ||wdog2 ||WDOG_B 
|-
|  4 ||sdma ||DEBUG_EVENT_CHANNEL[2] 
|-
|  5 ||gpio4 ||GPIO[30] 
|-
|  6 ||mmdc ||MMDC_DEBUG[14] 
|-
|  7 ||pl301_mx6q_per1 ||HADDR[20] 
|-
|rowspan=6|191 ||rowspan=6|T24 ||rowspan=6|DISP0_DAT12 ||0 ||ipu1 ||DISP0_DAT[12] ||rowspan=6|3.3V
|-
|  1 ||ipu2 ||DISP0_DAT[12] 
|-
|  4 ||sdma ||DEBUG_EVENT_CHANNEL[5] 
|-
|  5 ||gpio5 ||GPIO[6] 
|-
|  6 ||mmdc ||MMDC_DEBUG[17] 
|-
|  7 ||pl301_mx6q_per1 ||HADDR[23] 
|-
|rowspan=8|193 ||rowspan=8|R25 ||rowspan=8|DISP0_DAT5 ||0 ||ipu1 ||DISP0_DAT[5] ||rowspan=8|3.3V
|-
|  1 ||ipu2 ||DISP0_DAT[5] 
|-
|  2 ||ecspi3 ||SS2 
|-
|  3 ||audmux ||AUD6_RXFS 
|-
|  4 ||sdma ||DEBUG_MATCHED_DMBUB
|-
|  5 ||gpio4 ||GPIO[26] 
|-
|  6 ||mmdc ||MMDC_DEBUG[10] 
|-
|  7 ||pl301_mx6q_per1 ||HADDR[16] 
|-
|rowspan=8|195 ||rowspan=8|R24 ||rowspan=8|DISP0_DAT7 ||0 ||ipu1 ||DISP0_DAT[7] ||rowspan=8|3.3V
|-
|  1 ||ipu2 ||DISP0_DAT[7] 
|-
|  2 ||ecspi3 ||RDY 
|-
|  3 ||usdhc1 ||USDHC_DEBUG[5] 
|-
|  4 ||sdma ||DEBUG_EVENT_CHANNE L[0] 
|-
|  5 ||gpio4 ||GPIO[28] 
|-
|  6 ||mmdc ||MMDC_DEBUG[12] 
|-
|  7 ||pl301_mx6q_per1 ||HADDR[18] 
|-
|rowspan=7|197 ||rowspan=7|P24 ||rowspan=7|DISP0_DAT0 ||0 ||ipu1 ||DISP0_DAT[0] ||rowspan=7|3.3V
|-
|  1 ||ipu2 ||DISP0_DAT[0] 
|-
|  2 ||ecspi3 ||SCLK 
|-
|  3 ||usdhc1 ||USDHC_DEBUG[0] 
|-
|  4 ||sdma ||DEBUG_CORE_RUN 
|-
|  5 ||gpio4 ||GPIO[21] 
|-
|  6 ||mmdc ||MMDC_DEBUG[5]
|-
|rowspan=8|199 ||rowspan=8|N25 ||rowspan=8|DISP0_HSYNCH ||0 ||ipu1 ||DI0_PIN2 ||rowspan=8|3.3V
|-
|  1 ||ipu2 ||DI0_PIN2 
|-
|  2 ||audmux ||AUD6_TXD 
|-
|  3 ||mipi_core ||DPHY_TEST_OUT[30] 
|-
|  4 ||sdma ||DEBUG_CORE_STATE[2]
|-
|  5 ||gpio4 ||GPIO[18] 
|-
|  6 ||mmdc ||MMDC_DEBUG[2] 
|-
|  7 ||pl301_mx6q_per1 ||HADDR[9] 
|}

=== 表2(form 2)===
{| class="wikitable"
!Pin
!CPU Ball Name
!Pin Name
!功能选择<br>(function selection)
!所属模块<br>(module affiliated)
!功能描述<br>(function description)
!电压<br>(voltage)
|-
|2||rowspan=5|NC||rowspan=5|5VIN||rowspan=5| ||rowspan=5|电源<br>(power supply)||rowspan=5|5V输入<br>(5V input)||rowspan=5|5V
|-
|4
|-
|6
|-
|8
|-
|10
|-
|12||rowspan=4|NC||rowspan=4|3P3V||rowspan=4| ||rowspan=4|电源<br>(power supply)||rowspan=4|3.3V输出（1A）<br>(output（1A）)||rowspan=4|3.3V
|-
|14
|-
|16
|-
|18
|-
| rowspan=8|20||rowspan=8|R6||rowspan=8|GPIO_4||0||esai1||HCKT||rowspan=8|3.3V
|-
|1||observe_mux||OBSRV_INT_OUT3
|-
|2||kpp||COL[7]
|-
|3||ccm||CCM_OUT_2
|-
|4||csu||CSU_ALARM_AUT[1]
|-
|5||gpio1||GPIO[4]
|-
|6||usdhc2||CD
|-
|7||ocotp_ctrl_wrapper||FUSE_LATCHED
|-
| rowspan=4|22||rowspan=4|N22||rowspan=4|EIM_BCLK||0||weim||WEIM_BCLK||rowspan=4|3.3V
|-
|1||ipu1||DI1_PIN16
|-
|5||gpio6||GPIO[31]
|-
|6||tpsmp||HDATA[31]
|-
| rowspan=7|24||rowspan=7|P3||rowspan=7|CSI0_DATA_EN||0||ipu1||CSI0_DATA_EN||rowspan=7|2.5V
|-
|1||weim||WEIM_D[0]
|-
|2||pcie_ctrl||DIAG_STATUS_BUS_MUX[14]
|-
|4||sdma||DEBUG_PC[2]
|-
|5||gpio5||GPIO[20]
|-
|6||mmdc||MMDC_DEBUG[31]
|-
|7||ARM CortexA9 MPCore Platform||TRCLK
|-
| rowspan=8|26||rowspan=8|G23||rowspan=8|UART2_CTS||0||weim||WEIM_D[28]||rowspan=8|3.3V
|-
|1||i2c1||SDA
|-
|2||ecspi4||MOSI
|-
|3||ipu2||CSI1_D[12]
|-
|4||uart2||CTS
|-
|5||gpio3||GPIO[28]
|-
|6||ipu1||EXT_TRIG
|-
|7||ipu1||DI0_PIN13
|-
| rowspan=7|28||rowspan=7|J19||rowspan=7|UART2_RTS||0||weim||WEIM_D[29]||rowspan=7|3.3V
|-
|1||ipu1||DI1_PIN15
|-
|2||ecspi4||SS0
|-
|4||uart2||RTS
|-
|5||gpio3||GPIO[29]
|-
|6||ipu2||CSI1_VSYNC
|-
|7||ipu1||DI0_PIN14
|-
| rowspan=8|30||rowspan=8|E24||rowspan=8|UART2_TXD||0||weim||WEIM_D[26]||rowspan=8|3.3V
|-
|1||ipu1||DI1_PIN11
|-
|2||ipu1||CSI0_D[1]
|-
|3||ipu2||CSI1_D[14]
|-
|4||uart2||TXD_MUX
|-
|5||gpio3||GPIO[26]
|-
|6||ipu1||SISG[2]
|-
|7||ipu1||DISP1_DAT[22]
|-
| rowspan=8|32||rowspan=8|E25||rowspan=8|UART2_RXD||0||weim||WEIM_D[27]||rowspan=8|3.3V
|-
|1||ipu1||DI1_PIN13
|-
|2||ipu1||CSI0_D[0]
|-
|3||ipu2||CSI1_D[13]
|-
|4||uart2||RXD_MUX
|-
|5||gpio3||GPIO[27]
|-
|6||ipu1||SISG[3]
|-
|7||ipu1||DISP1_DAT[23]
|-
| rowspan=8|34||rowspan=8|D25||rowspan=8|UART3_CTS||0||weim||WEIM_D[23]||rowspan=8|3.3V
|-
|1||ipu1||DI0_D0_CS
|-
|2||uart3||CTS
|-
|3||uart1||DCD
|-
|4||ipu2||CSI1_DATA_EN
|-
|5||gpio3||GPIO[23]
|-
|6||ipu1||DI1_PIN2
|-
|7||ipu1||DI1_PIN14
|-
| rowspan=8|36||rowspan=8|H21||rowspan=8|UART3_RTS||0||weim||WEIM_D[31]||rowspan=8|3.3V
|-
|1||ipu1||DISP1_DAT[20]
|-
|2||ipu1||DI0_PIN12
|-
|3||ipu1||CSI0_D[2]
|-
|4||uart3||RTS
|-
|5||gpio3||GPIO[31]
|-
|6||usboh3||USBH1_PWR
|-
|7||pl301_mx6q_ per1||HPROT[1]
|-
| rowspan=8|38||rowspan=8|F22||rowspan=8|UART3_TXD||0||weim||WEIM_D[24]||rowspan=8|3.3V
|-
|1||ecspi4||SS2
|-
|2||uart3||TXD_MUX
|-
|3||ecspi1||SS2
|-
|4||ecspi2||SS2
|-
|5||gpio3||GPIO[24]
|-
|6||audmux||AUD5_RXFS
|-
|7||uart1||DTR
|-
| rowspan=8|40||rowspan=8|G22||rowspan=8|UART3_RXD||0||weim||WEIM_D[25]||rowspan=8|3.3V
|-
|1||ecspi4||SS3
|-
|2||uart3||RXD_MUX
|-
|3||ecspi1||SS3
|-
|4||ecspi2||SS3
|-
|5||gpio3||GPIO[25]
|-
|6||audmux||AUD5_RXC
|-
|7||uart1||DSR
|-
| rowspan=7|42||rowspan=7|A23||rowspan=7|SD2_DATA2||0||usdhc2||DAT2||rowspan=7|3.3V
|-
|1||ecspi5||SS1
|-
|2||weim||WEIM_CS[3]
|-
|3||audmux||AUD4_TXD
|-
|4||kpp||ROW[6]
|-
|5||gpio1||GPIO[13]
|-
|6||ccm||STOP
|-
| rowspan=6|44||rowspan=6|A22||rowspan=6|SD2_DATA0||0||usdhc2||DAT0||rowspan=6|3.3V
|-
|1||ecspi5||MISO
|-
|3||audmux||AUD4_RXD
|-
|4||kpp||ROW[7]
|-
|5||gpio1||GPIO[15]
|-
|6||dcic2||DCIC_OUT
|-
| rowspan=8|46||rowspan=8|C21||rowspan=8|SD2_CLK||0||usdhc2||CLK||rowspan=8|3.3V
|-
|1||ecspi5||SCLK
|-
|2||kpp||COL[5]
|-
|3||audmux||AUD4_RXFS
|-
|4||pcie_ctrl||DIAG_STATUS_BUS_MUX[9]
|-
|5||gpio1||GPIO[10]
|-
|6||phy||DTB[1]
|-
|7||sata_phy||DTB[1]
|-
| rowspan=7|48||rowspan=7|B22||rowspan=7|SD2_DATA3||0||usdhc2||DAT3||rowspan=7|3.3V
|-
|1||ecspi5||SS3
|-
|2||kpp||COL[6]
|-
|3||audmux||AUD4_TXC
|-
|4||pcie_ctrl||DIAG_STATUS_BUS_MUX[11]
|-
|5||gpio1||GPIO[12]
|-
|6||sjc||DONE
|-
| rowspan=6|50||rowspan=6|F19||rowspan=6|SD2_CMD||0||usdhc2||CMD||rowspan=6|3.3V
|-
|1||ecspi5||MOSI
|-
|2||kpp||ROW[5]
|-
|3||audmux||AUD4_RXC
|-
|4||pcie_ctrl||DIAG_STATUS_BUS_MUX[10]
|-
|5||gpio1||GPIO[11]
|-
| rowspan=7|52||rowspan=7|E20||rowspan=7|SD2_DATA1||0||usdhc2||DAT1||rowspan=7|3.3V
|-
|1||ecspi5||SS0
|-
|2||weim||WEIM_CS[2]
|-
|3||audmux||AUD4_TXFS
|-
|4||kpp||COL[7]
|-
|5||gpio1||GPIO[14]
|-
|6||ccm||WAIT
|-
|54||B14||SATA_RXP|| ||rowspan=4|SATA</p| ||SATA_RXP||rowspan=4|2.5V
|-
|56||A14||SATA_RXN|| ||SATA_RXN
|-
|58||B12||SATA_TXN|| ||SATA_TXN
|-
|60||A12||SATA_TXP|| ||SATA_TXP
|-
| rowspan=8|62||rowspan=8|H20||rowspan=8|USB_OTG_OC||0||weim||WEIM_D[21]||rowspan=8|3.3V
|-
|1||ecspi4||SCLK
|-
|2||ipu1||DI0_PIN17
|-
|3||ipu2||CSI1_D[11]
|-
|4||usboh3||USBOTG_OC
|-
|5||gpio3||GPIO[21]
|-
|6||i2c1||SCL
|-
|7||spdif||IN1
|-
| rowspan=8|64||rowspan=8|E23||rowspan=8|USB_OTG_PWR_EN||0||weim||WEIM_D[22]||rowspan=8|3.3V
|-
|1||ecspi4||MISO
|-
|2||ipu1||DI0_PIN1
|-
|3||ipu2||CSI1_D[10]
|-
|4||usboh3||USBOTG_PWR
|-
|5||gpio3||GPIO[22]
|-
|6||spdif||OUT1
|-
|7||pl301_mx6q_ per1||HWRITE
|-
|66||B6||USB_OTG_DN|| ||rowspan=3|USBOTG</p| ||USB_OTG_DN||rowspan=2|2.5V
|-
|68||A6||USB_OTG_DP|| ||USB_OTG_DP
|-
|70||E9||USB_OTG_VBUS|| ||USB_OTG_VBUS||5V
|-
| rowspan=7|72||rowspan=7|T4||rowspan=7|USB_OTG_ID||0||esai1||SCKR||rowspan=7|3.3V
|-
|1||wdog2||WDOG_B
|-
|2||kpp||ROW[5]
|-
|4||pwm2||PWMO
|-
|5||gpio1||GPIO[1]
|-
|6||usdhc1||CD
|-
|7||src||TESTER_ACK
|-
|74||B2||PCIE_RXP|| ||rowspan=6|PCIE</p| ||PCIE_RXP||rowspan=6|2.5V
|-
|76||B1||PCIE_RXM|| ||PCIE_RXM
|-
|78||B3||PCIE_TXP|| ||PCIE_TXP
|-
|80||A3||PCIE_TXM|| ||PCIE_TXM
|-
|82||D7||CLK1_P|| ||CLK1_P
|-
|84||C7||CLK1_N|| ||CLK1_N
|-
|86||K4||HDMI_D2P|| ||rowspan=10|HDMI</p| ||HDMI_D2P||rowspan=10|2.5V
|-
|88||K3||HDMI_D2M|| ||HDMI_D2M
|-
|90||W4||HDMI_CEC_IN|| ||HDMI_CEC_IN
|-
|92||K1||HDMI_HPD|| ||HDMI_HPD
|-
|94||J4||HDMI_D1P|| ||HDMI_D1P
|-
|96||J3||HDMI_D1M|| ||HDMI_D1M
|-
|98||J6||HDMI_CLKP|| ||HDMI_CLKP
|-
|100||J5||HDMI_CLKM|| ||HDMI_CLKM
|-
|102||K6||HDMI_D0P|| ||HDMI_D0P
|-
|104||K5||HDMI_D0M|| ||HDMI_D0M
|-
| rowspan=8|106||rowspan=8|N5||rowspan=8|I2C1_SCL||0||ipu1||CSI0_D[9]||rowspan=8|2.5V
|-
|1||weim||WEIM_D[7]
|-
|2||ecspi2||MOSI
|-
|3||kpp||ROW[7]
|-
|4||i2c1||SCL
|-
|5||gpio5||GPIO[27]
|-
|6||mmdc||MMDC_DEBUG[48]
|-
|7||ARM CortexA9 MPCore Platform||TRACE[6]
|-
| rowspan=8|108||rowspan=8|N6||rowspan=8|I2C1_SDA||0||ipu1||CSI0_D[8]||rowspan=8|2.5V
|-
|1||weim||WEIM_D[6]
|-
|2||ecspi2||SCLK
|-
|3||kpp||COL[7]
|-
|4||i2c1||SDA
|-
|5||gpio5||GPIO[26]
|-
|6||mmdc||MMDC_DEBUG[47]
|-
|7||ARM CortexA9 MPCore Platform||TRACE[5]
|-
| rowspan=8|110||rowspan=8|N1||rowspan=8|AUD3_TXC||0||ipu1||CSI0_D[4]||rowspan=8|2.5V
|-
|1||weim||WEIM_D[2]
|-
|2||ecspi1||SCLK
|-
|3||kpp||COL[5]
|-
|4||audmux||AUD3_TXC
|-
|5||gpio5||GPIO[22]
|-
|6||mmdc||MMDC_DEBUG[43]
|-
|7||ARM CortexA9 MPCore Platform||TRACE[1]
|-
| rowspan=8|112||rowspan=8|P2||rowspan=8|AUD3_TXD||0||ipu1||CSI0_D[5]||rowspan=8|2.5V
|-
|1||weim||WEIM_D[3]
|-
|2||ecspi1||MOSI
|-
|3||kpp||ROW[5]
|-
|4||audmux||AUD3_TXD
|-
|5||gpio5||GPIO[23]
|-
|6||mmdc||MMDC_DEBUG[44]
|-
|7||ARM CortexA9 MPCore Platform||TRACE[2]
|-
| rowspan=8|114||rowspan=8|N3||rowspan=8|AUD3_RXD||0||ipu1||CSI0_D[7]||rowspan=8|2.5V
|-
|1||weim||WEIM_D[5]
|-
|2||ecspi1||SS0
|-
|3||kpp||ROW[6]
|-
|4||audmux||AUD3_RXD
|-
|5||gpio5||GPIO[25]
|-
|6||mmdc||MMDC_DEBUG[46]
|-
|7||ARM CortexA9 MPCore Platform||TRACE[4]
|-
| rowspan=8|116||rowspan=8|N4||rowspan=8|AUD3_TXFS||0||ipu1||CSI0_D[6]||rowspan=8|2.5V
|-
|1||weim||WEIM_D[4]
|-
|2||ecspi1||MISO
|-
|3||kpp||COL[6]
|-
|4||audmux||AUD3_TXFS
|-
|5||gpio5||GPIO[24]
|-
|6||mmdc||MMDC_DEBUG[45]
|-
|7||ARM CortexA9 MPCore Platform||TRACE[3]
|-
| rowspan=7|118||rowspan=7|R7||rowspan=7|I2C3_SCL||0||esai1||HCKR||rowspan=7|3.3V
|-
|1||observe_mux||OBSRV_INT_OUT0
|-
|2||i2c3||SCL
|-
|4||ccm||CLKO2
|-
|5||gpio1||GPIO[3]
|-
|6||usboh3||USBH1_OC
|-
|7||mlb||MLBCLK
|-
| rowspan=8|120||rowspan=8|T3||rowspan=8|I2C3_SDA||0||esai1||SCKT||rowspan=8|3.3V
|-
|1||observe_mux||OBSRV_INT_OUT1
|-
|2||i2c3||SDA
|-
|3||ccm||CCM_OUT_0
|-
|4||csu||CSU_INT_DEB
|-
|5||gpio1||GPIO[6]
|-
|6||usdhc2||LCTL
|-
|7||mlb||MLBSIG
|-
| rowspan=8|122||rowspan=8|T6||rowspan=8|CAN2_TX||0||can2||TXCAN||rowspan=8|3.3V
|-
|1||ipu1||SISG[4]
|-
|2||usboh3||USBOTG_OC
|-
|3||kpp||COL[4]
|-
|4||uart5||RTS
|-
|5||gpio4||GPIO[14]
|-
|6||mmdc||MMDC_DEBUG[49]
|-
|7||ARM CortexA9 MPCore Platform||HADDR[7]
|-
| rowspan=8|124||rowspan=8|V5||rowspan=8|CAN2_RX||0||can2||RXCAN||rowspan=8|3.3V
|-
|1||ipu1||SISG[5]
|-
|2||usboh3||USBOTG_PWR
|-
|3||kpp||ROW[4]
|-
|4||uart5||CTS
|-
|5||gpio4||GPIO[15]
|-
|6||mmdc||MMDC_DEBUG[50]
|-
|7||pl301_mx6q_ per1||HADDR[8]
|-
| rowspan=7|126||rowspan=7|T5||rowspan=7|GPIO_0_CLKO||0||ccm||CLKO||rowspan=7|3.3V
|-
|2||kpp||COL[5]
|-
|3||asrc||ASRC_EXT_CLK
|-
|4||epit1||EPITO
|-
|5||gpio1||GPIO[0]
|-
|6||usboh3||USBH1_PWR
|-
|7||snvs_hp_wrapper||SNVS_VIO_5
|-
|128||NC||GND|| || || ||0V
|-
|130||AA2||LVDS1_TX1_N|| ||rowspan=10|LVDS1</p| ||LVDS1_TX1_N||rowspan=10|2.5V
|-
|132||AA1||LVDS1_TX1_P|| ||LVDS1_TX1_P
|-
|134||Y2||LVDS1_TX0_P|| ||LVDS1_TX0_P
|-
|136||Y1||LVDS1_TX0_N|| ||LVDS1_TX0_N
|-
|138||AA3||LVDS1_TX3_N|| ||LVDS1_TX3_N
|-
|140||AA4||LVDS1_TX3_P|| ||LVDS1_TX3_P
|-
|142||AB2||LVDS1_TX2_P|| ||LVDS1_TX2_P
|-
|144||AB1||LVDS1_TX2_N|| ||LVDS1_TX2_N
|-
|146||Y3||LVDS1_CLK_N|| ||LVDS1_CLK_N
|-
|148||Y4||LVDS1_CLK_P|| ||LVDS1_CLK_P
|-
| rowspan=8|150||rowspan=8|A16||rowspan=8|NANDF_ALE||0||rawnand||ALE||rowspan=8|3.3V
|-
|1||usdhc4||RST
|-
|2||pcie_ctrl||DIAG_STATUS_BUS_MUX[0]
|-
|3||usboh3||UH3_DFD_OUT[12]
|-
|4||usboh3||UH2_DFD_OUT[12]
|-
|5||gpio6||GPIO[8]
|-
|6||mipi_core||DPHY_TEST_IN[24]
|-
|7||tpsmp||HTRANS[1]
|-
| rowspan=8|152||rowspan=8|C15||rowspan=8|NANDF_CLE||0||rawnand||CLE||rowspan=8|3.3V
|-
|1||ipu2||SISG[4]
|-
|2||pcie_ctrl||DIAG_STATUS_BUS_MUX[31]
|-
|3||usboh3||UH3_DFD_OUT[11]
|-
|4||usboh3||UH2_DFD_OUT[11]
|-
|5||gpio6||GPIO[7]
|-
|6||mipi_core||DPHY_TEST_IN[23]
|-
|7||tpsmp||HTRANS[0]
|-
| rowspan=8|154||rowspan=8|E15||rowspan=8|NANDF_WP_B||0||rawnand||RESETN||rowspan=8|3.3V
|-
|1||ipu2||SISG[5]
|-
|2||pcie_ctrl||DIAG_STATUS_BUS_MUX[1]
|-
|3||usboh3||UH3_DFD_OUT[13]
|-
|4||usboh3||UH2_DFD_OUT[13]
|-
|5||gpio6||GPIO[9]
|-
|6||mipi_core||DPHY_TEST_OUT[32]
|-
|7||pl301_mx6q_per1||HSIZE[0]
|-
| rowspan=7|156||rowspan=7|D20||rowspan=7|SD1_CLK||0||usdhc1||CLK||rowspan=7|3.3V
|-
|1||ecspi5||SCLK
|-
|2||osc32k||32K_OUT
|-
|3||gpt||CLKIN
|-
|5||gpio1||GPIO[20]
|-
|6||phy||DTB[0]
|-
|7||sata_phy||DTB[0]
|-
| rowspan=8|158||rowspan=8|U5||rowspan=8|I2C2_SCL||0||ecspi1||SS3||rowspan=8|3.3V
|-
|1||enet||CRS
|-
|2||hdmi_tx||DDC_SCL
|-
|3||kpp||COL[3]
|-
|4||i2c2||SCL
|-
|5||gpio4||GPIO[12]
|-
|6||spdif||IN1
|-
|7||pl301_mx6q_per1||HADDR[5]
|-
| rowspan=8|160||rowspan=8|T7||rowspan=8|I2C2_SDA||0||osc32k||32K_OUT||rowspan=8|3.3V
|-
|1||asrc||ASRC_EXT_CLK
|-
|2||hdmi_tx||DDC_SDA
|-
|3||kpp||ROW[3]
|-
|4||i2c2||SDA
|-
|5||gpio4||GPIO[13]
|-
|6||usdhc1||VSELECT
|-
|7||pl301_mx6q_per1||HADDR[6]
|-
| rowspan=8|162||rowspan=8|U23||rowspan=8|DISP0_DAT19||0||ipu1||DISP0_DAT[19]||rowspan=8|3.3V
|-
|1||ipu2||DISP0_DAT[19]
|-
|2||ecspi2||SCLK
|-
|3||audmux||AUD5_RXD
|-
|4||audmux||AUD4_RXC
|-
|5||gpio5||GPIO[13]
|-
|6||mmdc||MMDC_DEBUG[24]
|-
|7||weim||WEIM_CS[3]
|-
| rowspan=8|164||rowspan=8|U22||rowspan=8|DISP0_DAT20||0||ipu1||DISP0_DAT[20]||rowspan=8|3.3V
|-
|1||ipu2||DISP0_DAT[20]
|-
|2||ecspi1||SCLK
|-
|3||audmux||AUD4_TXC
|-
|4||sdma||DEBUG_EVT_CHN_LINES[7]
|-
|5||gpio5||GPIO[14]
|-
|6||mmdc||MMDC_DEBUG[25]
|-
|7||pl301_mx6q_ per1||HADDR[28]
|-
| rowspan=8|166||rowspan=8|R23||rowspan=8|DISP0_DAT6||0||ipu1||DISP0_DAT[6]||rowspan=8|3.3V
|-
|1||ipu2||DISP0_DAT[6]
|-
|2||ecspi3||SS3
|-
|3||audmux||AUD6_RXC
|-
|4||sdma||DEBUG_RTBUFFER_WRITE
|-
|5||gpio4||GPIO[27]
|-
|6||mmdc||MMDC_DEBUG[11]
|-
|7||pl301_mx6q_ per1||HADDR[17]
|-
| rowspan=8|168||rowspan=8|T20||rowspan=8|DISP0_DAT21||0||ipu1||DISP0_DAT[21]||rowspan=8|3.3V
|-
|1||ipu2||DISP0_DAT[21]
|-
|2||ecspi1||MOSI
|-
|3||audmux||AUD4_TXD
|-
|4||sdma||DEBUG_BUS_DEVICE[0]
|-
|5||gpio5||GPIO[15]
|-
|6||mmdc||MMDC_DEBUG[26]
|-
|7||pl301_mx6q_per1||HADDR[29]
|-
| rowspan=8|170||rowspan=8|P23||rowspan=8|DISP0_DAT2||0||ipu1||DISP0_DAT[2]||rowspan=8|3.3V
|-
|1||ipu2||DISP0_DAT[2]
|-
|2||ecspi3||MISO
|-
|3||usdhc1||USDHC_DEBUG[2]
|-
|4||sdma||DEBUG_MODE
|-
|5||gpio4||GPIO[23]
|-
|6||mmdc||MMDC_DEBUG[7]
|-
|7||pl301_mx6q_per1||HADDR[13]
|-
| rowspan=7|172||rowspan=7|R21||rowspan=7|DISP0_DAT10||0||ipu1||DISP0_DAT[10]||rowspan=7|3.3V
|-
|1||ipu2||DISP0_DAT[10]
|-
|3||usdhc1||USDHC_DEBUG[6]
|-
|4||sdma||DEBUG_EVENT_CHANNE L[3]
|-
|5||gpio4||GPIO[31]
|-
|6||mmdc||MMDC_DEBUG[15]
|-
|7||pl301_mx6q_per1||HADDR[21]
|-
| rowspan=8|174||rowspan=8|P20||rowspan=8|DISP0_DAT4||0||ipu1||DISP0_DAT[4]||rowspan=8|3.3V
|-
|1||ipu2||DISP0_DAT[4]
|-
|2||ecspi3||SS1
|-
|3||usdhc1||USDHC_DEBUG[4]
|-
|4||sdma||DEBUG_BUS_RWB
|-
|5||gpio4||GPIO[25]
|-
|6||mmdc||MMDC_DEBUG[9]
|-
|7||pl301_mx6q_per1||HADDR[15]
|-
|176||GND||GND|| || || ||0V
|-
| rowspan=7|178||rowspan=7|R2||rowspan=7|ENET_REF_CLK||0||esai1||TX3_RX2||rowspan=7|3.3V
|-
|1||enet||1588_EVENT2_IN
|-
|3||usdhc1||LCTL
|-
|4||spdif||IN1
|-
|5||gpio7||GPIO[11]
|-
|6||i2c3||SDA
|-
|7||sjc||DE_B
|-
| rowspan=8|180||rowspan=8|P6||rowspan=8|ENET_nINT||0||esai1||TX1||rowspan=8|3.3V
|-
|1||enet||RX_CLK
|-
|2||usdhc3||VSELECT
|-
|3||sdma||SDMA_EXT_EVENT[1]
|-
|4||asrc||ASRC_EXT_CLK
|-
|5||gpio7||GPIO[13]
|-
|6||snvs_hp_wrapper||SNVS_VIO_5_CTL
|-
|7||src||SYSTEM_RST
|-
| rowspan=6|182||rowspan=6|W22||rowspan=6|ENET_RXD1||0||mlb||MLBSIG||rowspan=6|3.3V
|-
|1||enet||RDATA[1]
|-
|2||esai1||FST
|-
|4||enet||1588_EVENT3_OUT
|-
|5||gpio1||GPIO[26]
|-
|6||phy||TCK
|-
| rowspan=7|184||rowspan=7|W23||rowspan=7|ENET_RX_ER||0||NO_NAME||USBOTG_ID||rowspan=7|3.3V
|-
|1||enet||RX_ER
|-
|2||esai1||HCKR
|-
|3||spdif||IN1
|-
|4||enet||1588_EVENT2_OUT
|-
|5||gpio1||GPIO[24]
|-
|6||phy||TDI
|-
| rowspan=5|186||rowspan=5|V22||rowspan=5|ENET_nRST||1||enet||TX_CLK||rowspan=5|3.3V
|-
|2||esai1||FSR
|-
|3||sdma||DEBUG_BUS_DEVICE[4]
|-
|5||gpio1||GPIO[23]
|-
|6||spdif||SRCLK
|-
| rowspan=6|188||rowspan=6|V23||rowspan=6|ENET_MDIO||1||enet||MDIO||rowspan=6|3.3V
|-
|2||esai1||SCKR
|-
|3||sdma||DEBUG_BUS_DEVICE[3]
|-
|4||enet||1588_EVENT1_OUT
|-
|5||gpio1||GPIO[22]
|-
|6||spdif||PLOCK
|-
| rowspan=5|190||rowspan=5|U21||rowspan=5|ENET_CRS_DV||1||enet||RX_EN||rowspan=5|3.3V
|-
|2||esai1||SCKT
|-
|3||spdif||SPDIF_EXTCLK
|-
|5||gpio1||GPIO[25]
|-
|6||phy||TDO
|-
| rowspan=4|192||rowspan=4|V21||rowspan=4|ENET_TX_EN||1||enet||TX_EN||rowspan=4|3.3V
|-
|2||esai1||TX3_RX2
|-
|5||gpio1||GPIO[28]
|-
|6||sata_phy||TDI
|-
| rowspan=6|194||rowspan=6|W20||rowspan=6|ENET_TXD1||0||mlb||MLBCLK||rowspan=6|3.3V
|-
|1||enet||TDATA[1]
|-
|2||esai1||TX2_RX3
|-
|4||enet||1588_EVENT0_IN
|-
|5||gpio1||GPIO[29]
|-
|6||sata_phy||TDO
|-
| rowspan=6|196||rowspan=6|W21||rowspan=6|ENET_RXD0||0||osc32k||32K_OUT||rowspan=6|3.3V
|-
|1||enet||RDATA[0]
|-
|2||esai1||HCKT
|-
|3||spdif||OUT1
|-
|5||gpio1||GPIO[27]
|-
|6||phy||TMS
|-
| rowspan=6|198||rowspan=6|V20||rowspan=6|ENET_MDC||0||mlb||MLBDAT||rowspan=6|3.3V
|-
|1||enet||MDC
|-
|2||esai1||TX5_RX0
|-
|4||enet||1588_EVENT1_IN
|-
|5||gpio1||GPIO[31]
|-
|6||sata_phy||TMS
|-
| rowspan=4|200||rowspan=4|U20||rowspan=4|ENET_TXD0||0||enet||TDATA[0]||rowspan=4|3.3V
|-
|1||esai1||TX4_RX1
|-
|5||gpio1||GPIO[30]
|-
|6||sata_phy||TCK
|}

= '''应用领域(application)''' =
----
== '''通讯(communication)''' ==
　　MY-I.MX6核心模块的作用包括在读取不同的传感器来监视系统的运行状况，以及在不间断电源的条件下，通过GSM发送数据到服务器。结构紧凑、经济高效、高度可靠的MY-I.MX6核心模块功耗仅为0.35瓦。它提供了多种接口，如以太网、SPI、通用异步收发器（UART）、多个GPIO和SD卡接口，并提供了丰富的开发工具，包括CAN以及SPI库<br>
　　<span style="background:#CCCCCC">MY-I.MX6 core module can be used to read different sensors to monitor the running of system and send data to server via GSM with UPS. the power consumtion of MY-I.MX6 in tight structure,high efficiency and high reliability is  0.35W。
　　it offers various kinds of interfaces such as ethernet,SPI、universial asynchronous transmiter(UART）、multiple GPIO and SD card ports，and also offer abundan development tools,including CAN and SPI l</span><br>

== '''机器人与工业自动化(robot and industrial automation)''' ==
　　具备硬实时功能的Linux系统结合工业接口，如CAN和RS485，使MY-I.MX6模块是机器人和工业自动化应用的理想解决方案。在Linux上可以更快、更灵活地实现自动化的解决方案，或是利用众多可利用的GPIO，通过摄像头接口连接您的视觉系统，或通过以太网云安全地备份过程中的数据。无论您的应用是什么，我们很高兴在您选择合适的MY-I.MX6计算机模块时提供产品咨询服务<br>
　　<span style="background:#CCCCCC"></span><br>

== '''物流与运输''' ==
　　每天无数的人乘坐公交车、地铁、火车、电车或出租车，通行在北京、上海、广州等这样的国际都市，这些都可以靠MY-I.MX6功能完善的核心模块得以实现。在救护车、警察、卡车甚至包括废物处理系统的仪表板以及可移动车队管理系统中均可以采用我们的计算机模块。<br>
　　<span style="background:#CCCCCC"></span><br>

== '''数字标牌与娱乐''' ==
　　无论是机场、火车站还是商场和城市中心 - 数字标牌（Digital Signage）显示的信息有可以根据时间的变化和不同的个人需求来显示不同的内容。一些数字标牌可以通过触摸屏或其他输入设备和访问者互动， 鉴于其它系统可能需要进行同步的更新，并在很宽的范围内的多个屏幕上同时显示。未来对显示图形的数字标牌将有极大地需求，或者您只想显示文本信息，并且要求系统尽可能低功耗。我们的MY-I.MX6核心模块成本和最佳的电力消耗，提供令人惊讶的多屏视频和图形处理能力以及广泛的连接性能，包括快速以太网。请联系我们来找到最适合您的需求计算机模块<br>
　　<span style="background:#CCCCCC"></span><br>

== '''医疗与健康护理''' ==
　　从医院监测病人到家庭医疗护理，医疗器械领域中广泛使用了嵌入式计算机。你希望通过屏幕上易于理解的图形来获取复杂的结果吗？或者，你需要从各种各样的传感器来计算获取的数据。无论哪种方式，MY-I.MX6核心模块都是根据最高可靠性原则来设计和制造的。我们的许多行业领先的客户已经成功地获得了3C和CE等产品认证。 我们怎样才能为您找到合适的产品实现您心目中的产品？<br>
　　<span style="background:#CCCCCC"></span><br>

== '''环境监测''' ==
　　尽管MY-I.MX6核心模块计算能力很强大，但是只有很低的能耗，可以无风扇应用。他们是手持设备、低维护远程系统或智能传感器的完美解决方案。各种不同的传感器输入通道，再加上方便地连接到共同的网络和低功耗的优势，使明远智睿系列模块的成为室外环境监测的应用的不二之选， 如海啸预警系统。该模块为很多接口，如I2C，SPI，RS232等提供方便的连接。<br>
　　<span style="background:#CCCCCC"></span><br>

== '''能源与电力''' ==
　　电厂：无论他们上运行的是可再生能源、核能还是化石燃料均需要可靠的过程监测、控制和仪器仪表显示。计算机模块已成功地应用于这个领域，并获得许多客户的认证。应用包括：数据记录仪、智能电表、管理系统、智能传感器、远程监控和通信接口。我们的计算机模块在每年连续365天和极端环境条件下运行可靠，请与我们联系，根据您的特殊需求，为您提供解决方案<br>
　　<span style="background:#CCCCCC"></span><br>

== '''零售票务''' ==
　　电子秤、条码阅读器、库存管理系统和收银机 、计算机模块产品还可用于阵列的零售设备<br>
大量门票在停车场、收费道路等场合进行分配和使用。不只是把票交给你，还需要在回收的同时收取适当的费用，在餐厅常用的热水器和咖啡机，餐饮设备可以协助客人获得他们所需<br>
　　<span style="background:#CCCCCC"></span><br>

== '''航空''' ==
　　嵌入式计算机在航空应用领域扮演了重要的角色。它们存在于各种机载传感器和仪表中，在一些商用领域，也为乘客提供机上娱乐和信息服务。MY-I.MX6核心模块轻便且紧凑，系统的关键数据被存储在非易失性闪存中，确保系统几乎不可能发生故障。高性能、加上种类繁多的输入和输出能力，可以使我们的客户使用MY-I.MX6核心模块在飞机舱内及周边实现各种各样的应用，如：机载计算机、仪器仪表、碰撞检测、自动紧急着陆系统、视频传输、雷达、座舱控制和娱乐信息系统。<br>
　　<span style="background:#CCCCCC"></span><br>

== '''实验室仪器''' ==
　　从众多的质谱仪到电子秤，MY-I.MX6核心模块可以被广泛用在各自不同领域市场领导者的科学实验室仪器产品中。根据你对正在设计的设备所需要的功能、处理能力、接口，或内存量可能是您选择的模块化产品的重要特征。你是否需要输出到某种特定类型的显示器，或者产品从不同类型的传感器接收数据？对于其中的每个模块，你需要选择不同的功能。您可能需要一个触摸屏接口、摄像头接口、、USB主机和客户端，多个SD卡接口，内部固态存储器等。请联系我们，我们会告诉你哪些模块最符合您的要求。<br>
　　<span style="background:#CCCCCC"></span><br>

== '''访问控制与安全系统''' ==
　　每天数以百万计的人通过安全系统和门禁装置。这些产品所具备的微型尺寸、低功耗和连接许多不同的视频输入系统的特点，使其成为此类设备的理想平台，如视频监控系统、指纹和虹膜扫描仪等生物识别设备，用于停车场或者出入闸机控制设备。MY-I.MX6核心模块带有图像传感器接口、无线连接解决方案和连接众多外围设备的接口。高性能、低功耗和处理器无风扇设计、无需严格温度控制的极端工作温度，可以使其成为银行和商业活动组织者、海关、警察和军用警戒领域可靠的解决方案。<br>
　　<span style="background:#CCCCCC"></span><br>

== '''航海''' ==
　　苛刻的抗震动性能和可运行于工业温度范围，一直是舰船设备用来选择计算机模块的先觉条件。 我们的模块产品被客户集成到声纳系统、船队管理、通信单元和船舶柴油控制器，MY-I.MX6核心模块同样可以满足海洋认证机构最严格的要求<br>
　　<span style="background:#CCCCCC"></span><br>

== '''楼宇自动化控制''' ==
　　越来越多地楼宇自动化控制应用提供了舒适性、节能和安全性。移动远程控制设备将这些状态信息通过计算机实现可视化显示。用户只需预先设定控制条件和规则。MY-I.MX6核心模块具有丰富的图形和视频流接口的处理能力，提供许多接口，如I2C、USB、以太网、ADC、SPI。同时由于其功耗很低，使得它成为楼宇自动化领域、PoE供电的控制面板和其它应用程序的理想选择<br>
　　<span style="background:#CCCCCC"></span><br>

== '''汽车娱乐''' ==
　　MY-I.MX6核心模块可在汽车领域的广泛应用，如车队管理、汽车拉力赛汽车发动机诊断、信息娱乐系统和乘客信息管理，得益于符合工业温度范围、具备防振硬件设计。惊人的视频和3D图形处理能力、极高的视频输出分辨率、CAN接口，全方位实现计算机模块对各个应用领域的吸引力。无论你正在生产的产品是高档私家车，还是需要跟踪管理商业车队，明远智睿生产的MY-I.MX6核心模块均有大量的应用实例。通过这些实例，可以帮助你找到合适的计算机模块产品来满足预期用途。<br>
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