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−
= '''MY-IMX6-CB140简介''' =
+
<div>
 +
 
 +
= '''MYZR-IMX6-CB140视图''' =
 
----
 
----
−
　　MY-IMX6-CB140是我司基于NXP i.MX 6UltraLite应用处理器设计研发的嵌入式核心控制模块。核心板采用邮票孔的连接方式。<br>
+
== 核心板256M-256M正面 ==
−
== '''MY-IMX6-CB140视图''' ==
+
[[文件:myimx6_cb140_front.jpg|384px]]<br>
−
=== 正面 ===
+
== 核心板256M-4G正面 ==
−
[[文件:myimx6_cb140_1.1.1.1.png|642px]]<br>
+
[[文件:myimx6_cb140_4G_front.jpg|384px]]<br>
−
=== 背面 ===
+
 
−
[[文件:myimx6_cb140_1.1.2.1.png|642px]]<br>
+
== 尺寸 ==
−
== '''MY-IMX6-CB140尺寸''' ==
 
 
36mm * 38mm<br>
 
36mm * 38mm<br>
−
[[文件:myimx6_cb140_1.2.0.1.png|642px]]<br>
+
[[文件:myimx6_cb140_1.2.0.1.png|384px]]<br>
−
 
 
−
= '''i.MX 6UltraLite处理器介绍''' =
 
−
----
 
−
== '''框图及差异 ''' ==
 
−
[[文件:myimx6_cb140_2.1.0.1.png|642px]]<br>
 
 
<br>
 
<br>
−
[[文件:myimx6_cb140_2.1.0.2.png|642px]]<br>
+
[[文件:Myimx6_CB140_1.2.0.2.png|384px]]<br>
−
== '''概述''' ==
 
−
　　i.MX 6UltraLite扩展了i.MX6系列，它是一个高性能、超高效处理器系列，采用先进的ARM®Cortex®-A7内核，运行速度高达528 MHz。i.MX6UltraLite应用处理器包括一个集成的电源管理模块，降低了外接电源的复杂性，并简化了上电时序。这个系列的每个处理器提供多种存储器接口，其中包括16位LPDDR2、DDR3、DDR3L、原始和管理的NAND闪存、NOR闪存、eMMC、Quad SPI和各种其他接口，用于连接外围设备，如WLAN、Bluetooth™、GPS、显示器和摄像头传感器.<br>
 
−
 
 
−
== '''特性''' ==
 
−
* ARM® Cortex®-A7，运行频率528 MHz，128 KB L2缓存<br>
 
−
* 并行LCD显示，分辨率高达WXGA (1366x768)<br>
 
−
* 8/10/16/24位并行摄像头传感器接口<br>
 
−
* 16位LP-DDR2, DDR3/DDR3L<br>
 
−
* 8/16位并行NOR FLASH / PSRAM<br>
 
−
* 双通道Quad-SPI NOR FLASH<br>
 
−
* 8位原始NAND FLASH与40位ECC<br>
 
−
* 两个MMC 4.5/SD 3.0/SDIO端口<br>
 
−
* 两个USB 2.0 OTG，HS/FS，器件或主机，带PHY接口<br>
 
−
* 音频接口包括3个I2S/SAI, S/PDIF Tx/Rx<br>
 
−
* 两个10/100以太网，支持IEEE 1588协议<br>
 
−
* 两个12位ADC，高达10个输入通道，以及电阻式触摸控制器(4线/5线)<br>
 
−
* 部分PMU集成<br>
 
−
* 安全模块：TRNG，加密引擎(带DPA的AES，TDES/ SHA/ RSA)，防篡改监控，安全引导，SIMV2/ EVMSIM X 2，OTF DRAM加密，PCI4.0预认证<br>
 
−
* 14x14 289MAPBGA 0.8mm间距<br>
 
−
* 9x9 272 MAPBGA 0.5mm间距<br>
 
  
−
= '''MY-IMX6-CB140''' =
+
= '''MYZR-IMX6-CB140参数''' =
 
== '''硬件配置''' ==
 
== '''硬件配置''' ==
 
----
 
----
 
{| class="wikitable"
 
{| class="wikitable"
 
|-
 
|-
−
|CPU
+
!CPU
−
|i.MX 6UltraLite
+
!i.MX 6UltraLite/i.MX6ULL
−
|兼容汽车，工业，消费级
+
!兼容汽车，工业，消费级
 
|-
 
|-
−
|内存
+
|内存
 
|DDR3 256MB
 
|DDR3 256MB
 
|可扩展至512MB
 
|可扩展至512MB
第53行： 第29行：
 
|存储
 
|存储
 
|4GB eMMC
 
|4GB eMMC
−
|兼容至64GB  
+
|兼容至64GB
 
|}
 
|}
  
 
== '''供电电源''' ==
 
== '''供电电源''' ==
 
5V输入<br>
 
5V输入<br>
 +
== '''CPU 功耗''' ==
 +
状态：空载<br> 
 +
工作电压：5V <br> 
 +
工作电流：64mA<br>
 +
 
== '''温度范围''' ==
 
== '''温度范围''' ==
 
=== 工作温度 ===
 
=== 工作温度 ===
−
* 消费级：<br>
+
* 商业级：<br>
−
　　　　0°C ~ 95°C<br>
+
::0°C ~ 70°C<br>
 
* 工业级：<br>
 
* 工业级：<br>
−
　　　　-40°C ~ 105°C<br>
+
::-40°C ~ 85°C<br>
−
* 汽车级：<br>
 
−
　　　　-40°C ~ 125°C<br>
 
  
 
=== 存储温度 ===
 
=== 存储温度 ===
−
-60°C ~ 125°C<br>
+
::-60°C ~ 125°C<br>
 +
 
 
== '''操作系统支持''' ==
 
== '''操作系统支持''' ==
−
=== Linux ===
+
*Linux
−
Linux-3.14.52<br>
+
Linux-4.1.15 
−
=== QT ===
+
   
−
QT5.5（使用Linux-3.14.52内核）<br>
+
Linux-4.9.88 
 +
 
 +
*QT
 +
QT-4.8.5 
 +
 +
QT-5.5.0
 +
 
 
== '''硬件默认接口''' ==
 
== '''硬件默认接口''' ==
−
=== 默认接口 ===
+
=== 默认接口(I.MX6UL/6ULL（6G/6Y)) ===
 +
{| class="wikitable"
 +
|-
 +
|colspan=2|接口规格||最大可配置接口数||描述
 +
|-
 +
|rowspan=9|通讯接口||Ethernet||2||2路10/100Mbps以太网，符合IEEE1588
 +
|-
 +
|USB OTG||2||2路高速USB 2.0 OTG（最高480 Mbps），带有集成的HS USB PHY
 +
|-
 +
|UART||8||8路UART，每路高达 1.4Mbps
 +
|-
 +
|CAN||2||支持 CAN2.0B 协议
 +
|-
 +
|I2C||4||4路I2C，支持400 kbps
 +
|-
 +
|SPI||4||4路eCSPI（Enhanced CSPI），每个高达52 Mbps
 +
|-
 +
|ADC||2||两个12位 ADC 模块，到达 10个输入通道
 +
|-
 +
|PWM||8||具有时钟源选择的16位递增计数器，4X16 FIFO
 +
|-
 +
|Timer||4||
 +
|-
 +
|外部存储接口||SD3.0/SDIO||1||4位SD和SDIO卡传输，最高可达UHS-I SDR-104模式（最大104 MB/s）
 +
|-
 +
|rowspan=4|多媒体||LCD||1||"最大可支持85Mhz显示时钟，且在60Hz时分辨率高达 WXGA（1366X768）
 +
支持 8/16/18/24位显示"
 +
|-
 +
|DVP||1||"单路并行摄像头接口，最高24位和133.3 MHz像素时钟
 +
支持 8/10/16/24位输入"
 +
|-
 +
|SAI||3||三路 I2S/SAI/AC97，每个高达1.4 Mbps
 +
|-
 +
|ESAI||1||增强型 SAI 接口
 +
|-
 +
|"加密模块<br>（Only 6G）"||"CAAM<br>（Cryptographic Acceleration and Assurance Module）"||1||containing cryptographic and hash engines, 32 KB secure RAM, and True and Pseudo Random Number Generator (NIST certified).
 +
|}
 +
=== 默认接口(I.MX6ULZ（6Z)) ===
 
{| class="wikitable"
 
{| class="wikitable"
 
|-
 
|-
−
|rowspan=2|CCM
+
|colspan=2|接口规格||最大可配置接口数||描述
−
|CCM_CLK1
+
|-
−
|支持
+
|rowspan=6|通讯接口||USB OTG||2||2路高速USB 2.0 OTG（最高480 Mbps），带有集成的HS USB PHY
−
|外部时钟输出
+
|-
−
|-
+
|UART||4||4路UART，每路高达 5Mbps
−
|PMIC_STBY_REQ
+
|-
−
|支持
+
|I2C||4||4路I2C，支持400 kbps
−
|用于核心板
+
|-
 +
|SPI||2||2路eCSPI（Enhanced CSPI），每个高达52 Mbps
 +
|-
 +
|PWM||4||具有时钟源选择的16位递增计数器，4X16 FIFO
 +
|-
 +
|Timer||2||
 +
|-
 +
|外部存储接口||SD3.0/SDIO||1||4位SD和SDIO卡传输，最高可达UHS-I SDR-104模式（最大104 MB/s）
 +
|-
 +
|rowspan=2|多媒体||SAI||3||三路 I2S/SAI/AC97，每个高达1.4 Mbps
 +
|-
 +
|ESAI||1||增强型 SAI 接口
 +
|}
 +
== '''管脚定义&详细功能说明''' ==
 +
===I.MX6UL/6ULL（6G/6Y)===
 +
{| class="wikitable"
 +
!Pin NO.
 +
!Pin Name
 +
!CPU Ball Name 
 +
!功能描述
 +
!管脚电压
 +
|-
 +
|1 ||CLK1_N ||P16 || CCM_CLK1_N||2.5V
 +
|-
 +
|2 ||CLK1_P ||P17 || CCM_CLK1_P||2.5V
 +
|-
 +
|rowspan=10|3 ||rowspan=10|WDOG_B ||rowspan=10|N17 || ADC1_IN8 ||rowspan=10|3.3V
 +
|-
 +
|ADC2_IN8
 +
|-
 +
|CCM_PMIC_READY
 +
|-
 +
|CSI_VSYNC
 +
|-
 +
|GPIO1_IO08
 +
|-
 +
|PWM1_OUT
 +
|-
 +
|SPDIF_OUT
 +
|-
 +
|UART5_RTS_B
 +
|-
 +
|USDHC2_VSELECT
 +
|-
 +
|WDOG1_WDOG_B
 +
|-
 +
|rowspan=10|4 ||rowspan=10|PWM4 ||rowspan=10|M17 || ADC1_IN5 ||rowspan=10|3.3V
 +
|-
 +
|ADC2_IN5
 +
|-
 +
|CSI_FIELD
 +
|-
 +
|ENET2_EVENT0_OUT
 +
|-
 +
|GPIO1_IO05
 +
|-
 +
|PWM4_OUT
 +
|-
 +
|UART5_RX_DATA
 +
|-
 +
|USB_OTG2_ID
 +
|-
 +
|USDHC1_VSELECT
 +
|-
 +
|XTALOSC_REF_CLK2
 +
|-
 +
|rowspan=10|5 ||rowspan=10|PWM2 ||rowspan=10|M15 || ADC1_IN9 ||rowspan=10|3.3V
 +
|-
 +
|ADC2_IN9
 +
|-
 +
|CSI_HSYNC
 +
|-
 +
|GPIO1_IO09
 +
|-
 +
|PWM2_OUT
 +
|-
 +
|SPDIF_IN
 +
|-
 +
|UART5_CTS_B
 +
|-
 +
|USDHC1_RESET_B
 +
|-
 +
|USDHC2_RESET_B
 +
|-
 +
|WDOG1_WDOG_ANY
 +
|-
 +
|rowspan=8|6 ||rowspan=8|PWM5 ||rowspan=8|E6 || CSI_FIELD ||rowspan=8|3.3V
 +
|-
 +
|EIM_WAIT
 +
|-
 +
|GPIO4_IO16
 +
|-
 +
|NAND_DQS
 +
|-
 +
|PWM5_OUT
 +
|-
 +
|QSPI_A_SS0_B
 +
|-
 +
|SDMA_EXT_EVENT1
 +
|-
 +
|SPDIF_EXT_CLK
 +
|-
 +
|rowspan=10|7 ||rowspan=10|USB_OTG2_PWR ||rowspan=10|L14 ||ADC1_IN2 ||rowspan=10|3.3V
 +
|-
 +
|ADC2_IN2
 +
|-
 +
|GPIO1_IO02
 +
|-
 +
|GPT1_COMPARE2
 +
|-
 +
|I2C1_SCL
 +
|-
 +
|SDMA_EXT_EVENT0
 +
|-
 +
|UART1_TX_DATA
 +
|-
 +
|USB_OTG2_PWR
 +
|-
 +
|USDHC1_WP
 +
|-
 +
|XTALOSC_ENET_REF_CLK_25M
 +
|-
 +
|rowspan=10|8 ||rowspan=10|USB_OTG1_OC ||rowspan=10|L15 ||ADC1_IN1 ||rowspan=10|3.3V
 +
|-
 +
|ADC2_IN1
 +
|-
 +
|ENET1_EVENT0_OUT
 +
|-
 +
|GPIO1_IO01
 +
|-
 +
|GPT1_COMPARE1
 +
|-
 +
|I2C2_SDA
 +
|-
 +
|MQS_LEFT
 +
|-
 +
|USB_OTG1_OC
 +
|-
 +
|WDOG1_WDOG_B
 +
|-
 +
|XTALOSC_REF_CLK2
 +
|-
 +
|rowspan=9|9 ||rowspan=9|USB_OTG1_PWR ||rowspan=9|M16 ||ADC1_IN4||rowspan=9|3.3V
 +
|-
 +
|ADC2_IN4
 +
|-
 +
|ENET2_EVENT0_IN
 +
|-
 +
|GPIO1_IO04
 +
|-
 +
|PWM3_OUT
 +
|-
 +
|UART5_TX_DATA
 +
|-
 +
|USB_OTG1_PWR
 +
|-
 +
|USDHC1_RESET_B
 +
|-
 +
|XTALOSC_REF_CLK1
 +
|-
 +
|rowspan=8|10 ||rowspan=8|USB_OTG2_OC||rowspan=8| L17 || ADC1_IN3 ||rowspan=8|3.3V
 +
|-
 +
|ADC2_IN3
 +
|-
 +
|GPIO1_IO3
 +
|-
 +
|GPT1_COMPARE3
 +
|-
 +
|I2C1_SDA
 +
|-
 +
|UART1_RX_DATA
 +
|-
 +
|USB_OTG2_OC
 +
|-
 +
|USDHC1_CD_B
 +
|-
 +
|rowspan=7|11 ||rowspan=7| CAN2_RX||rowspan=7|H14 ||CSI_DATA9 ||rowspan=7|3.3V
 +
|-
 +
|ECSPI3_MISO
 +
|-
 +
|ENET1_COL
 +
|-
 +
|FLEXCAN2_RX
 +
|-
 +
|GPIO1_IO23
 +
|-
 +
|GPT1_COMPARE3
 +
|-
 +
|UART2_RTS_B
 +
|-
 +
|rowspan=8|12 ||rowspan=8| CAN2_TX ||rowspan=8| J15 || CSI_DATA8 ||rowspan=8|3.3V
 +
|-
 +
|ECSPI3_MOSI
 +
|-
 +
|ENET1_CRS
 +
|-
 +
|FLEXCAN2_TX
 +
|-
 +
|GPIO1_IO22
 +
|-
 +
|GPT1_COMPARE2
 +
|-
 +
|SJC_DE_B
 +
|-
 +
|UART2_CTS_B
 +
|-
 +
|rowspan=7|13 ||rowspan=7| CAN1_RX||rowspan=7|G14 ||CSI_DATA11 ||rowspan=7|3.3V
 +
|-
 +
|ENET1_EVENT1_OUT
 +
|-
 +
|ENET2_TX_ER
 +
|-
 +
|FLEXCAN1_RX
 +
|-
 +
|GPIO1_IO27
 +
|-
 +
|UART3_RTS_B
 +
|-
 +
|WDOG1_WDOG_B
 +
|-
 +
|rowspan=7|14 ||rowspan=7| CAN1_TX||rowspan=7|H15 ||CSI_DATA10 ||rowspan=7|3.3V
 +
|-
 +
|ENET1_EVENT1_IN
 +
|-
 +
|ENET2_RX_CLK
 +
|-
 +
|EPIT2_OUT
 +
|-
 +
|FLEXCAN1_TX
 +
|-
 +
|GPIO1_IO26
 +
|-
 +
|UART3_CTS_B
 +
|-
 +
|rowspan=8|15||rowspan=8| ENET_MDC||rowspan=8|L16 ||ADC1_IN7 ||rowspan=8|3.3V
 +
|-
 +
|ADC2_IN7
 +
|-
 +
|ENET1_MDC
 +
|-
 +
|ENET2_MDC
 +
|-
 +
|CSI_PIXCLK
 +
|-
 +
|GPIO1_IO07
 +
|-
 +
|UART1_RTS_B
 +
|-
 +
|USDHC2_CD_B
 +
|-
 +
|rowspan=9|16||rowspan=9| ENET_MDIO||rowspan=9|K17 ||ADC1_IN6 ||rowspan=9|3.3V
 +
|-
 +
|ADC2_IN6
 +
|-
 +
|CCM_REF_EN_8
 +
|-
 +
|CSI_MCLK
 +
|-
 +
|ENET1_MDIO
 +
|-
 +
|ENET2_MDIO
 +
|-
 +
|GPIO1_IO06
 +
|-
 +
|UART1_CTS_B
 +
|-
 +
|USDHC2_WP
 +
|-
 +
|rowspan=8|17||rowspan=8| ENET1_TXD1||rowspan=8|E14 ||CSI_DATA20 ||rowspan=8|3.3V
 +
|-
 +
|ENET1_TDATA1
 +
|-
 +
|ENET2_MDIO
 +
|-
 +
|GPIO2_IO4
 +
|-
 +
|KPP_ROW2
 +
|-
 +
|PWM5_OUT
 +
|-
 +
|UART6_CTS_B
 +
|-
 +
|WDOG1_WDOG_RST_B_DEB
 +
|-
 +
|rowspan=8|18 ||rowspan=8| ENET1_TXEN||rowspan=8| F15|| CSI_DATA21 ||rowspan=8|3.3V
 +
|-
 +
|ENET1_TX_EN
 +
|-
 +
|ENET2_MDC
 +
|-
 +
|GPIO2_IO5
 +
|-
 +
|KPP_COL2
 +
|-
 +
|PWM6_OUT
 +
|-
 +
|UART6_RTS_B
 +
|-
 +
|WDOG2_WDOG_RST_B_DEB
 +
|-
 +
|rowspan=8|19 ||rowspan=8| ENET1_RXD0||rowspan=8| F16|| CSI_DATA16 ||rowspan=8|3.3V
 +
|-
 +
|ENET1_RDATA0
 +
|-
 +
|FLEXCAN1_TX
 +
|-
 +
|GPIO2_IO0
 +
|-
 +
|KPP_ROW0
 +
|-
 +
|PWM1_OUT
 +
|-
 +
|UART4_RTS_B
 +
|-
 +
|USDHC1_LCTL
 +
|-
 +
|rowspan=7|20 ||rowspan=7| ENET1_TXD0||rowspan=7|E15 ||CSI_DATA19  ||rowspan=7|3.3V
 +
|-
 +
|ENET1_TDATA0
 +
|-
 +
|FLEXCAN2_RX
 +
|-
 +
|GPIO2_IO3
 +
|-
 +
|KPP_COL1
 +
|-
 +
|UART5_CTS_B
 +
|-
 +
|USDHC2_VSELECT
 +
|-
 +
|rowspan=8|21 ||rowspan=8| ENET1_RXD1||rowspan=8| E17|| CSI_DATA17 ||rowspan=8|3.3V
 +
|-
 +
|ENET1_RDATA1
 +
|-
 +
|FLEXCAN1_RX
 +
|-
 +
|GPIO2_IO1
 +
|-
 +
|KPP_COL0
 +
|-
 +
|PWM2_OUT
 +
|-
 +
|UART4_CTS_B
 +
|-
 +
|USDHC2_LCTL
 +
|-
 +
|rowspan=8|22 ||rowspan=8| ENET1_TX_CLK||rowspan=8| F14 || CSI_DATA22 ||rowspan=8|3.3V
 +
|-
 +
|ENET1_TX_CLK
 +
|-
 +
|GPIO2_IO6
 +
|-
 +
|GPT1_CLK
 +
|-
 +
|KPP_ROW3
 +
|-
 +
|PWM7_OUT
 +
|-
 +
|UART7_CTS_B
 +
|-
 +
|XTALOSC_REF_CLK1
 +
|-
 +
|rowspan=7|23 ||rowspan=7| ENET1_CRS_DV ||rowspan=7| E16|| CSI_DATA18 ||rowspan=7|3.3V
 +
|-
 +
|ENET1_RX_EN
 +
|-
 +
|FLEXCAN2_TX
 +
|-
 +
|GPIO2_IO2
 +
|-
 +
|KPP_ROW1
 +
|-
 +
|UART5_RTS_B
 +
|-
 +
|USDHC1_VSELECT
 +
|-
 +
|rowspan=8|24 ||rowspan=8| ENET1_RXER ||rowspan=8|D15 ||CSI_DATA23 ||rowspan=8|3.3V
 +
|-
 +
|EIM_CRE
 +
|-
 +
|ENET1_RX_ER
 +
|-
 +
|GPIO2_IO7
 +
|-
 +
|GPT1_CAPTURE2
 +
|-
 +
|KPP_COL3
 +
|-
 +
|PWM8_OUT
 +
|-
 +
|UART7_RTS_B
 +
|-
 +
|rowspan=7|25 ||rowspan=7| UART1_RXD ||rowspan=7|K16 ||CSI_DATA3  ||rowspan=7|3.3V
 +
|-
 +
|ENET1_RDATA3
 +
|-
 +
|GPIO1_IO17
 +
|-
 +
|GPT1_CLK
 +
|-
 +
|I2C3_SDA
 +
|-
 +
|SPDIF_IN
 +
|-
 +
|UART1_RX_DATA
 +
|-
 +
|rowspan=7|26 ||rowspan=7| UART1_CTS ||rowspan=7|K15 || CSI_DATA4  ||rowspan=7|3.3V
 +
|-
 +
|ENET1_RX_CLK
 +
|-
 +
|ENET2_1588_EVENT1_IN
 +
|-
 +
|GPIO1_IO18
 +
|-
 +
|UART1_CTS_B
 +
|-
 +
|USDHC1_WP
 +
|-
 +
|USDHC2_WP
 +
|-
 +
|rowspan=7|27 ||rowspan=7| UART1_TXD ||rowspan=7|K14 || CSI_DATA2  ||rowspan=7|3.3V
 +
|-
 +
|ENET1_RDATA2
 +
|-
 +
|GPIO1_IO16
 +
|-
 +
|GPT1_COMPARE1
 +
|-
 +
|I2C3_SCL
 +
|-
 +
|SPDIF_OUT
 +
|-
 +
|UART1_TX_DATA
 +
|-
 +
|rowspan=7|28 ||rowspan=7| UART1_RTS ||rowspan=7|J14 || CSI_DATA5  ||rowspan=7|3.3V
 +
|-
 +
|ENET1_TX_ER
 +
|-
 +
|ENET2_1588_EVENT1_OUT
 +
|-
 +
|GPIO1_IO19
 +
|-
 +
|UART1_RTS_B
 +
|-
 +
|USDHC1_CD_B
 +
|-
 +
|USDHC2_CD_B
 +
|-
 +
|rowspan=7|29 ||rowspan=7| UART2_TXD ||rowspan=7|J17 || CSI_DATA6  ||rowspan=7|3.3V
 +
|-
 +
|ECSPI3_SS0
 +
|-
 +
|ENET1_TDATA2
 +
|-
 +
|GPIO1_IO20
 +
|-
 +
|GPT1_CAPTURE1
 +
|-
 +
|I2C4_SCL
 +
|-
 +
|UART2_TX_DATA
 +
|-
 +
|rowspan=7|30 ||rowspan=7| UART2_RXD ||rowspan=7|J16 || CSI_DATA7||rowspan=7|3.3V
 +
|-
 +
|ECSPI3_SCLK
 +
|-
 +
|ENET1_TDATA3
 +
|-
 +
|GPIO1_IO21
 +
|-
 +
|GPT1_CAPTURE2
 +
|-
 +
|I2C4_SDA
 +
|-
 +
|UART2_RX_DATA
 +
|-
 +
|rowspan=7|31 ||rowspan=7| UART3_TXD ||rowspan=7|H17 || CSI_DATA1||rowspan=7|3.3V
 +
|-
 +
|ENET2_RDATA2
 +
|-
 +
|GPIO1_IO24
 +
|-
 +
|SIM1_PORT0_PD
 +
|-
 +
|UART2_CTS_B
 +
|-
 +
|UART3_TX_DATA
 +
|-
 +
|USB_OTG1_ID
 +
|-
 +
|rowspan=7|32 ||rowspan=7| UART3_RXD ||rowspan=7|H16 || CSI_DATA0 ||rowspan=7|3.3V
 +
|-
 +
|ENET2_RDATA3
 +
|-
 +
|EPIT1_OUT
 +
|-
 +
|GPIO1_IO25
 +
|-
 +
|SIM2_PORT0_PD
 +
|-
 +
|UART2_RTS_B
 +
|-
 +
|UART3_RX_DATA
 +
|-
 +
|rowspan=6|33 ||rowspan=6| UART4_TXD ||rowspan=6|G17 || CSI_DATA12 ||rowspan=6|3.3V
 +
|-
 +
|ECSPI2_SCLK
 +
|-
 +
|ENET2_TDATA2
 +
|-
 +
|GPIO1_IO28
 +
|-
 +
|I2C1_SCL
 +
|-
 +
|UART4_TX_DATA
 +
|-
 +
|rowspan=6|34 ||rowspan=6| UART4_RXD ||rowspan=6|G16 || CSI_DATA13 ||rowspan=6|3.3V
 +
|-
 +
|ECSPI2_SS0
 +
|-
 +
|ENET2_TDATA3
 +
|-
 +
|GPIO1_IO29
 +
|-
 +
|I2C1_SDA
 +
|-
 +
|UART4_RX_DATA
 +
|-
 +
|rowspan=6|35 ||rowspan=6| UART5_TXD ||rowspan=6|F17 || CSI_DATA14 ||rowspan=6|3.3V
 +
|-
 +
|ECSPI2_MOSI
 +
|-
 +
|ENET2_CRS
 +
|-
 +
|GPIO1_IO30
 +
|-
 +
|I2C2_SCL
 +
|-
 +
|UART5_TX_DATA
 +
|-
 +
|rowspan=6|36 ||rowspan=6| UART5_RXD ||rowspan=6|G13 || CSI_DATA15 ||rowspan=6|3.3V
 +
|-
 +
|ECSPI2_MISO
 +
|-
 +
|ENET2_COL
 +
|-
 +
|GPIO1_IO31
 +
|-
 +
|I2C2_SDA
 +
|-
 +
|UART5_RX_DATA
 +
|-
 +
|rowspan=8|37 ||rowspan=8| UART8_RTS ||rowspan=8| D16 ||ECSPI4_SS0 ||rowspan=8|3.3V
 +
|-
 +
|EIM_ADDR25
 +
|-
 +
|ENET2_RX_ER
 +
|-
 +
|GPIO2_IO15
 +
|-
 +
|KPP_COL7
 +
|-
 +
|SIM2_PORT0_SVEN
 +
|-
 +
|UART8_RTS_B
 +
|-
 +
|WDOG1_WDOG_ANY
 +
|-
 +
|rowspan=8|38 ||rowspan=8| UART6_RXD ||rowspan=8| C16 || ENET1_MDC ||rowspan=8|3.3V
 +
|-
 +
|ENET2_RDATA1
 +
|-
 +
|GPIO2_IO9
 +
|-
 +
|I2C3_SDA
 +
|-
 +
|KPP_COL4
 +
|-
 +
|SIM1_PORT0_CLK
 +
|-
 +
|UART6_RX_DATA
 +
|-
 +
|USB_OTG1_OC
 +
|-
 +
|rowspan=8|39 ||rowspan=8| UART8_CTS ||rowspan=8| D17 ||ECSPI4_MISO ||rowspan=8|3.3V
 +
|-
 +
|ENET2_TX_CLK
 +
|-
 +
|GPIO2_IO14
 +
|-
 +
|KPP_ROW7
 +
|-
 +
|SIM2_PORT0_RST_B
 +
|-
 +
|UART8_CTS_B
 +
|-
 +
|USB_OTG2_ID
 +
|-
 +
|XTALOSC_REF_CLK2
 +
|-
 +
|rowspan=8|40 ||rowspan=8| UART6_TXD ||rowspan=8| C17 || ENET1_MDIO ||rowspan=8|3.3V
 +
|-
 +
|ENET2_RDATA0
 +
|-
 +
|GPIO2_IO8
 +
|-
 +
|I2C3_SCL
 +
|-
 +
|KPP_ROW4
 +
|-
 +
|SIM1_PORT0_TRXD
 +
|-
 +
|UART6_TX_DATA
 +
|-
 +
|USB_OTG1_PWR
 +
|-
 +
|rowspan=8|41 ||rowspan=8| UART8_RXD ||rowspan=8| B15 || ECSPI4_MOSI ||rowspan=8|3.3V
 +
|-
 +
|EIM_ACLK_FREERUN
 +
|-
 +
|ENET2_TX_EN
 +
|-
 +
|GPIO2_IO13
 +
|-
 +
|KPP_COL6
 +
|-
 +
|SIM2_PORT0_CLK
 +
|-
 +
|UART8_RX_DATA
 +
|-
 +
|USB_OTG2_OC
 +
|-
 +
|rowspan=8|42 ||rowspan=8| UART7_TXD ||rowspan=8| B17 || EIM_ADDR26 ||rowspan=8|3.3V
 +
|-
 +
|ENET2_RX_EN
 +
|-
 +
|GPIO2_IO10
 +
|-
 +
|I2C4_SCL
 +
|-
 +
|KPP_ROW5
 +
|-
 +
|SIM1_PORT0_RST_B
 +
|-
 +
|UART7_TX_DATA
 +
|-
 +
|XTALOSC_ENET_REF_CLK_25M
 +
|-
 +
|rowspan=8|43 ||rowspan=8| UART8_TXD ||rowspan=8| A16 || ECSPI4_SCLK ||rowspan=8|3.3V
 +
|-
 +
|EIM_EB3_B
 +
|-
 +
|ENET2_TDATA1
 +
|-
 +
|GPIO2_IO12
 +
|-
 +
|KPP_ROW6
 +
|-
 +
|SIM2_PORT0_TRXD
 +
|-
 +
|UART8_TX_DATA
 +
|-
 +
|USB_OTG2_PWR
 +
|-
 +
|rowspan=7|44 ||rowspan=7| UART7_RXD ||rowspan=7|A15 || EIM_EB2_B ||rowspan=7|3.3V
 +
|-
 +
|ENET2_TDATA0
 +
|-
 +
|GPIO2_IO11
 +
|-
 +
|I2C4_SDA
 +
|-
 +
|KPP_COL5
 +
|-
 +
|SIM1_PORT0_SVEN
 +
|-
 +
|UART7_RX_DATA
 +
|-
 +
|45||GND  || --- || --- ||---
 +
|-
 +
|46||rowspan=3| 5VIN ||rowspan=3| --- || rowspan=3|--- ||rowspan=3|5V（input）
 +
|-
 +
|47
 +
|-
 +
|48
 +
|-
 +
|49|| DCDC_3V3 || --- || 30mA (Use for LED or Power enable) ||3.3V(output)
 +
|-
 +
|50||VDD_SNVS_IN || --- ||5mA(Only use for Boot Mode) ||3.3V(output)
 +
|-
 +
|51||GND  || --- || --- ||---
 +
|-
 +
|52||GND  || --- || --- ||---
 +
|-
 +
|rowspan=8|53 ||rowspan=8| LCD_DATA23 ||rowspan=8| B16 || CSI_DATA15 ||rowspan=8|3.3V
 +
|-
 +
|ECSPI1_MISO
 +
|-
 +
|EIM_DATA15
 +
|-
 +
|GPIO3_IO28
 +
|-
 +
|LCDIF_DATA23
 +
|-
 +
|MQS_LEFT
 +
|-
 +
|SRC_BT_CFG31
 +
|-
 +
|USDHC2_DATA3
 +
|-
 +
|rowspan=8|54 ||rowspan=8| LCD_DATA19 ||rowspan=8| D14 || CSI_DATA11 ||rowspan=8|3.3V
 +
|-
 +
|EIM_DATA11
 +
|-
 +
|GPIO3_IO24
 +
|-
 +
|LCDIF_DATA19
 +
|-
 +
|PWM6_OUT
 +
|-
 +
|SRC_BT_CFG27
 +
|-
 +
|USDHC2_CLK
 +
|-
 +
|WDOG1_WDOG_ANY
 +
|-
 +
|rowspan=8|55 ||rowspan=8|LCD_DATA20 ||rowspan=8| C14 || CSI_DATA12 ||rowspan=8|3.3V
 +
|-
 +
|ECSPI1_SCLK
 +
|-
 +
|EIM_DATA12
 +
|-
 +
|GPIO3_IO25
 +
|-
 +
|LCDIF_DATA20
 +
|-
 +
|SRC_BT_CFG28
 +
|-
 +
|UART8_TX_DATA
 +
|-
 +
|USDHC2_DATA0
 +
|-
 +
|rowspan=8|56 ||rowspan=8| LCD_DATA21 ||rowspan=8| B14 || CSI_DATA13 ||rowspan=8|3.3V
 +
|-
 +
|ECSPI1_SS0
 +
|-
 +
|EIM_DATA13
 +
|-
 +
|GPIO3_IO26
 +
|-
 +
|LCDIF_DATA21
 +
|-
 +
|SRC_BT_CFG29
 +
|-
 +
|UART8_RX_DATA
 +
|-
 +
|USDHC2_DATA1
 +
|-
 +
|rowspan=8|57 ||rowspan=8| LCD_DATA22 ||rowspan=8| A14 || CSI_DATA14 ||rowspan=8|3.3V
 +
|-
 +
|ECSPI1_MOSI
 +
|-
 +
|EIM_DATA14
 +
|-
 +
|GPIO3_IO27
 +
|-
 +
|LCDIF_DATA22
 +
|-
 +
|MQS_RIGHT
 +
|-
 +
|SRC_BT_CFG30
 +
|-
 +
|USDHC2_DATA2
 +
|-
 +
|rowspan=8|58 ||rowspan=8| LCD_DATA17 ||rowspan=8| B13 || ARM_PLATFORM_TRACE_CTL||rowspan=8|3.3V
 +
|-
 +
|CSI_DATA0
 +
|-
 +
|EIM_DATA9
 +
|-
 +
|GPIO3_IO22
 +
|-
 +
|LCDIF_DATA17
 +
|-
 +
|SRC_BT_CFG25
 +
|-
 +
|UART7_RX_DATA
 +
|-
 +
|USDHC2_DATA7
 +
|-
 +
|rowspan=8|59 ||rowspan=8| LCD_DATA18 ||rowspan=8| A13 || ARM_PLATFORM_EVENTO ||rowspan=8|3.3V
 +
|-
 +
|CSI_DATA10
 +
|-
 +
|EIM_DATA10
 +
|-
 +
|GPIO3_IO23
 +
|-
 +
|LCDIF_DATA18
 +
|-
 +
|PWM5_OUT
 +
|-
 +
|SRC_BT_CFG26
 +
|-
 +
|USDHC2_CMD
 +
|-
 +
|rowspan=8|60 ||rowspan=8| LCD_DATA13 ||rowspan=8| B12 || ARM_PLATFORM_TRACE13 ||rowspan=8|3.3V
 +
|-
 +
|CSI_DATA21
 +
|-
 +
|EIM_DATA5
 +
|-
 +
|GPIO3_IO18
 +
|-
 +
|LCDIF_DATA13
 +
|-
 +
|SAI3_TX_BCLK
 +
|-
 +
|SRC_BT_CFG13
 +
|-
 +
|USDHC2_RESET_B
 +
|-
 +
|rowspan=8|61 ||rowspan=8| LCD_DATA14 ||rowspan=8| A12 || ARM_PLATFORM_TRACE14 ||rowspan=8|3.3V
 +
|-
 +
|CSI_DATA22
 +
|-
 +
|EIM_DATA6
 +
|-
 +
|GPIO3_IO19
 +
|-
 +
|LCDIF_DATA14
 +
|-
 +
|SAI3_RX_DATA
 +
|-
 +
|SRC_BT_CFG14
 +
|-
 +
|USDHC2_DATA4
 +
|-
 +
|rowspan=8|62 ||rowspan=8| LCD_DATA8 ||rowspan=8| B11 || ARM_PLATFORM_TRACE8 ||rowspan=8|3.3V
 +
|-
 +
|CSI_DATA16
 +
|-
 +
|EIM_DATA0
 +
|-
 +
|FLEXCAN1_TX
 +
|-
 +
|GPIO3_IO13
 +
|-
 +
|LCDIF_DATA8
 +
|-
 +
|SRC_BT_CFG8
 +
|-
 +
|SPDIF_IN
 +
|-
 +
|rowspan=8|63 ||rowspan=8| LCD_DATA9 ||rowspan=8| A11 || ARM_PLATFORM_TRACE9 ||rowspan=8|3.3V
 +
|-
 +
|CSI_DATA17
 +
|-
 +
|EIM_DATA1
 +
|-
 +
|FLEXCAN1_RX
 +
|-
 +
|GPIO3_IO14
 +
|-
 +
|LCDIF_DATA9
 +
|-
 +
|SAI3_MCLK
 +
|-
 +
|SRC_BT_CFG9
 +
|-
 +
|rowspan=8|64 ||rowspan=8| LCD_DATA7 ||rowspan=8| D11 || ARM_PLATFORM_TRACE7 ||rowspan=8|3.3V
 +
|-
 +
|ECSPI1_SS3
 +
|-
 +
|ENET2_1588_EVENT3_OUT
 +
|-
 +
|GPIO3_IO12
 +
|-
 +
|LCDIF_DATA7
 +
|-
 +
|SRC_BT_CFG7
 +
|-
 +
|SPDIF_EXT_CLK
 +
|-
 +
|UART7_RTS_B
 +
|-
 +
|rowspan=8|65 ||rowspan=8| LCD_DATA6 ||rowspan=8| A10 || ARM_PLATFORM_TRACE6 ||rowspan=8|3.3V
 +
|-
 +
|ECSPI1_SS2
 +
|-
 +
|ENET2_1588_EVENT3_IN
 +
|-
 +
|GPIO3_IO11
 +
|-
 +
|LCDIF_DATA6
 +
|-
 +
|SRC_BT_CFG6
 +
|-
 +
|SPDIF_LOCK
 +
|-
 +
|UART7_CTS_B
 +
|-
 +
|rowspan=8|66 ||rowspan=8| LCD_DATA5 ||rowspan=8| B10 ||ARM_PLATFORM_TRACE5 ||rowspan=8|3.3V
 +
|-
 +
|ECSPI1_SS1
 +
|-
 +
|ENET2_1588_EVENT2_OUT
 +
|-
 +
|GPIO3_IO10
 +
|-
 +
|LCDIF_DATA5
 +
|-
 +
|SRC_BT_CFG5
 +
|-
 +
|SPDIF_OUT
 +
|-
 +
|UART8_RTS_B
 +
|-
 +
|rowspan=8|67 ||rowspan=8| LCD_DATA4 ||rowspan=8| C10 ||ARM_PLATFORM_TRACE4 ||rowspan=8|3.3V
 +
|-
 +
|ENET2_1588_EVENT2_IN
 +
|-
 +
|GPIO3_IO9
 +
|-
 +
|LCDIF_DATA4
 +
|-
 +
|SAI1_TX_DATA
 +
|-
 +
|SRC_BT_CFG4
 +
|-
 +
|SPDIF_SR_CLK
 +
|-
 +
|UART8_CTS_B
 +
|-
 +
|rowspan=8|68 ||rowspan=8| LCD_DATA0 ||rowspan=8| B9 ||ARM_PLATFORM_TRACE0 ||rowspan=8|3.3V
 +
|-
 +
|ENET1_1588_EVENT2_IN
 +
|-
 +
|GPIO3_IO5
 +
|-
 +
|I2C3_SDA
 +
|-
 +
|LCDIF_DATA0
 +
|-
 +
|PWM1_OUT
 +
|-
 +
|SAI1_MCLK
 +
|-
 +
|SRC_BT_CFG0
 +
|-
 +
|rowspan=8|69 ||rowspan=8| LCD_DATA1 ||rowspan=8| A9 ||ARM_PLATFORM_TRACE1 ||rowspan=8|3.3V
 +
|-
 +
|ENET1_1588_EVENT2_OUT
 +
|-
 +
|GPIO3_IO6
 +
|-
 +
|I2C3_SCL
 +
|-
 +
|LCDIF_DATA1
 +
|-
 +
|PWM2_OUT
 +
|-
 +
|SAI1_TX_SYNC
 +
|-
 +
|SRC_BT_CFG1
 +
|-
 +
|rowspan=8|70 ||rowspan=8| LCD_DATA10 ||rowspan=8| E12 || ARM_PLATFORM_TRACE10 ||rowspan=8|3.3V
 +
|-
 +
|CSI_DATA18
 +
|-
 +
|EIM_DATA2
 +
|-
 +
|FLEXCAN2_TX
 +
|-
 +
|GPIO3_IO15
 +
|-
 +
|LCDIF_DATA10
 +
|-
 +
|SAI3_RX_SYNC
 +
|-
 +
|SRC_BT_CFG10
 +
|-
 +
|rowspan=8|71 ||rowspan=8| LCD_DATA15 ||rowspan=8| D13 || ARM_PLATFORM_TRACE15 ||rowspan=8|3.3V
 +
|-
 +
|CSI_DATA23
 +
|-
 +
|EIM_DATA7
 +
|-
 +
|GPIO3_IO20
 +
|-
 +
|LCDIF_DATA15
 +
|-
 +
|SAI3_TX_DATA
 +
|-
 +
|SRC_BT_CFG15
 +
|-
 +
|USDHC2_DATA5
 +
|-
 +
|rowspan=8|72 ||rowspan=8| LCD_DATA16 ||rowspan=8| C13 || ARM_PLATFORM_TRACE_CLK ||rowspan=8|3.3V
 +
|-
 +
|CSI_DATA1
 +
|-
 +
|EIM_DATA8
 +
|-
 +
|GPIO3_IO21
 +
|-
 +
|LCDIF_DATA16
 +
|-
 +
|SRC_BT_CFG24
 +
|-
 +
|UART7_TX_DATA
 +
|-
 +
|USDHC2_DATA6
 +
|-
 +
|rowspan=8|73 ||rowspan=8| LCD_DATA12 ||rowspan=8| C12 || ARM_PLATFORM_TRACE12 ||rowspan=8|3.3V
 +
|-
 +
|CSI_DATA20
 +
|-
 +
|ECSPI1_RDY
 +
|-
 +
|EIM_DATA4
 +
|-
 +
|GPIO3_IO17
 +
|-
 +
|LCDIF_DATA12
 +
|-
 +
|SAI3_TX_SYNC
 +
|-
 +
|SRC_BT_CFG12
 +
|-
 +
|rowspan=8|74 ||rowspan=8| LCD_DATA11 ||rowspan=8| D12 || ARM_PLATFORM_TRACE11 ||rowspan=8|3.3V
 +
|-
 +
|CSI_DATA19
 +
|-
 +
|EIM_DATA3
 +
|-
 +
|FLEXCAN2_RX
 +
|-
 +
|GPIO3_IO16
 +
|-
 +
|LCDIF_DATA11
 +
|-
 +
|SAI3_RX_BCLK
 +
|-
 +
|SRC_BT_CFG11
 +
|-
 +
|rowspan=8|75 ||rowspan=8| LCD_DATA3 ||rowspan=8| D10 || ARM_PLATFORM_TRACE3 ||rowspan=8|3.3V
 +
|-
 +
|ENET1_1588_EVENT3_OUT
 +
|-
 +
|GPIO3_IO8
 +
|-
 +
|I2C4_SCL
 +
|-
 +
|LCDIF_DATA3
 +
|-
 +
|PWM4_OUT
 +
|-
 +
|SAI1_RX_DATA
 +
|-
 +
|SRC_BT_CFG3
 +
|-
 +
|rowspan=8|76 ||rowspan=8| LCD_DATA2 ||rowspan=8| E10 || ARM_PLATFORM_TRACE2 ||rowspan=8|3.3V
 +
|-
 +
|ENET1_1588_EVENT3_IN
 +
|-
 +
|GPIO3_IO7
 +
|-
 +
|I2C4_SDA
 +
|-
 +
|LCDIF_DATA2
 +
|-
 +
|PWM3_OUT
 +
|-
 +
|SAI1_TX_BCLK
 +
|-
 +
|SRC_BT_CFG2
 +
|-
 +
|rowspan=7|77 ||rowspan=7| LCD_RESET ||rowspan=7| E9 || ARM_PLATFORM_EVENTI ||rowspan=7|3.3V
 +
|-
 +
|ECSPI2_SS3
 +
|-
 +
|GPIO3_IO4
 +
|-
 +
|LCDIF_CS
 +
|-
 +
|LCDIF_RESET
 +
|-
 +
|SAI3_TX_DATA
 +
|-
 +
|WDOG1_WDOG_ANY
 +
|-
 +
|rowspan=7|78 ||rowspan=7| LCD_VSYNC ||rowspan=7| C9 || ECSPI2_SS2 ||rowspan=7|3.3V
 +
|-
 +
|GPIO3_IO3
 +
|-
 +
|LCDIF_BUSY
 +
|-
 +
|LCDIF_VSYNC
 +
|-
 +
|SAI3_RX_SYNC
 +
|-
 +
|UART4_RTS_B
 +
|-
 +
|WDOG2_WDOG_B
 +
|-
 +
|rowspan=7|79 ||rowspan=7| LCD_HSYNC ||rowspan=7| D9 || ECSPI2_SS1 ||rowspan=7|3.3V
 +
|-
 +
|GPIO3_IO2
 +
|-
 +
|LCDIF_HSYNC
 +
|-
 +
|LCDIF_RS
 +
|-
 +
|SAI3_TX_BCLK
 +
|-
 +
|UART4_CTS_B
 +
|-
 +
|WDOG3_WDOG_RST_B_DEB
 +
|-
 +
|rowspan=7|80 ||rowspan=7| LCD_PCLK ||rowspan=7| A8 || EIM_CS2_B ||rowspan=7|3.3V
 +
|-
 +
|GPIO3_IO0
 +
|-
 +
|LCDIF_CLK
 +
|-
 +
|LCDIF_WR_RWN
 +
|-
 +
|SAI3_MCLK
 +
|-
 +
|UART4_TX_DATA
 +
|-
 +
|WDOG1_WDOG_RST_B_DEB
 +
|-
 +
|rowspan=7|81 ||rowspan=7| LCD_DE ||rowspan=7| B8 || ECSPI2_RDY||rowspan=7|3.3V
 +
|-
 +
|EIM_CS3_B
 +
|-
 +
|GPIO3_IO1
 +
|-
 +
|LCDIF_ENABLE
 +
|-
 +
|LCDIF_RD_E
 +
|-
 +
|SAI3_TX_SYNC
 +
|-
 +
|UART4_RX_DATA
 +
|-
 +
|82|| GND || --- || ---||---
 +
|-
 +
|rowspan=8|83 ||rowspan=8| I2C1_SCL ||rowspan=8| E5 || CSI_PIXCLK ||rowspan=8|3.3V
 +
|-
 +
|EIM_OE
 +
|-
 +
|GPIO4_IO18
 +
|-
 +
|I2C1_SCL
 +
|-
 +
|NAND_CE3_B
 +
|-
 +
|SNVS_VIO_5
 +
|-
 +
|UART6_RX_DATA
 +
|-
 +
|USDHC2_WP
 +
|-
 +
|rowspan=8|84 ||rowspan=8| I2C1_SDA ||rowspan=8| F5 || CSI_MCLK ||rowspan=8|3.3V
 +
|-
 +
|EIM_CS0_B
 +
|-
 +
|GPIO4_IO17
 +
|-
 +
|I2C1_SDA
 +
|-
 +
|NAND_CE2_B
 +
|-
 +
|SNVS_VIO_5_CTL
 +
|-
 +
|UART6_TX_DATA
 +
|-
 +
|USDHC2_CD_B
 +
|-
 +
|rowspan=7|85 ||rowspan=7| NAND_CE1N ||rowspan=7| B5 || ECSPI3_MOSI ||rowspan=7|3.3V
 +
|-
 +
|EIM_ADDR18
 +
|-
 +
|GPIO4_IO14
 +
|-
 +
|NAND_CE1_B
 +
|-
 +
|QSPI_A_DATA2
 +
|-
 +
|UART3_CTS_B
 +
|-
 +
|USDHC1_DATA6
 +
|-
 +
|rowspan=7|86 ||rowspan=7| SD1_CLK ||rowspan=7| C1 || EIM_ADDR20 ||rowspan=7|3.3V
 +
|-
 +
|GPIO2_IO17
 +
|-
 +
|GPT2_COMPARE2
 +
|-
 +
|SAI2_MCLK
 +
|-
 +
|SPDIF_IN
 +
|-
 +
|USB_OTG1_OC
 +
|-
 +
|USDHC1_CLK
 +
|-
 +
|rowspan=8|87 ||rowspan=8| SD1_DATA3 ||rowspan=8| A2 || CCM_CLKO2 ||rowspan=8|3.3V
 +
|-
 +
|EIM_ADDR24
 +
|-
 +
|FLEXCAN2_RX
 +
|-
 +
|GPIO2_IO21
 +
|-
 +
|GPT2_CAPTURE2
 +
|-
 +
|SAI2_TX_DATA
 +
|-
 +
|USB_OTG2_ID
 +
|-
 +
|USDHC1_DATA3
 +
|-
 +
|rowspan=7|88 ||rowspan=7| SD1_DATA0 ||rowspan=7| B3|| EIM_ADDR21 ||rowspan=7|3.3V
 +
|-
 +
|FLEXCAN1_TX
 +
|-
 +
|GPIO2_IO18
 +
|-
 +
|GPT2_COMPARE3
 +
|-
 +
|SAI2_TX_SYNC
 +
|-
 +
|USB_OTG1_ID
 +
|-
 +
|USDHC1_DATA0
 +
|-
 +
|rowspan=7|89 ||rowspan=7| SD1_DATA1 ||rowspan=7| B2 || EIM_ADDR22 ||rowspan=7|3.3V
 +
|-
 +
|FLEXCAN1_RX
 +
|-
 +
|GPIO2_IO19
 +
|-
 +
|GPT2_CLK
 +
|-
 +
|SAI2_TX_BCLK
 +
|-
 +
|USB_OTG2_PWR
 +
|-
 +
|USDHC1_DATA1
 +
|-
 +
|rowspan=8|90 ||rowspan=8| SD1_DATA2 ||rowspan=8| B1 || CCM_CLKO1 ||rowspan=8|3.3V
 +
|-
 +
|EIM_ADDR23
 +
|-
 +
|FLEXCAN2_TX
 +
|-
 +
|GPIO2_IO20
 +
|-
 +
|GPT2_CAPTURE1
 +
|-
 +
|SAI2_RX_DATA
 +
|-
 +
|USB_OTG2_OC
 +
|-
 +
|USDHC1_DATA2
 +
|-
 +
|rowspan=8|91 ||rowspan=8| SD1_CMD ||rowspan=8| C2 || EIM_ADDR19 ||rowspan=8|3.3V
 +
|-
 +
|GPIO2_IO16
 +
|-
 +
|GPT2_COMPARE1
 +
|-
 +
|SAI2_RX_SYNC
 +
|-
 +
|SDMA_EXT_EVENT0
 +
|-
 +
|SPDIF_OUT
 +
|-
 +
|USB_OTG1_PWR
 +
|-
 +
|USDHC1_CMD
 +
|-
 +
|92|| GND || --- || ---||---
 +
|-
 +
|rowspan=8|93 ||rowspan=8| ECSPI1_MOSI ||rowspan=8| D2 || CSI_DATA8 ||rowspan=8|3.3V
 +
|-
 +
|ECSPI1_MOSI
 +
|-
 +
|EIM_AD6
 +
|-
 +
|GPIO4_IO27
 +
|-
 +
|SAI1_RX_DATA
 +
|-
 +
|SIM2_PORT1_SVEN
 +
|-
 +
|USDHC1_RESET_B
 +
|-
 +
|USDHC2_DATA6
 +
|-
 +
|rowspan=8|94 ||rowspan=8| ECSPI2_MOSI ||rowspan=8| E2 || CSI_DATA4 ||rowspan=8|3.3V
 +
|-
 +
|ECSPI2_MOSI
 +
|-
 +
|EIM_AD2
 +
|-
 +
|GPIO4_IO23
 +
|-
 +
|SAI1_RX_SYNC
 +
|-
 +
|SIM1_PORT1_TRXD
 +
|-
 +
|UART5_RTS_B
 +
|-
 +
|USDHC2_DATA2
 +
|-
 +
|rowspan=8|95 ||rowspan=8| ECSPI1_MISO ||rowspan=8| D1 || CSI_DATA9 ||rowspan=8|3.3V
 +
|-
 +
|ECSPI1_MISO
 +
|-
 +
|EIM_AD7
 +
|-
 +
|GPIO4_IO28
 +
|-
 +
|SAI1_TX_DATA
 +
|-
 +
|SIM2_PORT1_TRXD
 +
|-
 +
|USDHC1_VSELECT
 +
|-
 +
|USDHC2_DATA7
 +
|-
 +
|rowspan=8|96 ||rowspan=8| ECSPI1_SCLK ||rowspan=8| D4 || CSI_DATA6 ||rowspan=8|3.3V
 +
|-
 +
|ECSPI1_SCLK
 +
|-
 +
|EIM_AD4
 +
|-
 +
|GPIO4_IO25
 +
|-
 +
|SAI1_TX_SYNC
 +
|-
 +
|SIM2_PORT1_CLK
 +
|-
 +
|USDHC1_WP
 +
|-
 +
|USDHC2_DATA4
 +
|-
 +
|rowspan=7|97 ||rowspan=7| ECSPI2_SCLK ||rowspan=7| E4|| CSI_DATA2 ||rowspan=7|3.3V
 +
|-
 +
|ECSPI2_SCLK
 +
|-
 +
|EIM_AD0
 +
|-
 +
|GPIO4_IO21
 +
|-
 +
|SIM1_PORT1_RST_B
 +
|-
 +
|UART5_TX_DATA
 +
|-
 +
|USDHC2_DATA0
 +
|-
 +
|rowspan=8|98 ||rowspan=8| ECSPI1_CS0 ||rowspan=8| D3 || CSI_DATA7 ||rowspan=8|3.3V
 +
|-
 +
|ECSPI1_SS0
 +
|-
 +
|EIM_AD5
 +
|-
 +
|GPIO4_IO26
 +
|-
 +
|SAI1_TX_BCLK
 +
|-
 +
|SIM2_PORT1_RST_B
 +
|-
 +
|USDHC1_CD_B
 +
|-
 +
|USDHC2_DATA5
 +
|-
 +
|rowspan=8|99 ||rowspan=8| ECSPI2_CS0 ||rowspan=8| E3 || CSI_DATA3 ||rowspan=8|3.3V
 +
|-
 +
|ECSPI2_SS0
 +
|-
 +
|EIM_AD1
 +
|-
 +
|GPIO4_IO22
 +
|-
 +
|SAI1_MCLK
 +
|-
 +
|SIM1_PORT1_SVEN
 +
|-
 +
|UART5_RX_DATA
 +
|-
 +
|USDHC2_DATA1
 +
|-
 +
|rowspan=8|100 ||rowspan=8| ECSPI2_MIS0 ||rowspan=8| E1 || CSI_DATA5 ||rowspan=8|3.3V
 +
|-
 +
|ECSPI2_MISO
 +
|-
 +
|EIM_AD3
 +
|-
 +
|GPIO4_IO24
 +
|-
 +
|SAI1_RX_BCLK
 +
|-
 +
|SIM2_PORT1_PD
 +
|-
 +
|UART5_CTS_B
 +
|-
 +
|USDHC2_DATA3
 +
|-
 +
|101|| GND || --- || ---||---
 +
|-
 +
|rowspan=8|102 ||rowspan=8| I2C2_SCL||rowspan=8| F3 || CSI_HSYNC ||rowspan=8|3.3V
 +
|-
 +
|EIM_LBA_B
 +
|-
 +
|GPIO4_IO2
 +
|-
 +
|I2C2_SCL
 +
|-
 +
|PWM8_OUT
 +
|-
 +
|SIM1_PORT1_PD
 +
|-
 +
|UART6_CTS_B
 +
|-
 +
|USDHC2_CMD
 +
|-
 +
|rowspan=8|103 ||rowspan=8| I2C2_SDA||rowspan=8| F2 || CSI_VSYNC ||rowspan=8|3.3V
 +
|-
 +
|EIM_RW
 +
|-
 +
|GPIO4_IO19
 +
|-
 +
|I2C2_SDA
 +
|-
 +
|PWM7_OUT
 +
|-
 +
|SIM1_PORT1_CLK
 +
|-
 +
|UART6_RTS_B
 +
|-
 +
|USDHC2_CLK
 +
|-
 +
|104||rowspan=3| GND ||rowspan=3| --- || rowspan=3|---||rowspan=3|---
 +
|-
 +
|105
 +
|-
 +
|106
 +
|-
 +
|rowspan=2|107||rowspan=2|SNVS_TAMPER5||rowspan=2| N8 ||GPIO5_IO05 ||rowspan=2|3.3V
 +
|-
 +
|SNVS_TAMPER5
 +
|-
 +
|rowspan=2|108||rowspan=2|SNVS_TAMPER8||rowspan=2| N9 ||GPIO5_IO08 ||rowspan=2|3.3V
 +
|-
 +
|SNVS_TAMPER8
 +
|-
 +
|rowspan=2|109||rowspan=2|SNVS_TAMPER1||rowspan=2| R9 ||GPIO5_IO01 ||rowspan=2|3.3V
 +
|-
 +
|SNVS_TAMPER1
 +
|-
 +
|rowspan=2|110||rowspan=2|SNVS_TAMPER4||rowspan=2| P9 ||GPIO5_IO04 ||rowspan=2|3.3V
 +
|-
 +
|SNVS_TAMPER4
 +
|-
 +
|rowspan=2|111||rowspan=2|SNVS_TAMPER3||rowspan=2| P10||GPIO5_IO03 ||rowspan=2|3.3V
 +
|-
 +
|SNVS_TAMPER3
 +
|-
 +
|rowspan=2|112||rowspan=2|SNVS_TAMPER7||rowspan=2| N10||GPIO5_IO07 ||rowspan=2|3.3V
 +
|-
 +
|SNVS_TAMPER7
 +
|-
 +
|rowspan=2|113||rowspan=2|SNVS_TAMPER0||rowspan=2| R10||GPIO5_IO00 ||rowspan=2|3.3V
 +
|-
 +
|SNVS_TAMPER0
 +
|-
 +
|rowspan=2|114||rowspan=2|SNVS_TAMPER2||rowspan=2| P11||GPIO5_IO02 ||rowspan=2|3.3V
 +
|-
 +
|SNVS_TAMPER2
 +
|-
 +
|rowspan=2|115||rowspan=2|SNVS_TAMPER6||rowspan=2| N11||GPIO5_IO06 ||rowspan=2|3.3V
 +
|-
 +
|SNVS_TAMPER6
 +
|-
 +
|rowspan=2|116||rowspan=2|SNVS_TAMPER9||rowspan=2|R6 ||GPIO5_IO09 ||rowspan=2|3.3V
 +
|-
 +
|SNVS_TAMPER9
 +
|-
 +
|117|| GND || --- || ---||---
 +
|-
 +
|118|| PMIC_ON_REQ || T9 ||SNVS_PMIC_ON_REQ||3.3V
 +
|-
 +
|119|| ONOFF || R8||NC ||3.3V
 +
|-
 +
|120|| POR_B || P8||RESET ||3.3V
 +
|-
 +
|121|| BOOT_MODE1 || U10||SRC_BOOT_MODE1  ||3.3V
 +
|-
 +
|122|| BOOT_MODE0 || T10||SRC_BOOT_MODE0  ||3.3V
 +
|-
 +
|123|| GND || --- || ---||---
 +
|-
 +
|124|| USB_OTG2_VBUS || U12 ||USB_VBUS || 5V(input)
 +
|-
 +
|125|| USB_OTG2_DP|| U13 || USB_OTG2_DP || 3.3V
 +
|-
 +
|126|| USB_OTG2_DN|| T13 || USB_OTG2_DN || 3.3V
 +
|-
 +
|127|| GND || --- || ---||---
 +
|-
 +
|128|| USB_OTG1_VBUS || T12 ||USB_VBUS || 5V(input)
 +
|-
 +
|129|| USB_OTG1_DP|| U15 || USB_OTG1_DP || 3.3V
 +
|-
 +
|130|| USB_OTG1_DN|| T15 || USB_OTG1_DN || 3.3V
 +
|-
 +
|131|| GND || --- || ---||---
 +
|-
 +
|132|| NUSB_OTG_CHD || U16 || NC||3.3V
 +
|-
 +
|rowspan=10|133||rowspan=10|USB_OTG1_ID||rowspan=10| K13 || ADC_ADC1_IN0 ||rowspan=10|3.3V
 +
|-
 +
|ADC_ADC2_IN0
 +
|-
 +
|ENET1_1588_EVENT0_IN
 +
|-
 +
|GPIO1_IO0
 +
|-
 +
|GPT1_CAPTURE1
 +
|-
 +
|I2C2_SCL
 +
|-
 +
|MQS_RIGHT
 +
|-
 +
|USB_OTG1_ID
 +
|-
 +
|WDOG3_WDOG_B
 +
|-
 +
|XTALOSC_REF_CLK1
 +
|-
 +
|rowspan=5|134||rowspan=5|JTAG_NTRST || rowspan=5|N14 ||GPIO1_IO15||rowspan=5|3.3V
 +
|-
 +
|GPT2_COMPARE3
 +
|-
 +
|PWM8_OUT
 +
|-
 +
|SAI2_TX_DATA
 +
|-
 +
|SJC_TRSTB
 +
|-
 +
|rowspan=7|135||rowspan=7|JTAG_TMS ||rowspan=7| P14 ||CCM_CLKO1||rowspan=7|3.3V
 +
|-
 +
|EPIT1_OUT
 +
|-
 +
|GPIO1_IO11
 +
|-
 +
|GPT2_CAPTURE1
 +
|-
 +
|SAI2_MCLK
 +
|-
 +
|SDMA_EXT_EVENT1
 +
|-
 +
|SJC_TMS
 +
|-
 +
|rowspan=7|136||rowspan=7|JTAG_MOD ||rowspan=7| P15 || CCM_PMIC_READY ||rowspan=7|3.3V
 +
|-
 +
|GPIO1_IO10
 +
|-
 +
|GPT2_CLK
 +
|-
 +
|SDMA_EXT_EVENT0
 +
|-
 +
|SJC_MOD
 +
|-
 +
|SPDIF_OUT
 +
|-
 +
|XTALOSC_ENET_REF_CLK_25M
 +
|-
 +
|rowspan=6|137||rowspan=6|JTAG_TCK ||rowspan=6| M14 || GPIO1_IO14 ||rowspan=6|3.3V
 +
|-
 +
|GPT2_COMPARE2
 +
|-
 +
|PWM7_OUT
 +
|-
 +
|SAI2_RX_DATA
 +
|-
 +
|SIM2_POWER_FAIL
 +
|-
 +
|SJC_TCK
 +
|-
 +
|rowspan=7|138||rowspan=7|JTAG_TDO ||rowspan=7| N15|| CCM_CLKO2 ||rowspan=7|3.3V
 
|-
 
|-
−
|rowspan=2|ECSPI
+
|EPIT2_OUT
−
|ECSPI1
 
−
|支持
 
−
|1个片选
 
−
|-
 
−
|ECSPI2
 
−
|支持
 
−
|1个片选
 
 
|-
 
|-
−
|ENET
+
|GPIO1_IO12
−
|ENET1
 
−
|支持
 
−
|10/100-Mbps
 
 
|-
 
|-
−
|rowspan=2|FLEXCAN
+
|GPT2_CAPTURE2
−
|FLEXCAN1
 
−
|支持
 
−
|
 
−
|-
 
−
|FLEXCAN2
 
−
|支持
 
−
|
 
 
|-
 
|-
−
|rowspan=3|GPIO
+
|MQS_RIGHT
−
|GPIO1
 
−
|支持
 
−
|2个用于SD1，2个用于ENET1
 
−
|-
 
−
|GPIO4
 
−
|支持
 
−
|1个用于RTC
 
−
|-
 
−
|GPIO5
 
−
|支持
 
−
|9个用于通用GPIO，1个用于触摸
 
 
|-
 
|-
−
|rowspan=2|I2C
+
|SAI2_TX_SYNC
−
|I2C1
 
−
|支持
 
−
|
 
−
|-
 
−
|I2C2
 
−
|支持
 
−
|
 
 
|-
 
|-
−
|eLCDIF
+
|SJC_TDO
−
|LCDIF
 
−
|支持
 
−
|24位
 
 
|-
 
|-
−
|rowspan=3|PWM
+
|rowspan=7|139||rowspan=7|JTAG_TD1 ||rowspan=7| N16|| GPIO1_IO13 ||rowspan=7|3.3V
−
|PWM2
 
−
|支持
 
−
|
 
−
|-
 
−
|PWM4
 
−
|支持
 
−
|用于LCD背光控制
 
−
|-
 
−
|PWM5
 
−
|支持
 
−
|
 
 
|-
 
|-
−
|JTAG
+
|GPT2_COMPARE1
−
|SJC
 
−
|支持
 
−
|
 
 
|-
 
|-
−
|rowspan=4|SRC
+
|MQS_LEFT
−
|ONOFF
 
−
|支持
 
−
|
 
−
|-
 
−
|POR_B
 
−
|支持
 
−
|外部复位信号
 
−
|-
 
−
|BOOT_MODE0
 
−
|支持
 
−
|Boot模式控制
 
−
|-
 
−
|BOOT_MODE1
 
−
|支持
 
−
|Boot模式控制
 
 
|-
 
|-
−
|rowspan=8|UART
+
|PWM6_OUT
−
|UART1
 
−
|支持
 
−
|可支持RS485
 
−
|-
 
−
|UART2
 
−
|支持
 
−
|
 
−
|-
 
−
|UART3
 
−
|支持
 
−
|
 
−
|-
 
−
|UART4
 
−
|支持
 
−
|
 
−
|-
 
−
|UART5
 
−
|支持
 
−
|
 
−
|-
 
−
|UART6
 
−
|支持
 
−
|
 
−
|-
 
−
|UART7
 
−
|支持
 
−
|
 
−
|-
 
−
|UART8
 
−
|支持
 
−
|可支持RS485
 
 
|-
 
|-
−
|rowspan=2|USB
+
|SAI2_TX_BCLK
−
|USB_OTG1
 
−
|支持
 
−
|用作USB OTG接口
 
−
|-
 
−
|USB_OTG2
 
−
|支持
 
−
|用作USB HOST接口
 
 
|-
 
|-
−
|rowspan=2|uSDHC
+
|SIM1_POWER_FAIL
−
|uSDHC1
 
−
|支持
 
−
|4位
 
−
|-
 
−
|uSHDC2
 
−
|支持
 
−
|8位，用于核心板的eMMC
 
 
|-
 
|-
−
|WDOG
+
|SJC_TDI
−
|WDOG1
+
|-
−
|支持
+
|140|| GND || --- || ---||---
−
|
 
 
|}
 
|}
−
 
+
===I.MX6ULZ（6Z)===
−
=== 接口说明 ===
 
−
'''CCM(Clock Control Module):'''<br>
 
−
　　 These modules are responsible for clock.<br>
 
−
'''ECSPI(Enhanced Configurable SPI):'''<br>
 
−
　　 Full-duplex enhanced Synchronous Serial Interface, with data rate up to 52 Mbit/s. It is configurable to support Master/Slave modes, four chip selects to support multiple peripherals. <br>
 
−
'''ENET(Ethernet Controller):'''<br>
 
−
　　 The Ethernet Media Access Controller (MAC) is designed to support 10/100 Mbit/s Et hernet/IEEE 802.3 networks. An external transceiver interface and transceiver function are required to complete the interface to the media. The module has dedicated hardware to support the  IEEE 1588 standard.<br>
 
−
'''FLEXCAN(Flexible Controller Area Network):'''<br>
 
−
　　 The CAN protocol was primarily, but not only, designed to be used as a vehicle serial data bus, meeting the specific requirements of this field: real-time processing, reliable operation in the Electromagnetic interference (EMI) environment of a vehicle, cost-effectiveness and required bandwidth. The FlexCAN module is a full implementation of the CAN protocol specification, Version 2.0 B, which supports both standard and extended message frames. <br>
 
−
'''GPIO(General Purpose I/O Modules):'''<br>
 
−
　　 Used for general purpose input/output to external ICs. Each GPIO module supports  up to 32 bits of I/O.<br>
 
−
'''LCDIF(LCD interface):'''<br>
 
−
　　 The LCDIF is a general purpose display controller used to drive a wide range of display devices varying in size and capability. The LCDIF is designed to support dumb (synchronous 24-bit Parallel RGB interface) and smart (asynchronous parallel MPU interface) LCD devices.<br>
 
−
'''PWM(Pulse Width Modulation):'''<br>
 
−
　　 The pulse-width modulator (PWM) has a 16-bit counter and is optimized to generate sound from stored sample audio images and it can al so generate tones. It uses 16-bit resolution and a 4x16 data FIFO to generate sound.<br>
 
−
'''SJC(System JTAG Controller):'''<br>
 
−
　　 The SJC provides JTAG interface, which complies with JTAG TAP standards, to internal logic. The i.MX 6UltraLite processors use JTAG port for production, testing, and system debugging. In addition, the SJC provides BSR (Boundary Scan Register) standard support, which complies with IEEE1149.1 and IEEE1149.6 standards. The JTAG port must be accessible during platform initial laboratory bring-up, for manufacturing tests and troubleshooting, as well as for software debugging by authorized entities.<br>
 
−
'''UART(UART Interface):'''<br>
 
−
　　 Each of the UART modules support the following serial data transmit/receive protocols and configurations: <br>
 
−
　• 7- or 8-bit data words, 1 or 2 stop bits, programmable parity (even, odd or none)<br>
 
−
　• Programmable baud rates up to 5 Mbps.<br>
 
−
　• 32-byte FIFO on Tx and 32 half-word FIFO on Rx supporting auto-baud<br>
 
−
'''uSDHC(Ultra Secured Digital Host Controller):''' <br>
 
−
　　 i.MX 6UltraLite specif ic SoC characteristics:<br>
 
−
　　 All four MMC/SD/SDIO controller IPs are identical and are based on the uSDHC IP. They are:<br>
 
−
　　　• Fully compliant with MMC command/response sets and Physical Layer as defined in the Multimedia Card System Specification, v4.5/4.2/4.3/4.4/4.41/ including high-capacity (size > 2 GB) cards HC MMC. <br>
 
−
　　　• Fully compliant with SD command/response sets and Physical Layer as defined in the SD Memory Card Specifications, v3.0 including high-capacity SDXC cards up to 2 TB.<br>
 
−
　　　• Fully compliant with SDIO command/response sets and interrupt/read-wait mode as defined in the SDIO Card Specification, Part E1, v3.0<br>
 
−
　　 Two ports support:<br>
 
−
　　　• 1-bit or 4-bit transfer mode specifications for SD and SDIO cards up to UHS-I SDR104 mode (104 MB/s max)<br>
 
−
　　　• 1-bit, 4-bit, or 8-bit transfer mode specifications for MMC cards up to 52 MHz in both SDR and DDR modes (104 MB/s max)<br>
 
−
　　　• 4-bit or 8-bit transfer mode specifications for eMMC chips up to 200 MHz in HS200 mode (200 MB/s max)<br>
 
−
'''USB(Universal Serial Bus 2.0):'''<br>
 
−
　　 USBO2 (USB OTG1 and USB OTG2) contains:<br>
 
−
　　　• Two high-speed OTG 2.0 modules with integrated HS USB PHYs<br>
 
−
　　　• Support eight Transmit (TX) and eight Receive (Rx) endpoints, including endpoint 0<br>
 
−
'''WDOG(Watch Dog):'''<br>
 
−
　　 The Watch Dog Timer supports two comparison points during each counting period. Each of the comparison points is configurable to evoke an interrupt to the ARM core, and a second point evokes an external event on the WDOG line.<br>
 
−
 
 
−
== '''管脚定义''' ==
 
 
{| class="wikitable"
 
{| class="wikitable"
 +
!核心板管脚号
 +
!核心板管脚定义
 +
!CPU 管脚号 
 +
!CPU管脚复用功能
 +
!管脚电压
 +
|-
 +
|1||CLK1_N||P16||CCM_CLK1_N||2.5V
 +
|-
 +
|2||CLK1_P||P17||CCM_CLK1_P||2.5V
 +
|-
 +
|rowspan=6|3||rowspan=6|WDOG_B||rowspan=6|N17||CCM_PMIC_READY||rowspan=6|3.3V
 +
|-
 +
|GPIO1_IO08
 +
|-
 +
|PWM1_OUT
 +
|-
 +
|WDOG1_WDOG_B
 +
|-
 +
|USDHC2_VSELECT
 +
|-
 +
|SPDIF_OUT
 +
|-
 +
|rowspan=4|4||rowspan=4|PWM4||rowspan=4|M17||GPIO1_IO5||rowspan=4|3.3V
 +
|-
 +
|PWM4_OUT
 +
|-
 +
|USB_OTG2_ID
 +
|-
 +
|USDHC1_VSELECT
 +
|-
 +
|rowspan=6|5||rowspan=6|PWM2||rowspan=6|M15||GPIO1_IO9||rowspan=6|3.3V
 +
|-
 +
|PWM2_OUT
 +
|-
 +
|SPDIF_IN
 +
|-
 +
|USDHC1_RESET_B
 +
|-
 +
|USDHC2_RESET_B
 +
|-
 +
|WDOG1_WDOG_ANY
 +
|-
 +
|rowspan=6|6||rowspan=6|GPIO4_IO16||rowspan=6|E6||EIM_WAIT||rowspan=6|3.3V
 +
|-
 +
|GPIO4_IO16
 +
|-
 +
|NAND_DQS
 +
|-
 +
|QSPI_A_SS0_B
 +
|-
 +
|SDMA_EXT_EVENT1
 +
|-
 +
|SPDIF_EXT_CLK
 +
|-
 +
|rowspan=7|7||rowspan=7|USB_OTG2_PWR||rowspan=7|L14||GPIO1_IO2||rowspan=7|3.3V
 +
|-
 +
|GPT1_COMPARE2
 +
|-
 +
|I2C1_SCL
 +
|-
 +
|SDMA_EXT_EVENT0
 +
|-
 +
|UART1_TX_DATA
 +
|-
 +
|USB_OTG2_PWR
 +
|-
 +
|USDHC1_WP
 +
|-
 +
|rowspan=6|8||rowspan=6|USB_OTG1_OC||rowspan=6|L15||GPIO1_IO1||rowspan=6|3.3V
 +
|-
 +
|GPT1_COMPARE1
 +
|-
 +
|I2C2_SDA
 +
|-
 +
|MQS_LEFT
 +
|-
 +
|USB_OTG1_OC
 +
|-
 +
|WDOG1_WDOG_B
 +
|-
 +
|rowspan=5|9||rowspan=5|USB_OTG1_PWR||rowspan=5|M16||GPIO1_IO4||rowspan=5|3.3V
 +
|-
 +
|PWM3_OUT
 +
|-
 +
|USB_OTG1_PWR
 +
|-
 +
|USDHC1_RESET_B
 +
|-
 +
|XTALOSC_REF_CLK_24M
 +
|-
 +
|rowspan=6|10||rowspan=6|USB_OTG2_OC||rowspan=6|L17||GPIO1_IO3||rowspan=6|3.3V
 +
|-
 +
|GPT1_COMPARE3
 +
|-
 +
|I2C1_SDA
 +
|-
 +
|UART1_RX_DATA
 +
|-
 +
|USB_OTG2_OC
 +
|-
 +
|USDHC1_CD_B
 +
|-
 +
|rowspan=3|11||rowspan=3|GPIO1_IO23||rowspan=3|H14||GPIO1_IO23||rowspan=3|3.3V
 +
|-
 +
|GPT1_COMPARE3
 +
|-
 +
|UART2_RTS_B
 +
|-
 +
|rowspan=4|12||rowspan=4|GPIO1_IO22||rowspan=4|J15||GPIO1_IO22||rowspan=4|3.3V
 +
|-
 +
|GPT1_COMPARE2
 +
|-
 +
|SJC_DE_B
 +
|-
 +
|UART2_CTS_B
 +
|-
 +
|rowspan=3|13||rowspan=3|GPIO1_IO27||rowspan=3|G14||GPIO1_IO27||rowspan=3|3.3V
 +
|-
 +
|UART3_RTS_B
 +
|-
 +
|WDOG1_WDOG_B
 +
|-
 +
|rowspan=2|14||rowspan=2|GPIO1_IO26||rowspan=2|H15||GPIO1_IO26||rowspan=2|3.3V
 +
|-
 +
|UART3_CTS_B
 +
|-
 +
|rowspan=4|15||rowspan=4|GPIO1_IO7||rowspan=4|L16||GPIO1_IO7||rowspan=4|3.3V
 +
|-
 +
|UART1_RTS_B
 +
|-
 +
|USB_OTG_HOST_MODE
 +
|-
 +
|USDHC2_CD_B
 +
|-
 +
|rowspan=5|16||rowspan=5|GPIO1_IO6||rowspan=5|K17||CCM_REF_EN_B||rowspan=5|3.3V
 +
|-
 +
|GPIO1_IO6
 +
|-
 +
|UART1_CTS_B
 +
|-
 +
|USB_OTG_PWR_WAKE
 +
|-
 +
|USDHC2_WP
 +
|-
 +
|rowspan=3|17||rowspan=3|GPIO2_IO4||rowspan=3|E14||GPIO2_IO4||rowspan=3|3.3V
 +
|-
 +
|KPP_ROW2
 +
|-
 +
|WDOG1_WDOG_RST_B_DEB
 +
|-
 +
|rowspan=3|18||rowspan=3|GPIO2_IO5||rowspan=3|F15||GPIO2_IO5||rowspan=3|3.3V
 +
|-
 +
|KPP_COL2
 +
|-
 +
|WDOG2_WDOG_RST_B_DEB
 +
|-
 +
|rowspan=5|19||rowspan=5|GPIO2_IO0||rowspan=5|F16||GPIO2_IO0||rowspan=5|3.3V
 +
|-
 +
|KPP_ROW0
 +
|-
 +
|PWM1_OUT
 +
|-
 +
|UART4_RTS_B
 +
|-
 +
|USDHC1_LCTL
 +
|-
 +
|rowspan=4|20||rowspan=4|GPIO2_IO3||rowspan=4|E15||GPIO2_IO3||rowspan=4|3.3V
 +
|-
 +
|KPP_COL1
 +
|-
 +
|USDHC2_VSELECT
 +
|-
 +
|XTALOSC_REF_CLK_24M
 +
|-
 +
|rowspan=5|21||rowspan=5|GPIO2_IO1||rowspan=5|E17||GPIO2_IO1||rowspan=5|3.3V
 +
|-
 +
|KPP_COL0
 +
|-
 +
|PWM2_OUT
 +
|-
 +
|UART4_CTS_B
 +
|-
 +
|USDHC2_LCTL
 +
|-
 +
|rowspan=3|22||rowspan=3|GPIO2_IO6||rowspan=3|F14||GPIO2_IO6||rowspan=3|3.3V
 +
|-
 +
|GPT1_CLK
 +
|-
 +
|KPP_ROW3
 +
|-
 +
|rowspan=3|23||rowspan=3|GPIO2_IO2||rowspan=3|E16||GPIO2_IO2||rowspan=3|3.3V
 +
|-
 +
|KPP_ROW1
 +
|-
 +
|USDHC1_VSELECT
 +
|-
 +
|rowspan=4|24||rowspan=4|GPIO2_IO7||rowspan=4|D15||EIM_CRE||rowspan=4|3.3V
 +
|-
 +
|GPIO2_IO7
 +
|-
 +
|GPT1_CAPTURE2
 +
|-
 +
|KPP_COL3
 +
|-
 +
|rowspan=4|25||rowspan=4|UART1_RXD||rowspan=4|K16||GPIO1_IO17||rowspan=4|3.3V
 +
|-
 +
|GPT1_CLK
 +
|-
 +
|SPDIF_IN
 +
|-
 +
|UART1_RX_DATA
 +
|-
 +
|rowspan=4|26||rowspan=4|UART1_CTS||rowspan=4|K15||GPIO1_IO18||rowspan=4|3.3V
 +
|-
 +
|UART1_CTS_B
 +
|-
 +
|USDHC1_WP
 +
|-
 +
|USDHC2_WP
 +
|-
 +
|rowspan=4|27||rowspan=4|UART1_TXD||rowspan=4|K14||GPIO1_IO16||rowspan=4|3.3V
 +
|-
 +
|GPT1_COMPARE1
 +
|-
 +
|SPDIF_OUT
 +
|-
 +
|UART1_TX_DATA
 +
|-
 +
|rowspan=4|28||rowspan=4|UART1_RTS||rowspan=4|J14||GPIO1_IO19||rowspan=4|3.3V
 +
|-
 +
|UART1_RTS_B
 +
|-
 +
|USDHC1_CD_B
 +
|-
 +
|USDHC2_CD_B
 +
|-
 +
|rowspan=3|29||rowspan=3|UART2_TXD||rowspan=3|J17||GPIO1_IO20||rowspan=3|3.3V
 +
|-
 +
|GPT1_CAPTURE1
 +
|-
 +
|UART2_TX_DATA
 +
|-
 +
|rowspan=3|30||rowspan=3|UART2_RXD||rowspan=3|J16||GPIO1_IO21||rowspan=3|3.3V
 +
|-
 +
|GPT1_CAPTURE2
 +
|-
 +
|UART2_RX_DATA
 +
|-
 +
|rowspan=4|31||rowspan=4|UART3_TXD||rowspan=4|H17||GPIO1_IO24||rowspan=4|3.3V
 +
|-
 +
|UART2_CTS_B
 +
|-
 +
|UART3_TX_DATA
 +
|-
 +
|USB_OTG1_ID
 +
|-
 +
|rowspan=4|32||rowspan=4|UART3_RXD||rowspan=4|H16||EPIT1_OUT||rowspan=4|3.3V
 +
|-
 +
|GPIO1_IO25
 +
|-
 +
|UART2_RTS_B
 +
|-
 +
|UART3_RX_DATA
 +
|-
 +
|rowspan=4|33||rowspan=4|UART4_TXD||rowspan=4|G17||ECSPI2_SCLK||rowspan=4|3.3V
 +
|-
 +
|GPIO1_IO28
 +
|-
 +
|I2C1_SCL
 +
|-
 +
|UART4_TX_DATA
 +
|-
 +
|rowspan=4|34||rowspan=4|UART4_RXD||rowspan=4|G16||ECSPI2_SS0||rowspan=4|3.3V
 +
|-
 +
|GPIO1_IO29
 +
|-
 +
|I2C1_SDA
 +
|-
 +
|UART4_RX_DATA
 +
|-
 +
|rowspan=3|35||rowspan=3|GPIO1_IO30||rowspan=3|F17||ECSPI2_MOSI||rowspan=3|3.3V
 +
|-
 +
|GPIO1_IO30
 +
|-
 +
|I2C2_SCL
 +
|-
 +
|rowspan=3|36||rowspan=3|GPIO1_IO31||rowspan=3|G13||ECSPI2_MISO||rowspan=3|3.3V
 +
|-
 +
|GPIO1_IO31
 +
|-
 +
|I2C2_SDA
 +
|-
 +
|rowspan=4|37||rowspan=4|GPIO2_IO15||rowspan=4|D16||EIM_ADDR25||rowspan=4|3.3V
 +
|-
 +
|GPIO2_IO15
 +
|-
 +
|KPP_COL7
 +
|-
 +
|WDOG1_WDOG_ANY
 +
|-
 +
|rowspan=3|38||rowspan=3|GPIO2_IO9||rowspan=3|C16||GPIO2_IO9||rowspan=3|3.3V
 +
|-
 +
|KPP_COL4
 +
|-
 +
|USB_OTG1_OC
 +
|-
 +
|rowspan=3|39||rowspan=3|GPIO2_IO14||rowspan=3|D17||GPIO2_IO14||rowspan=3|3.3V
 +
|-
 +
|KPP_ROW7
 +
|-
 +
|USB_OTG2_ID
 +
|-
 +
|rowspan=3|40||rowspan=3|GPIO2_IO8||rowspan=3|C17||GPIO2_IO8||rowspan=3|3.3V
 +
|-
 +
|KPP_ROW4
 +
|-
 +
|USB_OTG1_PWR
 +
|-
 +
|rowspan=4|41||rowspan=4|GPIO2_IO13||rowspan=4|B15||EIM_ACLK_FREERUN||rowspan=4|3.3V
 +
|-
 +
|GPIO2_IO13
 +
|-
 +
|KPP_COL6
 +
|-
 +
|USB_OTG2_OC
 +
|-
 +
|rowspan=3|42||rowspan=3|GPIO2_IO10||rowspan=3|B17||EIM_ADDR26||rowspan=3|3.3V
 +
|-
 +
|GPIO2_IO10
 +
|-
 +
|KPP_ROW5
 +
|-
 +
|rowspan=4|43||rowspan=4|GPIO2_IO12||rowspan=4|A16||EIM_EB3_B||rowspan=4|3.3V
 +
|-
 +
|GPIO2_IO12
 +
|-
 +
|KPP_ROW6
 +
|-
 +
|USB_OTG2_PWR
 +
|-
 +
|rowspan=4|44||rowspan=4|GPIO2_IO11||rowspan=4|A15||EIM_EB2_B||rowspan=4|3.3V
 +
|-
 +
|GPIO2_IO11
 +
|-
 +
|KPP_COL5
 +
|-
 +
|XTALOSC_REF_CLK_24M
 +
|-
 +
|45||GND||---||---||---
 +
|-
 +
|46||5VIN||rowspan=3|---||rowspan=3|---||rowspan=3|input
 +
|-
 +
|47||5VIN
 +
|-
 +
|48||5VIN
 +
|-
 +
|49||DCDC_3V3||---||30mA(Use for LED or Power enable)||3V3(output)
 +
|-
 +
|50||VDD_SNVS_IN||---||5mA(Only use for Boot Mode)||3V3(output)
 +
|-
 +
|51||GND||---||---||---
 +
|-
 +
|52||GND||---||---||---
 +
|-
 +
|rowspan=6|53||rowspan=6|GPIO3_IO28||rowspan=6|B16||ECSPI1_MISO||rowspan=6|3.3V
 +
|-
 +
|EIM_DATA15
 +
|-
 +
|GPIO3_IO28
 +
|-
 +
|MQS_LEFT
 +
|-
 +
|SRC_BT_CFG31
 +
|-
 +
|USDHC2_DATA3
 +
|-
 +
|rowspan=5|54||rowspan=5|GPIO3_IO24||rowspan=5|D14||EIM_DATA11||rowspan=5|3.3V
 +
|-
 +
|GPIO3_IO24
 +
|-
 +
|SRC_BT_CFG27
 +
|-
 +
|USDHC2_CLK
 +
|-
 +
|WDOG1_WDOG_ANY
 +
|-
 +
|rowspan=5|55||rowspan=5|GPIO3_IO25||rowspan=5|C14||ECSPI1_SCLK||rowspan=5|3.3V
 +
|-
 +
|EIM_DATA12
 +
|-
 +
|GPIO3_IO25
 +
|-
 +
|SRC_BT_CFG28
 +
|-
 +
|USDHC2_DATA0
 +
|-
 +
|rowspan=5|56||rowspan=5|GPIO3_IO26||rowspan=5|B14||ECSPI1_SS0||rowspan=5|3.3V
 +
|-
 +
|EIM_DATA13
 +
|-
 +
|GPIO3_IO26
 +
|-
 +
|SRC_BT_CFG29
 +
|-
 +
|USDHC2_DATA1
 +
|-
 +
|rowspan=6|57||rowspan=6|GPIO3_IO27||rowspan=6|A14||ECSPI1_MOSI||rowspan=6|3.3V
 +
|-
 +
|EIM_DATA14
 +
|-
 +
|GPIO3_IO27
 +
|-
 +
|MQS_RIGHT
 +
|-
 +
|SRC_BT_CFG30
 +
|-
 +
|USDHC2_DATA2
 +
|-
 +
|rowspan=5|58||rowspan=5|GPIO3_IO22||rowspan=5|B13||ARM_PLATFORM_TRACE_CTL||rowspan=5|3.3V
 +
|-
 +
|EIM_DATA9
 +
|-
 +
|GPIO3_IO22
 +
|-
 +
|SRC_BT_CFG25
 +
|-
 +
|USDHC2_DATA7
 +
|-
 +
|rowspan=5|59||rowspan=5|GPIO3_IO23||rowspan=5|A13||ARM_PLATFORM_EVENTO||rowspan=5|3.3V
 +
|-
 +
|EIM_DATA10
 +
|-
 +
|GPIO3_IO23
 +
|-
 +
|SRC_BT_CFG26
 +
|-
 +
|USDHC2_CMD
 +
|-
 +
|rowspan=6|60||rowspan=6|GPIO3_IO18||rowspan=6|B12||ARM_PLATFORM_TRACE13||rowspan=6|3.3V
 +
|-
 +
|EIM_DATA5
 +
|-
 +
|GPIO3_IO18
 +
|-
 +
|SAI3_TX_BCLK
 +
|-
 +
|SRC_BT_CFG13
 +
|-
 +
|USDHC2_RESET_B
 +
|-
 +
|rowspan=6|61||rowspan=6|GPIO3_IO19||rowspan=6|A12||ARM_PLATFORM_TRACE14||rowspan=6|3.3V
 +
|-
 +
|EIM_DATA6
 +
|-
 +
|GPIO3_IO19
 +
|-
 +
|SAI3_RX_DATA
 +
|-
 +
|SRC_BT_CFG14
 +
|-
 +
|USDHC2_DATA4
 +
|-
 +
|rowspan=5|62||rowspan=5|GPIO3_IO13||rowspan=5|B11||ARM_PLATFORM_TRACE8||rowspan=5|3.3V
 +
|-
 +
|EIM_DATA0
 +
|-
 +
|GPIO3_IO13
 +
|-
 +
|SRC_BT_CFG8
 +
|-
 +
|SPDIF_IN
 +
|-
 +
|rowspan=5|63||rowspan=5|GPIO3_IO14||rowspan=5|A11||ARM_PLATFORM_TRACE9||rowspan=5|3.3V
 +
|-
 +
|EIM_DATA1
 +
|-
 +
|GPIO3_IO14
 +
|-
 +
|SAI3_MCLK
 +
|-
 +
|SRC_BT_CFG9
 +
|-
 +
|rowspan=5|64||rowspan=5|GPIO3_IO12||rowspan=5|D11||ARM_PLATFORM_TRACE7||rowspan=5|3.3V
 +
|-
 +
|ECSPI1_SS3
 +
|-
 +
|GPIO3_IO12
 +
|-
 +
|SRC_BT_CFG7
 +
|-
 +
|SPDIF_EXT_CLK
 +
|-
 +
|rowspan=5|65||rowspan=5|GPIO3_IO11||rowspan=5|A10||ARM_PLATFORM_TRACE6||rowspan=5|3.3V
 +
|-
 +
|ECSPI1_SS2
 +
|-
 +
|GPIO3_IO11
 +
|-
 +
|SRC_BT_CFG6
 +
|-
 +
|SPDIF_LOCK
 +
|-
 +
|rowspan=5|66||rowspan=5|GPIO3_IO10||rowspan=5|B10||ARM_PLATFORM_TRACE5||rowspan=5|3.3V
 +
|-
 +
|ECSPI1_SS1
 +
|-
 +
|GPIO3_IO10
 +
|-
 +
|SRC_BT_CFG5
 +
|-
 +
|SPDIF_OUT
 +
|-
 +
|rowspan=5|67||rowspan=5|GPIO3_IO9||rowspan=5|C10||ARM_PLATFORM_TRACE4||rowspan=5|3.3V
 +
|-
 +
|GPIO3_IO9
 +
|-
 +
|SAI1_TX_DATA
 +
|-
 +
|SRC_BT_CFG4
 +
|-
 +
|SPDIF_SR_CLK
 +
|-
 +
|rowspan=5|68||rowspan=5|GPIO3_IO5||rowspan=5|B9||ARM_PLATFORM_TRACE0||rowspan=5|3.3V
 +
|-
 +
|GPIO3_IO5
 +
|-
 +
|PWM1_OUT
 +
|-
 +
|SAI1_MCLK
 +
|-
 +
|SRC_BT_CFG0
 +
|-
 +
|rowspan=5|69||rowspan=5|GPIO3_IO6||rowspan=5|A9||ARM_PLATFORM_TRACE1||rowspan=5|3.3V
 +
|-
 +
|GPIO3_IO6
 +
|-
 +
|PWM2_OUT
 +
|-
 +
|SAI1_TX_SYNC
 +
|-
 +
|SRC_BT_CFG1
 +
|-
 +
|rowspan=5|70||rowspan=5|GPIO3_IO15||rowspan=5|E12||ARM_PLATFORM_TRACE10||rowspan=5|3.3V
 +
|-
 +
|EIM_DATA2
 +
|-
 +
|GPIO3_IO15
 +
|-
 +
|SAI3_RX_SYNC
 +
|-
 +
|SRC_BT_CFG10
 +
|-
 +
|rowspan=6|71||rowspan=6|GPIO3_IO20||rowspan=6|D13||ARM_PLATFORM_TRACE15||rowspan=6|3.3V
 +
|-
 +
|EIM_DATA7
 +
|-
 +
|GPIO3_IO20
 +
|-
 +
|SAI3_TX_DATA
 +
|-
 +
|SRC_BT_CFG15
 +
|-
 +
|USDHC2_DATA5
 +
|-
 +
|rowspan=5|72||rowspan=5|GPIO3_IO21||rowspan=5|C13||ARM_PLATFORM_TRACE_CLK||rowspan=5|3.3V
 +
|-
 +
|EIM_DATA8
 +
|-
 +
|GPIO3_IO21
 +
|-
 +
|SRC_BT_CFG24
 +
|-
 +
|USDHC2_DATA6
 +
|-
 +
|rowspan=6|73||rowspan=6|GPIO3_IO17||rowspan=6|C12||ARM_PLATFORM_TRACE12||rowspan=6|3.3V
 +
|-
 +
|ECSPI1_RDY
 +
|-
 +
|EIM_DATA4
 +
|-
 +
|GPIO3_IO17
 +
|-
 +
|SAI3_TX_SYNC
 +
|-
 +
|SRC_BT_CFG12
 +
|-
 +
|rowspan=5|74||rowspan=5|GPIO3_IO16||rowspan=5|D12||ARM_PLATFORM_TRACE11||rowspan=5|3.3V
 +
|-
 +
|EIM_DATA3
 +
|-
 +
|GPIO3_IO16
 +
|-
 +
|SAI3_RX_BCLK
 +
|-
 +
|SRC_BT_CFG11
 +
|-
 +
|rowspan=5|75||rowspan=5|GPIO3_IO8||rowspan=5|D10||ARM_PLATFORM_TRACE3||rowspan=5|3.3V
 +
|-
 +
|GPIO3_IO8
 +
|-
 +
|PWM4_OUT
 +
|-
 +
|SAI1_RX_DATA
 +
|-
 +
|SRC_BT_CFG3
 +
|-
 +
|rowspan=5|76||rowspan=5|GPIO3_IO7||rowspan=5|E10||ARM_PLATFORM_TRACE2||rowspan=5|3.3V
 +
|-
 +
|GPIO3_IO7
 +
|-
 +
|PWM3_OUT
 +
|-
 +
|SAI1_TX_BCLK
 +
|-
 +
|SRC_BT_CFG2
 +
|-
 +
|rowspan=5|77||rowspan=5|GPIO3_IO4||rowspan=5|E9||ARM_PLATFORM_EVENTI||rowspan=5|3.3V
 +
|-
 +
|ECSPI2_SS3
 +
|-
 +
|GPIO3_IO4
 +
|-
 +
|SAI3_TX_DATA
 +
|-
 +
|WDOG1_WDOG_ANY
 +
|-
 +
|rowspan=5|78||rowspan=5|GPIO3_IO3||rowspan=5|C9||ECSPI2_SS2||rowspan=5|3.3V
 +
|-
 +
|GPIO3_IO3
 +
|-
 +
|SAI3_RX_SYNC
 +
|-
 +
|UART4_RTS_B
 +
|-
 +
|WDOG2_WDOG_B
 +
|-
 +
|rowspan=5|79||rowspan=5|GPIO3_IO2||rowspan=5|D9||ECSPI2_SS1||rowspan=5|3.3V
 +
|-
 +
|GPIO3_IO2
 +
|-
 +
|SAI3_TX_BCLK
 +
|-
 +
|UART4_CTS_B
 +
|-
 +
|WDOG3_WDOG_RST_B_DEB
 +
|-
 +
|rowspan=5|80||rowspan=5|GPIO3_IO0||rowspan=5|A8||EIM_CS2_B||rowspan=5|3.3V
 +
|-
 +
|GPIO3_IO0
 +
|-
 +
|SAI3_MCLK
 +
|-
 +
|UART4_TX_DATA
 +
|-
 +
|WDOG1_WDOG_RST_B_DEB
 +
|-
 +
|rowspan=5|81||rowspan=5|GPIO3_IO1||rowspan=5|B8||ECSPI2_RDY||rowspan=5|3.3V
 +
|-
 +
|EIM_CS3_B
 +
|-
 +
|GPIO3_IO1
 +
|-
 +
|SAI3_TX_SYNC
 +
|-
 +
|UART4_RX_DATA
 +
|-
 +
|82||GND||---||_||---
 +
|-
 +
|rowspan=7|83||rowspan=7|I2C1_SCL||rowspan=7|E5||EIM_OE||rowspan=7|3.3V
 +
|-
 +
|ESAI_TX2_RX3
 +
|-
 +
|GPIO4_IO18
 +
|-
 +
|I2C1_SCL
 +
|-
 +
|NAND_CE3_B
 +
|-
 +
|SNVS_VIO_5
 +
|-
 +
|USDHC2_WP
 +
|-
 +
|rowspan=7|84||rowspan=7|I2C1_SDA||rowspan=7|F5||EIM_CS0_B||rowspan=7|3.3V
 +
|-
 +
|ESAI_TX3_RX2
 +
|-
 +
|GPIO4_IO17
 +
|-
 +
|I2C1_SDA
 +
|-
 +
|NAND_CE2_B
 +
|-
 +
|SNVS_VIO_5_CTL
 +
|-
 +
|USDHC2_CD_B
 +
|-
 +
|rowspan=6|85||rowspan=6|GPIO4_IO14||rowspan=6|B5||EIM_ADDR18||rowspan=6|3.3V
 +
|-
 +
|GPIO4_IO14
 +
|-
 +
|NAND_CE1_B
 +
|-
 +
|QSPI_A_DATA2
 +
|-
 +
|UART3_CTS_B
 +
|-
 +
|USDHC1_DATA6
 +
|-
 +
|rowspan=6|86||rowspan=6|SD1_CLK||rowspan=6|C1||EIM_ADDR20||rowspan=6|3.3V
 +
|-
 +
|GPIO2_IO17
 +
|-
 +
|SAI2_MCLK
 +
|-
 +
|SPDIF_IN
 +
|-
 +
|USB_OTG1_OC
 +
|-
 +
|USDHC1_CLK
 +
|-
 +
|rowspan=6|87||rowspan=6|SD1_DATA3||rowspan=6|A2||CCM_CLKO2||rowspan=6|3.3V
 +
|-
 +
|EIM_ADDR24
 +
|-
 +
|GPIO2_IO21
 +
|-
 +
|SAI2_TX_DATA
 +
|-
 +
|USB_OTG2_ID
 +
|-
 +
|USDHC1_DATA3
 +
|-
 +
|rowspan=5|88||rowspan=5|SD1_DATA0||rowspan=5|B3||EIM_ADDR21||rowspan=5|3.3V
 +
|-
 +
|GPIO2_IO18
 +
|-
 +
|SAI2_TX_SYNC
 +
|-
 +
|USB_OTG1_ID
 +
|-
 +
|USDHC1_DATA0
 +
|-
 +
|rowspan=5|89||rowspan=5|SD1_DATA1||rowspan=5|B2||EIM_ADDR22||rowspan=5|3.3V
 +
|-
 +
|GPIO2_IO19
 +
|-
 +
|SAI2_TX_BCLK
 
|-
 
|-
−
|序号
+
|USB_OTG2_PWR
−
|引脚名称
 
−
|信号名称
 
−
|接口
 
−
|功能
 
−
|模式
 
−
|方向
 
 
|-
 
|-
−
|001
+
|USDHC1_DATA1
−
|CCM_CLK1_N
 
−
|CLK1_N
 
−
|CCM
 
−
|ccm_clk1_n
 
−
|－
 
−
|－
 
 
|-
 
|-
−
|002
+
|rowspan=6|90||rowspan=6|SD1_DATA2||rowspan=6|B1||CCM_CLKO1||rowspan=6|3.3V
−
|CCM_CLK1_P
 
−
|CLK1_P
 
−
|CCM
 
−
|ccm_clk1_p
 
−
|－
 
−
|－
 
 
|-
 
|-
−
|003
+
|EIM_ADDR23
−
|GPIO1_IO08
 
−
|WDOG_B
 
−
|WDOG1
 
−
|wdog_wdog_b
 
−
|ALT1
 
−
|Input/Output
 
 
|-
 
|-
−
|004
+
|GPIO2_IO20
−
|GPIO1_IO05
 
−
|PWM_4
 
−
|PWM4
 
−
|pwm_out
 
−
|ALT1
 
−
|Output
 
 
|-
 
|-
−
|005
+
|SAI2_RX_DATA
−
|GPIO1_IO09
 
−
|PWM_2
 
−
|PWM2
 
−
|pwm_out
 
−
|ALT0
 
−
|Output
 
 
|-
 
|-
−
|006
+
|USB_OTG2_OC
−
|NAND_DQS
 
−
|PWM_5
 
−
|PWM5
 
−
|pwm_out
 
−
|ALT3
 
−
|Output
 
 
|-
 
|-
−
|007
+
|USDHC1_DATA2
−
|GPIO1_IO02
 
−
||USB_OTG2_PWR<br>(ENET_nRST)
 
−
|GPIO1
 
−
|gpio_io2
 
−
|ALT5
 
−
|Input/Output
 
 
|-
 
|-
−
|008
+
|rowspan=7|91||rowspan=7|SD1_CMD||rowspan=7|C2||EIM_ADDR19||rowspan=7|3.3V
−
|GPIO1_IO01
 
−
|USB_OTG1_OC<br>(SD1_CD)
 
−
|GPIO1
 
−
|gpio_io1
 
−
|ALT5
 
−
|Input/Output
 
 
|-
 
|-
−
|009
+
|GPIO2_IO16
−
|GPIO1_IO04
 
−
|USB_OTG1_PWR<br>(SD1_WP)
 
−
|GPIO1
 
−
|gpio_io4
 
−
|ALT5
 
−
|Input/Output
 
 
|-
 
|-
−
|010
+
|SAI2_RX_SYNC
−
|GPIO1_IO03
 
−
|USB_OTG2_OC<br>(ENET_nINT)
 
−
|GPIO1
 
−
|gpio_io3
 
−
|ALT5
 
−
|Input/Output
 
 
|-
 
|-
−
|011
+
|SDMA_EXT_EVENT0
−
|UART2_RTS_B
 
−
|CAN2_RX
 
−
|FLEXCAN2
 
−
|can_rx
 
−
|ALT2
 
−
|Input
 
 
|-
 
|-
−
|012
+
|SPDIF_OUT
−
|UART2_CTS_B
 
−
|CAN2_TX
 
−
|FLEXCAN2
 
−
|can_tx
 
−
|ALT2
 
−
|Output
 
 
|-
 
|-
−
|013
+
|USB_OTG1_PWR
−
|UART3_RTS_B
 
−
|CAN1_RX
 
−
|FLEXCAN1
 
−
|can_rx
 
−
|ALT2
 
−
|Input
 
 
|-
 
|-
−
|014
+
|USDHC1_CMD
−
|UART3_CTS_B
 
−
|CAN1_TX
 
−
|FLEXCAN1
 
−
|can_tx
 
−
|ALT2
 
−
|Output
 
 
|-
 
|-
−
|015
+
|92||GND||---||_||---
−
|GPIO1_IO07
 
−
|ENET_MDC
 
−
|ENET1
 
−
|enet_mdc
 
−
|ALT0
 
−
|Output
 
 
|-
 
|-
−
|016
+
|rowspan=7|93||rowspan=7|ECSPI1_MOSI||rowspan=7|D2||ECSPI1_MOSI||rowspan=7|3.3V
−
|GPIO1_IO06
 
−
|ENET_MDIO
 
−
|ENET1
 
−
|enet_mdio
 
−
|ALT0
 
−
|Input/Output
 
 
|-
 
|-
−
|017
+
|EIM_AD6
−
|ENET1_TX_DATA1
 
−
|ENET1_TXD1
 
−
|ENET1
 
−
|enet_tdata1
 
−
|ALT0
 
−
|Output
 
 
|-
 
|-
−
|018
+
|ESAI_TX5_RX0
−
|ENET1_TX_EN
 
−
|ENET1_TXEN
 
−
|ENET1
 
−
|enet_tx_en
 
−
|ALT0
 
−
|Output
 
 
|-
 
|-
−
|019
+
|GPIO4_IO27
−
|ENET1_RX_DATA0
 
−
|ENET1_RXD0
 
−
|ENET1
 
−
|enet_rdata0
 
−
|ALT0
 
−
|Input
 
 
|-
 
|-
−
|020
+
|SAI1_RX_DATA
−
|ENET1_TX_DATA0
 
−
|ENET1_TXD0
 
−
|ENET1
 
−
|enet_tdata0
 
−
|ALT0
 
−
|Output
 
 
|-
 
|-
−
|021
+
|USDHC1_RESET_B
−
|ENET1_RX_DATA1
 
−
|ENET1_RXD1
 
−
|ENET1
 
−
|enet_rdata1
 
−
|ALT0
 
−
|Input
 
 
|-
 
|-
−
|022
+
|USDHC2_DATA6
−
|ENET1_TX_CLK
 
−
|ENET1_TX_CLK
 
−
|ENET1
 
−
|enet_tx_clk
 
−
|ALT0
 
−
|Input
 
 
|-
 
|-
−
|023
+
|rowspan=6|94||rowspan=6|ECSPI2_MOSI||rowspan=6|E2||ECSPI2_MOSI||rowspan=6|3.3V
−
|ENET1_RX_EN
 
−
|ENET1_CRS_DV
 
−
|ENET1
 
−
|enet_rx_en
 
−
|ALT0
 
−
|Input
 
 
|-
 
|-
−
|024
+
|EIM_AD2
−
|ENET1_RX_ER
 
−
|ENET1_RXER
 
−
|ENET1
 
−
|enet_rx_er
 
−
|ALT0
 
−
|Input
 
 
|-
 
|-
−
|025
+
|ESAI_RX_FS
−
|UART1_RX_DATA
 
−
|UART1_RXD
 
−
|UART1
 
−
|uart_rx
 
−
|ALT0
 
−
|Input
 
 
|-
 
|-
−
|026
+
|GPIO4_IO23
−
|UART1_CTS_B
 
−
|UART1_CTS
 
−
|UART1
 
−
|uart_cts_b
 
−
|ALT0
 
−
|Output
 
 
|-
 
|-
−
|027
+
|SAI1_RX_SYNC
−
|UART1_TX_DATA
 
−
|UART1_TXD
 
−
|UART1
 
−
|uart_tx
 
−
|ALT0
 
−
|Output
 
 
|-
 
|-
−
|028
+
|USDHC2_DATA2
−
|UART1_RTS_B
 
−
|UART1_RTS
 
−
|UART1
 
−
|uart_rts_b
 
−
|ALT0
 
−
|Input
 
 
|-
 
|-
−
|029
+
|rowspan=7|95||rowspan=7|ECSPI1_MISO||rowspan=7|D1||ECSPI1_MISO||rowspan=7|3.3V
−
|UART2_TX_DATA
 
−
|UART2_TXD
 
−
|UART2
 
−
|uart_tx
 
−
|ALT0
 
−
|Output
 
 
|-
 
|-
−
|030
+
|EIM_AD7
−
|UART2_RX_DATA
 
−
|UART2_RXD
 
−
|UART2
 
−
|uart_rx
 
−
|ALT0
 
−
|Input
 
 
|-
 
|-
−
|031
+
|ESAI_TX0
−
|UART3_TX_DATA
 
−
|UART3_TXD
 
−
|UART3
 
−
|uart_tx
 
−
|ALT0
 
−
|Output
 
 
|-
 
|-
−
|032
+
|GPIO4_IO28
−
|UART3_RX_DATA
 
−
|UART3_RXD
 
−
|UART3
 
−
|uart_rx
 
−
|ALT0
 
−
|Input
 
 
|-
 
|-
−
|033
+
|SAI1_TX_DATA
−
|UART4_TX_DATA
 
−
|UART4_TXD
 
−
|UART4
 
−
|uart_tx
 
−
|ALT0
 
−
|Output
 
 
|-
 
|-
−
|034
+
|USDHC1_VSELECT
−
|UART4_RX_DATA
 
−
|UART4_RXD
 
−
|UART4
 
−
|uart_rx
 
−
|ALT0
 
−
|Input
 
 
|-
 
|-
−
|035
+
|USDHC2_DATA7
−
|UART5_TX_DATA
 
−
|UART5_TXD
 
−
|UART5
 
−
|uart_tx
 
−
|ALT0
 
−
|Output
 
 
|-
 
|-
−
|036
+
|rowspan=7|96||rowspan=7|ECSPI1_SCLK||rowspan=7|D4||ECSPI1_SCLK||rowspan=7|3.3V
−
|UART5_RX_DATA
 
−
|UART5_RXD
 
−
|UART5
 
−
|uart_tx
 
−
|ALT0
 
−
|Output
 
 
|-
 
|-
−
|037
+
|EIM_AD4
−
|ENET2_RX_ER
 
−
|UART8_CTS
 
−
|UART8
 
−
|uart_cts_b
 
−
|ALT1
 
−
|Output
 
 
|-
 
|-
−
|038
+
|ESAI_TX_FS
−
|ENET2_RX_DATA1
 
−
|UART6_TXD
 
−
|UART6
 
−
|uart_tx
 
−
|ALT1
 
−
|Output
 
 
|-
 
|-
−
|039
+
|GPIO4_IO25
−
|ENET2_TX_CLK
 
−
|UART8_RTS
 
−
|UART8
 
−
|uart_rts_b
 
−
|ALT1
 
−
|Input
 
 
|-
 
|-
−
|040
+
|SAI1_TX_SYNC
−
|ENET2_RX_DATA0
 
−
|UART6_RXD
 
−
|UART6
 
−
|uart_rx
 
−
|ALT1
 
−
|Input
 
 
|-
 
|-
−
|041
+
|USDHC1_WP
−
|ENET2_TX_EN
 
−
|UART8_TXD
 
−
|UART8
 
−
|uart_tx
 
−
|ALT1
 
−
|Output
 
 
|-
 
|-
−
|042
+
|USDHC2_DATA4
−
|ENET2_RX_EN
 
−
|UART7_TXD
 
−
|UART7
 
−
|uart_tx
 
−
|ALT1
 
−
|Output
 
 
|-
 
|-
−
|043
+
|rowspan=5|97||rowspan=5|ECSPI2_SCLK||rowspan=5|E4||ECSPI2_SCLK||rowspan=5|3.3V
−
|ENET2_TX_DATA1
 
−
|UART8_RXD
 
−
|UART8
 
−
|uart_rx
 
−
|ALT1
 
−
|Input
 
 
|-
 
|-
−
|044
+
|EIM_AD0
−
|ENET2_TX_DATA0
 
−
|UART7_RXD
 
−
|UART7
 
−
|uart_rx
 
−
|ALT1
 
−
|Input
 
 
|-
 
|-
−
|045
+
|ESAI_TX_HF_CLK
−
|－
 
−
|GND
 
−
|－
 
−
|－
 
−
|－
 
−
|－
 
 
|-
 
|-
−
|046
+
|GPIO4_IO21
−
|－
 
−
|5V
 
−
|－
 
−
|－
 
−
|－
 
−
|－
 
 
|-
 
|-
−
|047
+
|USDHC2_DATA0
−
|－
 
−
|5V
 
−
|－
 
−
|－
 
−
|－
 
−
|－
 
 
|-
 
|-
−
|048
+
|rowspan=7|98||rowspan=7|ECSPI1_CS0||rowspan=7|D3||ECSPI1_SS0||rowspan=7|3.3V
−
|－
 
−
|5V
 
−
|－
 
−
|－
 
−
|－
 
−
|－
 
 
|-
 
|-
−
|049
+
|EIM_AD5
−
|－
 
−
|DCDC_3V3
 
−
|－
 
−
|－
 
−
|－
 
−
|－
 
 
|-
 
|-
−
|050
+
|ESAI_TX_CLK
−
|－
 
−
|VDD_SNVS_IN
 
−
|－
 
−
|－
 
−
|－
 
−
|Output
 
 
|-
 
|-
−
|051
+
|GPIO4_IO26
−
|－
 
−
|GND
 
−
|－
 
−
|－
 
−
|－
 
−
|－
 
 
|-
 
|-
−
|052
+
|SAI1_TX_BCLK
−
|－
 
−
|GND
 
−
|－
 
−
|－
 
−
|－
 
−
|－
 
 
|-
 
|-
−
|053
+
|USDHC1_CD_B
−
|LCD_DATA23
 
−
|LCD_DATA23
 
−
|LCDIF
 
−
|lcdif_data23
 
−
|ALT0
 
−
|Input/Output
 
 
|-
 
|-
−
|054
+
|USDHC2_DATA5
−
|LCD_DATA19
 
−
|LCD_DATA19
 
−
|LCDIF
 
−
|lcdif_data19
 
−
|ALT0
 
−
|Input/Output
 
 
|-
 
|-
−
|055
+
|rowspan=6|99||rowspan=6|ECSPI2_CS0||rowspan=6|E3||ECSPI2_SS0||rowspan=6|3.3V
−
|LCD_DATA20
 
−
|LCD_DATA20
 
−
|LCDIF
 
−
|lcdif_data20
 
−
|ALT0
 
−
|Input/Output
 
 
|-
 
|-
−
|056
+
|EIM_AD1
−
|LCD_DATA21
 
−
|LCD_DATA21
 
−
|LCDIF
 
−
|lcdif_data21
 
−
|ALT0
 
−
|Input/Output
 
 
|-
 
|-
−
|057
+
|ESAI_RX_HF_CLK
−
|LCD_DATA22
 
−
|LCD_DATA22
 
−
|LCDIF
 
−
|lcdif_data22
 
−
|ALT0
 
−
|Input/Output
 
 
|-
 
|-
−
|058
+
|GPIO4_IO22
−
|LCD_DATA17
 
−
|LCD_DATA17
 
−
|LCDIF
 
−
|lcdif_data17
 
−
|ALT0
 
−
|Input/Output
 
 
|-
 
|-
−
|059
+
|SAI1_MCLK
−
|LCD_DATA18
 
−
|LCD_DATA18
 
−
|LCDIF
 
−
|lcdif_data18
 
−
|ALT0
 
−
|Input/Output
 
 
|-
 
|-
−
|060
+
|USDHC2_DATA1
−
|LCD_DATA13
 
−
|LCD_DATA13
 
−
|LCDIF
 
−
|lcdif_data13
 
−
|ALT0
 
−
|Input/Output
 
 
|-
 
|-
−
|061
+
|rowspan=6|100||rowspan=6|ECSPI2_MISO||rowspan=6|E1||ECSPI2_MISO||rowspan=6|3.3V
−
|LCD_DATA14
 
−
|LCD_DATA14
 
−
|LCDIF
 
−
|lcdif_data14
 
−
|ALT0
 
−
|Input/Output
 
 
|-
 
|-
−
|062
+
|EIM_AD3
−
|LCD_DATA08
 
−
|LCD_DATA8
 
−
|LCDIF
 
−
|lcdif_data8
 
−
|ALT0
 
−
|Input/Output
 
 
|-
 
|-
−
|063
+
|ESAI_RX_CLK
−
|LCD_DATA09
 
−
|LCD_DATA9
 
−
|LCDIF
 
−
|lcdif_data9
 
−
|ALT0
 
−
|Input/Output
 
 
|-
 
|-
−
|064
+
|GPIO4_IO24
−
|LCD_DATA07
 
−
|LCD_DATA7
 
−
|LCDIF
 
−
|lcdif_data7
 
−
|ALT0
 
−
|Input/Output
 
 
|-
 
|-
−
|065
+
|SAI1_RX_BCLK
−
|LCD_DATA06
 
−
|LCD_DATA6
 
−
|LCDIF
 
−
|lcdif_data6
 
−
|ALT0
 
−
|Input/Output
 
 
|-
 
|-
−
|066
+
|USDHC2_DATA3
−
|LCD_DATA05
 
−
|LCD_DATA5
 
−
|LCDIF
 
−
|lcdif_data5
 
−
|ALT0
 
−
|Input/Output
 
 
|-
 
|-
−
|067
+
|101||GND||---||---||---
−
|LCD_DATA04
 
−
|LCD_DATA4
 
−
|LCDIF
 
−
|lcdif_data4
 
−
|ALT0
 
−
|Input/Output
 
 
|-
 
|-
−
|068
+
|rowspan=5|102||rowspan=5|I2C2_SCL||rowspan=5|F3||EIM_LBA_B||rowspan=5|3.3V
−
|LCD_DATA00
 
−
|LCD_DATA0
 
−
|LCDIF
 
−
|lcdif_data0
 
−
|ALT0
 
−
|Input/Output
 
 
|-
 
|-
−
|069
+
|ESAI_TX1
−
|LCD_DATA01
 
−
|LCD_DATA1
 
−
|LCDIF
 
−
|lcdif_data1
 
−
|ALT0
 
−
|Input/Output
 
 
|-
 
|-
−
|070
+
|GPIO4_IO20
−
|LCD_DATA10
 
−
|LCD_DATA10
 
−
|LCDIF
 
−
|lcdif_data10
 
−
|ALT0
 
−
|Input/Output
 
 
|-
 
|-
−
|071
+
|I2C2_SCL
−
|LCD_DATA15
 
−
|LCD_DATA15
 
−
|LCDIF
 
−
|lcdif_data15
 
−
|ALT0
 
−
|Input/Output
 
 
|-
 
|-
−
|072
+
|USDHC2_CMD
−
|LCD_DATA16
 
−
|LCD_DATA16
 
−
|LCDIF
 
−
|lcdif_data16
 
−
|ALT0
 
−
|Input/Output
 
 
|-
 
|-
−
|073
+
|rowspan=5|103||rowspan=5|I2C2_SDA||rowspan=5|F2||EIM_RW||rowspan=5|3.3V
−
|LCD_DATA12
 
−
|LCD_DATA12
 
−
|LCDIF
 
−
|lcdif_data12
 
−
|ALT0
 
−
|Input/Output
 
 
|-
 
|-
−
|074
+
|ESAI_TX4_RX1
−
|LCD_DATA11
 
−
|LCD_DATA11
 
−
|LCDIF
 
−
|lcdif_data11
 
−
|ALT0
 
−
|Input/Output
 
 
|-
 
|-
−
|075
+
|GPIO4_IO19
−
|LCD_DATA03
 
−
|LCD_DATA3
 
−
|LCDIF
 
−
|lcdif_data3
 
−
|ALT0
 
−
|Input/Output
 
 
|-
 
|-
−
|076
+
|I2C2_SDA
−
|LCD_DATA02
 
−
|LCD_DATA2
 
−
|LCDIF
 
−
|lcdif_data2
 
−
|ALT0
 
−
|Input/Output
 
 
|-
 
|-
−
|077
+
|USDHC2_CLK
−
|LCD_RESET
 
−
|LCD_RESET
 
−
|LCDIF
 
−
|lcdif_reset
 
−
|ALT0
 
−
|Input/Output
 
 
|-
 
|-
−
|078
+
|104||GND||---||---||---
−
|LCD_VSYNC
 
−
|LCD_VSYNC
 
−
|LCDIF
 
−
|lcdif_vsync
 
−
|ALT0
 
−
|Input
 
 
|-
 
|-
−
|079
+
|105||GND||---||---||---
−
|LCD_HSYNC
 
−
|LCD_HSYNC
 
−
|LCDIF
 
−
|lcdif_hsync
 
−
|ALT0
 
−
|Input
 
 
|-
 
|-
−
|080
+
|106||GND||---||---||---
−
|LCD_CLK
 
−
|LCD_PCLK
 
−
|LCDIF
 
−
|lcdif_clk
 
−
|ALT0
 
−
|Input
 
 
|-
 
|-
−
|081
+
|107||SNVS_TAMPER5||N8||GPIO5_IO05/SNVS_TAMPER5||3.3V
−
|LCD_ENABLE
 
−
|LCD_DE
 
−
|LCDIF
 
−
|lcdif_enable
 
−
|ALT0
 
−
|Input/Output
 
 
|-
 
|-
−
|082
+
|108||SNVS_TAMPER8||N9||GPIO5_IO08/SNVS_TAMPER8||3.3V
−
|－
 
−
|GND
 
−
|－
 
−
|－
 
−
|－
 
−
|－
 
 
|-
 
|-
−
|083
+
|109||SNVS_TAMPER1||R9||GPIO5_IO01/SNVS_TAMPER1||3.3V
−
|CSI_PIXCLK
 
−
|I2C1_SCL
 
−
|I2C1
 
−
|i2c_scl
 
−
|ALT3
 
−
|Input/Output
 
 
|-
 
|-
−
|084
+
|110||SNVS_TAMPER4||P9||GPIO5_IO04/SNVS_TAMPER4||3.3V
−
|CSI_MCLK
 
−
|I2C1_SDA
 
−
|I2C1
 
−
|i2c_sda
 
−
|ALT3
 
−
|Input/Output
 
 
|-
 
|-
−
|085
+
|111||SNVS_TAMPER3||P10||GPIO5_IO03/SNVS_TAMPER3||3.3V
−
|NAND_CE1_B
 
−
|NAND_CE1N<br>(RTC_nRQ)
 
−
|GPIO4
 
−
|gpio_io14
 
−
|ALT5
 
−
|Input/Output
 
 
|-
 
|-
−
|086
+
|112||SNVS_TAMPER7||N10||GPIO5_IO07/SNVS_TAMPER7||3.3V
−
|SD1_CLK
 
−
|SD1_CLK
 
−
|uSDHC1
 
−
|usdhc_clk
 
−
|ALT0
 
−
|Output
 
 
|-
 
|-
−
|087
+
|113||SNVS_TAMPER0||R10||GPIO5_IO00/SNVS_TAMPER0||3.3V
−
|SD1_DATA3
 
−
|SD1_DATA3
 
−
|uSDHC1
 
−
|usdhc_data3
 
−
|ALT0
 
−
|Input/Output
 
 
|-
 
|-
−
|088
+
|114||SNVS_TAMPER2||P11||GPIO5_IO02/SNVS_TAMPER2||3.3V
−
|SD1_DATA0
 
−
|SD1_DATA0
 
−
|uSDHC1
 
−
|usdhc_data0
 
−
|ALT0
 
−
|Input/Output
 
 
|-
 
|-
−
|089
+
|115||SNVS_TAMPER6||N11||GPIO5_IO06/SNVS_TAMPER6||3.3V
−
|SD1_DATA1
 
−
|SD1_DATA1
 
−
|uSDHC1
 
−
|usdhc_data1
 
−
|ALT0
 
−
|Input/Output
 
 
|-
 
|-
−
|090
+
|116||SNVS_TAMPER9||R6||GPIO5_IO09/SNVS_TAMPER9||3.3V
−
|SD1_DATA2
 
−
|SD1_DATA2
 
−
|uSDHC1
 
−
|usdhc_data2
 
−
|ALT0
 
−
|Input/Output
 
 
|-
 
|-
−
|091
+
|117||GND||---||---||---
−
|SD1_CMD
 
−
|SD1_CMD
 
−
|uSDHC1
 
−
|usdhc_cmd
 
−
|ALT0
 
−
|Input/Output
 
 
|-
 
|-
−
|092
+
|118||PMIC_ON_REQ||T9||SNVS_PMIC_ON_REQ||3.3V
−
|－
 
−
|GND
 
−
|－
 
−
|－
 
−
|－
 
−
|－
 
 
|-
 
|-
−
|093
+
|119||ONOFF||R8||NC||3.3V
−
|CSI_DATA06
 
−
|ECSPI1_MOSI
 
−
|ECSPI1
 
−
|ecspi_mosi
 
−
|ALT3
 
−
|Input/Output
 
 
|-
 
|-
−
|094
+
|120||POR_B||P8||RESET||3.3V
−
|CSI_DATA02
 
−
|ECSPI2_MOSI
 
−
|ECSPI2
 
−
|ecspi_mosi
 
−
|ALT3
 
−
|Input/Output
 
 
|-
 
|-
−
|095
+
|121||BOOT_MODE1||U10||SRC_BOOT_MODE1||3.3V
−
|CSI_DATA07
 
−
|ECSPI1_MISO
 
−
|ECSPI1
 
−
|ecspi_miso
 
−
|ALT3
 
−
|Input/Output
 
 
|-
 
|-
−
|096
+
|122||BOOT_MODE0||T10||SRC_BOOT_MODE0||3.3V
−
|CSI_DATA04
 
−
|ECSPI1_SCLK
 
−
|ECSPI1
 
−
|ecspi_sclk
 
−
|ALT3
 
−
|Input/Output
 
 
|-
 
|-
−
|097
+
|123||GND||---||---||---
−
|CSI_DATA00
 
−
|ECSPI2_SCLK
 
−
|ECSPI2
 
−
|ecspi_sclk
 
−
|ALT3
 
−
|Input/Output
 
 
|-
 
|-
−
|098
+
|124||USB_OTG2_VBUS||U12||USB_VBUS||5V(input)
−
|CSI_DATA05
 
−
|ECSPI1_CS0
 
−
|ECSPI1
 
−
|ecspi_ss0
 
−
|ALT3
 
−
|Output
 
 
|-
 
|-
−
|099
+
|125||USB_OTG2_DP||U13||USB_OTG2_DP||3.3V
−
|CSI_DATA01
 
−
|ECSPI2_CS0
 
−
|ECSPI2
 
−
|ecspi_ss0
 
−
|ALT3
 
−
|Output
 
 
|-
 
|-
−
|100
+
|126||USB_OTG2_DN||T13||USB_OTG2_DN||3.3V
−
|CSI_DATA03
 
−
|ECSPI2_MISO
 
−
|ECSPI2
 
−
|ecspi_miso
 
−
|ALT3
 
−
|Input/Output
 
 
|-
 
|-
−
|101
+
|127||GND||---||---||---
−
|－
 
−
|GND
 
−
|－
 
−
|－
 
−
|－
 
−
|－
 
 
|-
 
|-
−
|102
+
|128||USB_OTG1_VBUS||T12||USB_VBUS||5V(input)
−
|CSI_HSYNC
 
−
|I2C2_SCL
 
−
|I2C2
 
−
|i2c_scl
 
−
|ALT3
 
−
|Input/Output
 
 
|-
 
|-
−
|103
+
|129||USB_OTG1_DP||U15||USB_OTG1_DP||3.3V
−
|CSI_VSYNC
 
−
|I2C2_SDA
 
−
|I2C2
 
−
|i2c_sda
 
−
|ALT3
 
−
|Input/Output
 
 
|-
 
|-
−
|104
+
|130||USB_OTG1_DN||T15||USB_OTG1_DN||3.3V
−
|－
 
−
|GND
 
−
|－
 
−
|－
 
−
|－
 
−
|－
 
 
|-
 
|-
−
|105
+
|131||GND||---||---||---
−
|－
 
−
|GND
 
−
|－
 
−
|－
 
−
|－
 
−
|－
 
 
|-
 
|-
−
|106
+
|132||NUSB_OTG_CHD||U16||NC||3.3V
−
|－
 
−
|GND
 
−
|－
 
−
|－
 
−
|－
 
−
|－
 
 
|-
 
|-
−
|107
+
|rowspan=6|133||rowspan=6|USB_OTG1_ID||rowspan=6|K13||GPIO1_IO0||rowspan=6|3.3V
−
|SNVS_TAMPER5
 
−
|SNVS_TAMPER5<br>(TOUCH_nEINT0)
 
−
|GPIO5
 
−
|gpio_io5
 
−
|ALT5
 
−
|Input/Output
 
 
|-
 
|-
−
|108
+
|GPT1_CAPTURE1
−
|SNVS_TAMPER8
 
−
|SNVS_TAMPER8
 
−
|GPIO5
 
−
|gpio_io8
 
−
|ALT5
 
−
|Input/Output
 
 
|-
 
|-
−
|109
+
|I2C2_SCL
−
|SNVS_TAMPER1
 
−
|SNVS_TAMPER1
 
−
|GPIO5
 
−
|gpio_io1
 
−
|ALT5
 
−
|Input/Output
 
 
|-
 
|-
−
|110
+
|MQS_RIGHT
−
|SNVS_TAMPER4
 
−
|SNVS_TAMPER4
 
−
|GPIO5
 
−
|gpio_io4
 
−
|ALT5
 
−
|Input/Output
 
 
|-
 
|-
−
|111
+
|USB_OTG1_ID
−
|SNVS_TAMPER3
 
−
|SNVS_TAMPER3
 
−
|GPIO5
 
−
|gpio_io3
 
−
|ALT5
 
−
|Input/Output
 
 
|-
 
|-
−
|112
+
|WDOG3_WDOG_B
−
|SNVS_TAMPER7
 
−
|SNVS_TAMPER7
 
−
|GPIO5
 
−
|gpio_io7
 
−
|ALT5
 
−
|Input/Output
 
 
|-
 
|-
−
|113
+
|rowspan=4|134||rowspan=4|GPIO1_IO15||rowspan=4|N14||GPIO1_IO15||rowspan=4|3.3V
−
|SNVS_TAMPER0
 
−
|SNVS_TAMPER0
 
−
|GPIO5
 
−
|gpio_io0
 
−
|ALT5
 
−
|Input/Output
 
 
|-
 
|-
−
|114
+
|SAI2_TX_DATA
−
|SNVS_TAMPER2
 
−
|SNVS_TAMPER2
 
−
|GPIO5
 
−
|gpio_io2
 
−
|ALT5
 
−
|Input/Output
 
 
|-
 
|-
−
|115
+
|SJC_TRSTB
−
|SNVS_TAMPER6
 
−
|SNVS_TAMPER6
 
−
|GPIO5
 
−
|gpio_io6
 
−
|ALT5
 
−
|Input/Output
 
 
|-
 
|-
−
|116
+
|XTALOSC_REF_CLK_24M
−
|SNVS_TAMPER9
 
−
|SNVS_TAMPER9
 
−
|GPIO5
 
−
|gpio_io9
 
−
|ALT5
 
−
|Input/Output
 
 
|-
 
|-
−
|117
+
|rowspan=6|135||rowspan=6|GPIO1_IO11||rowspan=6|P14||CCM_CLKO1||rowspan=6|3.3V
−
|－
 
−
|GND
 
−
|－
 
−
|－
 
−
|－
 
−
|－
 
 
|-
 
|-
−
|118
+
|EPIT1_OUT
−
|SNVS_PMIC_ON_REQ
 
−
|PMIC_ON_REQ
 
−
|SNVS
 
−
|snvs_lp_wrapper<br>_pmic_on_req
 
−
|ALT0
 
−
|Input
 
 
|-
 
|-
−
|119
+
|GPIO1_IO11
−
|ONOFF
 
−
|ONOFF
 
−
|SRC
 
−
|src_reset_b
 
−
|ALT0
 
−
|Input
 
 
|-
 
|-
−
|120
+
|SAI2_MCLK
−
|POR_B
 
−
|POR_B
 
−
|SRC
 
−
|src_por_b
 
−
|ALT0
 
−
|Input
 
 
|-
 
|-
−
|121
+
|SDMA_EXT_EVENT1
−
|BOOT_MODE1
 
−
|BOOT_MODE1
 
−
|SRC
 
−
|src_boot_mode1
 
−
|ALT0
 
−
|Input
 
 
|-
 
|-
−
|122
+
|SJC_TMS
−
|BOOT_MODE0
 
−
|BOOT_MODE0
 
−
|SRC
 
−
|src_boot_mode0
 
−
|ALT0
 
−
|Input
 
 
|-
 
|-
−
|123
+
|rowspan=5|136||rowspan=5|GPIO1_IO10||rowspan=5|P15||CCM_PMIC_READY||rowspan=5|3.3V
−
|－
 
−
|GND
 
−
|－
 
−
|－
 
−
|－
 
−
|－
 
 
|-
 
|-
−
|124
+
|GPIO1_IO10
−
|USB_OTG2_VBUS
 
−
|USB_OTG2_VBUS
 
−
|USB
 
−
|usb_otg2_vbus
 
−
|－
 
−
|－
 
 
|-
 
|-
−
|125
+
|SDMA_EXT_EVENT0
−
|USB_OTG2_DP
 
−
|USB_OTG2_DP
 
−
|USB
 
−
|usb_otg2_dp
 
−
|－
 
−
|－
 
 
|-
 
|-
−
|126
+
|SJC_MOD
−
|USB_OTG2_DN
 
−
|USB_OTG2_DN
 
−
|USB
 
−
|usb_otg2_dn
 
−
|－
 
−
|－
 
 
|-
 
|-
−
|127
+
|SPDIF_OUT
−
|－
 
−
|GND
 
−
|－
 
−
|－
 
−
|－
 
−
|－
 
 
|-
 
|-
−
|128
+
|rowspan=3|137||rowspan=3|GPIO1_IO14||rowspan=3|M14||GPIO1_IO14||rowspan=3|3.3V
−
|USB_OTG1_VBUS
 
−
|USB_OTG1_VBUS
 
−
|USB
 
−
|usb_otg1_vbus
 
−
|－
 
−
|－
 
 
|-
 
|-
−
|129
+
|SAI2_RX_DATA
−
|USB_OTG1_DP
 
−
|USB_OTG1_DP
 
−
|USB
 
−
|usb_otg1_dp
 
−
|－
 
−
|－
 
 
|-
 
|-
−
|130
+
|SJC_TCK
−
|USB_OTG1_DN
 
−
|USB_OTG1_DN
 
−
|USB
 
−
|usb_otg1_dn
 
−
|－
 
−
|－
 
 
|-
 
|-
−
|131
+
|rowspan=5|138||rowspan=5|GPIO1_IO12||rowspan=5|N15||CCM_CLKO2||rowspan=5|3.3V
−
|－
 
−
|GND
 
−
|－
 
−
|－
 
−
|－
 
−
|－
 
 
|-
 
|-
−
|132
+
|GPIO1_IO12
−
|USB_OTG1_CHD_B
 
−
|nUSB_OTG_CHD
 
−
|USB
 
−
|usb_otg1_chd_b
 
−
|－
 
−
|－
 
 
|-
 
|-
−
|133
+
|MQS_RIGHT
−
|GPIO1_IO00
 
−
|USB_OTG1_ID
 
−
|USB
 
−
|usb_otg1_id
 
−
|ALT2
 
−
|Input
 
 
|-
 
|-
−
|134
+
|SAI2_TX_SYNC
−
|JTAG_TRST_B
 
−
|JTAG_nTRST
 
−
|SJC
 
−
|sjc_trstb
 
−
|ALT0
 
−
|Input
 
 
|-
 
|-
−
|135
+
|SJC_TDO
−
|JTAG_TMS
 
−
|JTAG_TMS
 
−
|SJC
 
−
|sjc_tms
 
−
|ALT0
 
−
|Input
 
 
|-
 
|-
−
|136
+
|rowspan=4|139||rowspan=4|GPIO1_IO13||rowspan=4|N16||GPIO1_IO13||rowspan=4|3.3V
−
|JTAG_MOD
 
−
|JTAG_MOD
 
−
|SJC
 
−
|sjc_mod
 
−
|ALT0
 
−
|Input
 
 
|-
 
|-
−
|137
+
|MQS_LEFT
−
|JTAG_TCK
 
−
|JTAG_TCK
 
−
|SJC
 
−
|sjc_tck
 
−
|ALT0
 
−
|Input
 
 
|-
 
|-
−
|138
+
|SAI2_TX_BCLK
−
|JTAG_TDO
 
−
|JTAG_TDO
 
−
|SJC
 
−
|sjc_tdo
 
−
|ALT0
 
−
|Output
 
 
|-
 
|-
−
|139
+
|SJC_TDI
−
|JTAG_TDI
 
−
|JTAG_TDI
 
−
|SJC
 
−
|sjc_tdi
 
−
|ALT0
 
−
|Input
 
 
|-
 
|-
−
|140
+
|140||GND||---||---||---
−
|－
 
−
|GND
 
−
|－
 
−
|－
 
−
|－
 
−
|－
 
 
|}
 
|}
 +
</div>

2020年10月22日 (四) 14:51的最新版本

MYZR-IMX6-CB140视图

核心板256M-256M正面

Myimx6 cb140 front.jpg

核心板256M-4G正面

Myimx6 cb140 4G front.jpg

尺寸

36mm * 38mm
Myimx6 cb140 1.2.0.1.png

Myimx6 CB140 1.2.0.2.png

MYZR-IMX6-CB140参数

硬件配置

CPU i.MX 6UltraLite/i.MX6ULL 兼容汽车，工业，消费级
内存 DDR3 256MB 可扩展至512MB
存储 4GB eMMC 兼容至64GB

供电电源

5V输入

CPU 功耗

状态：空载
工作电压：5V
工作电流：64mA

温度范围

工作温度

  • 商业级：
0°C ~ 70°C
  • 工业级：
-40°C ~ 85°C

存储温度

-60°C ~ 125°C

操作系统支持

  • Linux

Linux-4.1.15

Linux-4.9.88

  • QT

QT-4.8.5

QT-5.5.0

硬件默认接口

默认接口(I.MX6UL/6ULL（6G/6Y))

接口规格 最大可配置接口数 描述
通讯接口 Ethernet 2 2路10/100Mbps以太网，符合IEEE1588
USB OTG 2 2路高速USB 2.0 OTG（最高480 Mbps），带有集成的HS USB PHY
UART 8 8路UART，每路高达 1.4Mbps
CAN 2 支持 CAN2.0B 协议
I2C 4 4路I2C，支持400 kbps
SPI 4 4路eCSPI（Enhanced CSPI），每个高达52 Mbps
ADC 2 两个12位 ADC 模块，到达 10个输入通道
PWM 8 具有时钟源选择的16位递增计数器，4X16 FIFO
Timer 4
外部存储接口 SD3.0/SDIO 1 4位SD和SDIO卡传输，最高可达UHS-I SDR-104模式（最大104 MB/s）
多媒体 LCD 1 "最大可支持85Mhz显示时钟，且在60Hz时分辨率高达 WXGA（1366X768）

支持 8/16/18/24位显示"

DVP 1 "单路并行摄像头接口，最高24位和133.3 MHz像素时钟

支持 8/10/16/24位输入"

SAI 3 三路 I2S/SAI/AC97，每个高达1.4 Mbps
ESAI 1 增强型 SAI 接口
"加密模块
（Only 6G）"		 "CAAM
（Cryptographic Acceleration and Assurance Module）"		 1 containing cryptographic and hash engines, 32 KB secure RAM, and True and Pseudo Random Number Generator (NIST certified).

默认接口(I.MX6ULZ（6Z))

接口规格 最大可配置接口数 描述
通讯接口 USB OTG 2 2路高速USB 2.0 OTG（最高480 Mbps），带有集成的HS USB PHY
UART 4 4路UART，每路高达 5Mbps
I2C 4 4路I2C，支持400 kbps
SPI 2 2路eCSPI（Enhanced CSPI），每个高达52 Mbps
PWM 4 具有时钟源选择的16位递增计数器，4X16 FIFO
Timer 2
外部存储接口 SD3.0/SDIO 1 4位SD和SDIO卡传输，最高可达UHS-I SDR-104模式（最大104 MB/s）
多媒体 SAI 3 三路 I2S/SAI/AC97，每个高达1.4 Mbps
ESAI 1 增强型 SAI 接口

管脚定义&详细功能说明

I.MX6UL/6ULL（6G/6Y)

Pin NO. Pin Name CPU Ball Name 功能描述 管脚电压
1 CLK1_N P16 CCM_CLK1_N 2.5V
2 CLK1_P P17 CCM_CLK1_P 2.5V
3 WDOG_B N17 ADC1_IN8 3.3V
ADC2_IN8
CCM_PMIC_READY
CSI_VSYNC
GPIO1_IO08
PWM1_OUT
SPDIF_OUT
UART5_RTS_B
USDHC2_VSELECT
WDOG1_WDOG_B
4 PWM4 M17 ADC1_IN5 3.3V
ADC2_IN5
CSI_FIELD
ENET2_EVENT0_OUT
GPIO1_IO05
PWM4_OUT
UART5_RX_DATA
USB_OTG2_ID
USDHC1_VSELECT
XTALOSC_REF_CLK2
5 PWM2 M15 ADC1_IN9 3.3V
ADC2_IN9
CSI_HSYNC
GPIO1_IO09
PWM2_OUT
SPDIF_IN
UART5_CTS_B
USDHC1_RESET_B
USDHC2_RESET_B
WDOG1_WDOG_ANY
6 PWM5 E6 CSI_FIELD 3.3V
EIM_WAIT
GPIO4_IO16
NAND_DQS
PWM5_OUT
QSPI_A_SS0_B
SDMA_EXT_EVENT1
SPDIF_EXT_CLK
7 USB_OTG2_PWR L14 ADC1_IN2 3.3V
ADC2_IN2
GPIO1_IO02
GPT1_COMPARE2
I2C1_SCL
SDMA_EXT_EVENT0
UART1_TX_DATA
USB_OTG2_PWR
USDHC1_WP
XTALOSC_ENET_REF_CLK_25M
8 USB_OTG1_OC L15 ADC1_IN1 3.3V
ADC2_IN1
ENET1_EVENT0_OUT
GPIO1_IO01
GPT1_COMPARE1
I2C2_SDA
MQS_LEFT
USB_OTG1_OC
WDOG1_WDOG_B
XTALOSC_REF_CLK2
9 USB_OTG1_PWR M16 ADC1_IN4 3.3V
ADC2_IN4
ENET2_EVENT0_IN
GPIO1_IO04
PWM3_OUT
UART5_TX_DATA
USB_OTG1_PWR
USDHC1_RESET_B
XTALOSC_REF_CLK1
10 USB_OTG2_OC L17 ADC1_IN3 3.3V
ADC2_IN3
GPIO1_IO3
GPT1_COMPARE3
I2C1_SDA
UART1_RX_DATA
USB_OTG2_OC
USDHC1_CD_B
11 CAN2_RX H14 CSI_DATA9 3.3V
ECSPI3_MISO
ENET1_COL
FLEXCAN2_RX
GPIO1_IO23
GPT1_COMPARE3
UART2_RTS_B
12 CAN2_TX J15 CSI_DATA8 3.3V
ECSPI3_MOSI
ENET1_CRS
FLEXCAN2_TX
GPIO1_IO22
GPT1_COMPARE2
SJC_DE_B
UART2_CTS_B
13 CAN1_RX G14 CSI_DATA11 3.3V
ENET1_EVENT1_OUT
ENET2_TX_ER
FLEXCAN1_RX
GPIO1_IO27
UART3_RTS_B
WDOG1_WDOG_B
14 CAN1_TX H15 CSI_DATA10 3.3V
ENET1_EVENT1_IN
ENET2_RX_CLK
EPIT2_OUT
FLEXCAN1_TX
GPIO1_IO26
UART3_CTS_B
15 ENET_MDC L16 ADC1_IN7 3.3V
ADC2_IN7
ENET1_MDC
ENET2_MDC
CSI_PIXCLK
GPIO1_IO07
UART1_RTS_B
USDHC2_CD_B
16 ENET_MDIO K17 ADC1_IN6 3.3V
ADC2_IN6
CCM_REF_EN_8
CSI_MCLK
ENET1_MDIO
ENET2_MDIO
GPIO1_IO06
UART1_CTS_B
USDHC2_WP
17 ENET1_TXD1 E14 CSI_DATA20 3.3V
ENET1_TDATA1
ENET2_MDIO
GPIO2_IO4
KPP_ROW2
PWM5_OUT
UART6_CTS_B
WDOG1_WDOG_RST_B_DEB
18 ENET1_TXEN F15 CSI_DATA21 3.3V
ENET1_TX_EN
ENET2_MDC
GPIO2_IO5
KPP_COL2
PWM6_OUT
UART6_RTS_B
WDOG2_WDOG_RST_B_DEB
19 ENET1_RXD0 F16 CSI_DATA16 3.3V
ENET1_RDATA0
FLEXCAN1_TX
GPIO2_IO0
KPP_ROW0
PWM1_OUT
UART4_RTS_B
USDHC1_LCTL
20 ENET1_TXD0 E15 CSI_DATA19 3.3V
ENET1_TDATA0
FLEXCAN2_RX
GPIO2_IO3
KPP_COL1
UART5_CTS_B
USDHC2_VSELECT
21 ENET1_RXD1 E17 CSI_DATA17 3.3V
ENET1_RDATA1
FLEXCAN1_RX
GPIO2_IO1
KPP_COL0
PWM2_OUT
UART4_CTS_B
USDHC2_LCTL
22 ENET1_TX_CLK F14 CSI_DATA22 3.3V
ENET1_TX_CLK
GPIO2_IO6
GPT1_CLK
KPP_ROW3
PWM7_OUT
UART7_CTS_B
XTALOSC_REF_CLK1
23 ENET1_CRS_DV E16 CSI_DATA18 3.3V
ENET1_RX_EN
FLEXCAN2_TX
GPIO2_IO2
KPP_ROW1
UART5_RTS_B
USDHC1_VSELECT
24 ENET1_RXER D15 CSI_DATA23 3.3V
EIM_CRE
ENET1_RX_ER
GPIO2_IO7
GPT1_CAPTURE2
KPP_COL3
PWM8_OUT
UART7_RTS_B
25 UART1_RXD K16 CSI_DATA3 3.3V
ENET1_RDATA3
GPIO1_IO17
GPT1_CLK
I2C3_SDA
SPDIF_IN
UART1_RX_DATA
26 UART1_CTS K15 CSI_DATA4 3.3V
ENET1_RX_CLK
ENET2_1588_EVENT1_IN
GPIO1_IO18
UART1_CTS_B
USDHC1_WP
USDHC2_WP
27 UART1_TXD K14 CSI_DATA2 3.3V
ENET1_RDATA2
GPIO1_IO16
GPT1_COMPARE1
I2C3_SCL
SPDIF_OUT
UART1_TX_DATA
28 UART1_RTS J14 CSI_DATA5 3.3V
ENET1_TX_ER
ENET2_1588_EVENT1_OUT
GPIO1_IO19
UART1_RTS_B
USDHC1_CD_B
USDHC2_CD_B
29 UART2_TXD J17 CSI_DATA6 3.3V
ECSPI3_SS0
ENET1_TDATA2
GPIO1_IO20
GPT1_CAPTURE1
I2C4_SCL
UART2_TX_DATA
30 UART2_RXD J16 CSI_DATA7 3.3V
ECSPI3_SCLK
ENET1_TDATA3
GPIO1_IO21
GPT1_CAPTURE2
I2C4_SDA
UART2_RX_DATA
31 UART3_TXD H17 CSI_DATA1 3.3V
ENET2_RDATA2
GPIO1_IO24
SIM1_PORT0_PD
UART2_CTS_B
UART3_TX_DATA
USB_OTG1_ID
32 UART3_RXD H16 CSI_DATA0 3.3V
ENET2_RDATA3
EPIT1_OUT
GPIO1_IO25
SIM2_PORT0_PD
UART2_RTS_B
UART3_RX_DATA
33 UART4_TXD G17 CSI_DATA12 3.3V
ECSPI2_SCLK
ENET2_TDATA2
GPIO1_IO28
I2C1_SCL
UART4_TX_DATA
34 UART4_RXD G16 CSI_DATA13 3.3V
ECSPI2_SS0
ENET2_TDATA3
GPIO1_IO29
I2C1_SDA
UART4_RX_DATA
35 UART5_TXD F17 CSI_DATA14 3.3V
ECSPI2_MOSI
ENET2_CRS
GPIO1_IO30
I2C2_SCL
UART5_TX_DATA
36 UART5_RXD G13 CSI_DATA15 3.3V
ECSPI2_MISO
ENET2_COL
GPIO1_IO31
I2C2_SDA
UART5_RX_DATA
37 UART8_RTS D16 ECSPI4_SS0 3.3V
EIM_ADDR25
ENET2_RX_ER
GPIO2_IO15
KPP_COL7
SIM2_PORT0_SVEN
UART8_RTS_B
WDOG1_WDOG_ANY
38 UART6_RXD C16 ENET1_MDC 3.3V
ENET2_RDATA1
GPIO2_IO9
I2C3_SDA
KPP_COL4
SIM1_PORT0_CLK
UART6_RX_DATA
USB_OTG1_OC
39 UART8_CTS D17 ECSPI4_MISO 3.3V
ENET2_TX_CLK
GPIO2_IO14
KPP_ROW7
SIM2_PORT0_RST_B
UART8_CTS_B
USB_OTG2_ID
XTALOSC_REF_CLK2
40 UART6_TXD C17 ENET1_MDIO 3.3V
ENET2_RDATA0
GPIO2_IO8
I2C3_SCL
KPP_ROW4
SIM1_PORT0_TRXD
UART6_TX_DATA
USB_OTG1_PWR
41 UART8_RXD B15 ECSPI4_MOSI 3.3V
EIM_ACLK_FREERUN
ENET2_TX_EN
GPIO2_IO13
KPP_COL6
SIM2_PORT0_CLK
UART8_RX_DATA
USB_OTG2_OC
42 UART7_TXD B17 EIM_ADDR26 3.3V
ENET2_RX_EN
GPIO2_IO10
I2C4_SCL
KPP_ROW5
SIM1_PORT0_RST_B
UART7_TX_DATA
XTALOSC_ENET_REF_CLK_25M
43 UART8_TXD A16 ECSPI4_SCLK 3.3V
EIM_EB3_B
ENET2_TDATA1
GPIO2_IO12
KPP_ROW6
SIM2_PORT0_TRXD
UART8_TX_DATA
USB_OTG2_PWR
44 UART7_RXD A15 EIM_EB2_B 3.3V
ENET2_TDATA0
GPIO2_IO11
I2C4_SDA
KPP_COL5
SIM1_PORT0_SVEN
UART7_RX_DATA
45 GND --- --- ---
46 5VIN --- --- 5V（input）
47
48
49 DCDC_3V3 --- 30mA (Use for LED or Power enable) 3.3V(output)
50 VDD_SNVS_IN --- 5mA(Only use for Boot Mode) 3.3V(output)
51 GND --- --- ---
52 GND --- --- ---
53 LCD_DATA23 B16 CSI_DATA15 3.3V
ECSPI1_MISO
EIM_DATA15
GPIO3_IO28
LCDIF_DATA23
MQS_LEFT
SRC_BT_CFG31
USDHC2_DATA3
54 LCD_DATA19 D14 CSI_DATA11 3.3V
EIM_DATA11
GPIO3_IO24
LCDIF_DATA19
PWM6_OUT
SRC_BT_CFG27
USDHC2_CLK
WDOG1_WDOG_ANY
55 LCD_DATA20 C14 CSI_DATA12 3.3V
ECSPI1_SCLK
EIM_DATA12
GPIO3_IO25
LCDIF_DATA20
SRC_BT_CFG28
UART8_TX_DATA
USDHC2_DATA0
56 LCD_DATA21 B14 CSI_DATA13 3.3V
ECSPI1_SS0
EIM_DATA13
GPIO3_IO26
LCDIF_DATA21
SRC_BT_CFG29
UART8_RX_DATA
USDHC2_DATA1
57 LCD_DATA22 A14 CSI_DATA14 3.3V
ECSPI1_MOSI
EIM_DATA14
GPIO3_IO27
LCDIF_DATA22
MQS_RIGHT
SRC_BT_CFG30
USDHC2_DATA2
58 LCD_DATA17 B13 ARM_PLATFORM_TRACE_CTL 3.3V
CSI_DATA0
EIM_DATA9
GPIO3_IO22
LCDIF_DATA17
SRC_BT_CFG25
UART7_RX_DATA
USDHC2_DATA7
59 LCD_DATA18 A13 ARM_PLATFORM_EVENTO 3.3V
CSI_DATA10
EIM_DATA10
GPIO3_IO23
LCDIF_DATA18
PWM5_OUT
SRC_BT_CFG26
USDHC2_CMD
60 LCD_DATA13 B12 ARM_PLATFORM_TRACE13 3.3V
CSI_DATA21
EIM_DATA5
GPIO3_IO18
LCDIF_DATA13
SAI3_TX_BCLK
SRC_BT_CFG13
USDHC2_RESET_B
61 LCD_DATA14 A12 ARM_PLATFORM_TRACE14 3.3V
CSI_DATA22
EIM_DATA6
GPIO3_IO19
LCDIF_DATA14
SAI3_RX_DATA
SRC_BT_CFG14
USDHC2_DATA4
62 LCD_DATA8 B11 ARM_PLATFORM_TRACE8 3.3V
CSI_DATA16
EIM_DATA0
FLEXCAN1_TX
GPIO3_IO13
LCDIF_DATA8
SRC_BT_CFG8
SPDIF_IN
63 LCD_DATA9 A11 ARM_PLATFORM_TRACE9 3.3V
CSI_DATA17
EIM_DATA1
FLEXCAN1_RX
GPIO3_IO14
LCDIF_DATA9
SAI3_MCLK
SRC_BT_CFG9
64 LCD_DATA7 D11 ARM_PLATFORM_TRACE7 3.3V
ECSPI1_SS3
ENET2_1588_EVENT3_OUT
GPIO3_IO12
LCDIF_DATA7
SRC_BT_CFG7
SPDIF_EXT_CLK
UART7_RTS_B
65 LCD_DATA6 A10 ARM_PLATFORM_TRACE6 3.3V
ECSPI1_SS2
ENET2_1588_EVENT3_IN
GPIO3_IO11
LCDIF_DATA6
SRC_BT_CFG6
SPDIF_LOCK
UART7_CTS_B
66 LCD_DATA5 B10 ARM_PLATFORM_TRACE5 3.3V
ECSPI1_SS1
ENET2_1588_EVENT2_OUT
GPIO3_IO10
LCDIF_DATA5
SRC_BT_CFG5
SPDIF_OUT
UART8_RTS_B
67 LCD_DATA4 C10 ARM_PLATFORM_TRACE4 3.3V
ENET2_1588_EVENT2_IN
GPIO3_IO9
LCDIF_DATA4
SAI1_TX_DATA
SRC_BT_CFG4
SPDIF_SR_CLK
UART8_CTS_B
68 LCD_DATA0 B9 ARM_PLATFORM_TRACE0 3.3V
ENET1_1588_EVENT2_IN
GPIO3_IO5
I2C3_SDA
LCDIF_DATA0
PWM1_OUT
SAI1_MCLK
SRC_BT_CFG0
69 LCD_DATA1 A9 ARM_PLATFORM_TRACE1 3.3V
ENET1_1588_EVENT2_OUT
GPIO3_IO6
I2C3_SCL
LCDIF_DATA1
PWM2_OUT
SAI1_TX_SYNC
SRC_BT_CFG1
70 LCD_DATA10 E12 ARM_PLATFORM_TRACE10 3.3V
CSI_DATA18
EIM_DATA2
FLEXCAN2_TX
GPIO3_IO15
LCDIF_DATA10
SAI3_RX_SYNC
SRC_BT_CFG10
71 LCD_DATA15 D13 ARM_PLATFORM_TRACE15 3.3V
CSI_DATA23
EIM_DATA7
GPIO3_IO20
LCDIF_DATA15
SAI3_TX_DATA
SRC_BT_CFG15
USDHC2_DATA5
72 LCD_DATA16 C13 ARM_PLATFORM_TRACE_CLK 3.3V
CSI_DATA1
EIM_DATA8
GPIO3_IO21
LCDIF_DATA16
SRC_BT_CFG24
UART7_TX_DATA
USDHC2_DATA6
73 LCD_DATA12 C12 ARM_PLATFORM_TRACE12 3.3V
CSI_DATA20
ECSPI1_RDY
EIM_DATA4
GPIO3_IO17
LCDIF_DATA12
SAI3_TX_SYNC
SRC_BT_CFG12
74 LCD_DATA11 D12 ARM_PLATFORM_TRACE11 3.3V
CSI_DATA19
EIM_DATA3
FLEXCAN2_RX
GPIO3_IO16
LCDIF_DATA11
SAI3_RX_BCLK
SRC_BT_CFG11
75 LCD_DATA3 D10 ARM_PLATFORM_TRACE3 3.3V
ENET1_1588_EVENT3_OUT
GPIO3_IO8
I2C4_SCL
LCDIF_DATA3
PWM4_OUT
SAI1_RX_DATA
SRC_BT_CFG3
76 LCD_DATA2 E10 ARM_PLATFORM_TRACE2 3.3V
ENET1_1588_EVENT3_IN
GPIO3_IO7
I2C4_SDA
LCDIF_DATA2
PWM3_OUT
SAI1_TX_BCLK
SRC_BT_CFG2
77 LCD_RESET E9 ARM_PLATFORM_EVENTI 3.3V
ECSPI2_SS3
GPIO3_IO4
LCDIF_CS
LCDIF_RESET
SAI3_TX_DATA
WDOG1_WDOG_ANY
78 LCD_VSYNC C9 ECSPI2_SS2 3.3V
GPIO3_IO3
LCDIF_BUSY
LCDIF_VSYNC
SAI3_RX_SYNC
UART4_RTS_B
WDOG2_WDOG_B
79 LCD_HSYNC D9 ECSPI2_SS1 3.3V
GPIO3_IO2
LCDIF_HSYNC
LCDIF_RS
SAI3_TX_BCLK
UART4_CTS_B
WDOG3_WDOG_RST_B_DEB
80 LCD_PCLK A8 EIM_CS2_B 3.3V
GPIO3_IO0
LCDIF_CLK
LCDIF_WR_RWN
SAI3_MCLK
UART4_TX_DATA
WDOG1_WDOG_RST_B_DEB
81 LCD_DE B8 ECSPI2_RDY 3.3V
EIM_CS3_B
GPIO3_IO1
LCDIF_ENABLE
LCDIF_RD_E
SAI3_TX_SYNC
UART4_RX_DATA
82 GND --- --- ---
83 I2C1_SCL E5 CSI_PIXCLK 3.3V
EIM_OE
GPIO4_IO18
I2C1_SCL
NAND_CE3_B
SNVS_VIO_5
UART6_RX_DATA
USDHC2_WP
84 I2C1_SDA F5 CSI_MCLK 3.3V
EIM_CS0_B
GPIO4_IO17
I2C1_SDA
NAND_CE2_B
SNVS_VIO_5_CTL
UART6_TX_DATA
USDHC2_CD_B
85 NAND_CE1N B5 ECSPI3_MOSI 3.3V
EIM_ADDR18
GPIO4_IO14
NAND_CE1_B
QSPI_A_DATA2
UART3_CTS_B
USDHC1_DATA6
86 SD1_CLK C1 EIM_ADDR20 3.3V
GPIO2_IO17
GPT2_COMPARE2
SAI2_MCLK
SPDIF_IN
USB_OTG1_OC
USDHC1_CLK
87 SD1_DATA3 A2 CCM_CLKO2 3.3V
EIM_ADDR24
FLEXCAN2_RX
GPIO2_IO21
GPT2_CAPTURE2
SAI2_TX_DATA
USB_OTG2_ID
USDHC1_DATA3
88 SD1_DATA0 B3 EIM_ADDR21 3.3V
FLEXCAN1_TX
GPIO2_IO18
GPT2_COMPARE3
SAI2_TX_SYNC
USB_OTG1_ID
USDHC1_DATA0
89 SD1_DATA1 B2 EIM_ADDR22 3.3V
FLEXCAN1_RX
GPIO2_IO19
GPT2_CLK
SAI2_TX_BCLK
USB_OTG2_PWR
USDHC1_DATA1
90 SD1_DATA2 B1 CCM_CLKO1 3.3V
EIM_ADDR23
FLEXCAN2_TX
GPIO2_IO20
GPT2_CAPTURE1
SAI2_RX_DATA
USB_OTG2_OC
USDHC1_DATA2
91 SD1_CMD C2 EIM_ADDR19 3.3V
GPIO2_IO16
GPT2_COMPARE1
SAI2_RX_SYNC
SDMA_EXT_EVENT0
SPDIF_OUT
USB_OTG1_PWR
USDHC1_CMD
92 GND --- --- ---
93 ECSPI1_MOSI D2 CSI_DATA8 3.3V
ECSPI1_MOSI
EIM_AD6
GPIO4_IO27
SAI1_RX_DATA
SIM2_PORT1_SVEN
USDHC1_RESET_B
USDHC2_DATA6
94 ECSPI2_MOSI E2 CSI_DATA4 3.3V
ECSPI2_MOSI
EIM_AD2
GPIO4_IO23
SAI1_RX_SYNC
SIM1_PORT1_TRXD
UART5_RTS_B
USDHC2_DATA2
95 ECSPI1_MISO D1 CSI_DATA9 3.3V
ECSPI1_MISO
EIM_AD7
GPIO4_IO28
SAI1_TX_DATA
SIM2_PORT1_TRXD
USDHC1_VSELECT
USDHC2_DATA7
96 ECSPI1_SCLK D4 CSI_DATA6 3.3V
ECSPI1_SCLK
EIM_AD4
GPIO4_IO25
SAI1_TX_SYNC
SIM2_PORT1_CLK
USDHC1_WP
USDHC2_DATA4
97 ECSPI2_SCLK E4 CSI_DATA2 3.3V
ECSPI2_SCLK
EIM_AD0
GPIO4_IO21
SIM1_PORT1_RST_B
UART5_TX_DATA
USDHC2_DATA0
98 ECSPI1_CS0 D3 CSI_DATA7 3.3V
ECSPI1_SS0
EIM_AD5
GPIO4_IO26
SAI1_TX_BCLK
SIM2_PORT1_RST_B
USDHC1_CD_B
USDHC2_DATA5
99 ECSPI2_CS0 E3 CSI_DATA3 3.3V
ECSPI2_SS0
EIM_AD1
GPIO4_IO22
SAI1_MCLK
SIM1_PORT1_SVEN
UART5_RX_DATA
USDHC2_DATA1
100 ECSPI2_MIS0 E1 CSI_DATA5 3.3V
ECSPI2_MISO
EIM_AD3
GPIO4_IO24
SAI1_RX_BCLK
SIM2_PORT1_PD
UART5_CTS_B
USDHC2_DATA3
101 GND --- --- ---
102 I2C2_SCL F3 CSI_HSYNC 3.3V
EIM_LBA_B
GPIO4_IO2
I2C2_SCL
PWM8_OUT
SIM1_PORT1_PD
UART6_CTS_B
USDHC2_CMD
103 I2C2_SDA F2 CSI_VSYNC 3.3V
EIM_RW
GPIO4_IO19
I2C2_SDA
PWM7_OUT
SIM1_PORT1_CLK
UART6_RTS_B
USDHC2_CLK
104 GND --- --- ---
105
106
107 SNVS_TAMPER5 N8 GPIO5_IO05 3.3V
SNVS_TAMPER5
108 SNVS_TAMPER8 N9 GPIO5_IO08 3.3V
SNVS_TAMPER8
109 SNVS_TAMPER1 R9 GPIO5_IO01 3.3V
SNVS_TAMPER1
110 SNVS_TAMPER4 P9 GPIO5_IO04 3.3V
SNVS_TAMPER4
111 SNVS_TAMPER3 P10 GPIO5_IO03 3.3V
SNVS_TAMPER3
112 SNVS_TAMPER7 N10 GPIO5_IO07 3.3V
SNVS_TAMPER7
113 SNVS_TAMPER0 R10 GPIO5_IO00 3.3V
SNVS_TAMPER0
114 SNVS_TAMPER2 P11 GPIO5_IO02 3.3V
SNVS_TAMPER2
115 SNVS_TAMPER6 N11 GPIO5_IO06 3.3V
SNVS_TAMPER6
116 SNVS_TAMPER9 R6 GPIO5_IO09 3.3V
SNVS_TAMPER9
117 GND --- --- ---
118 PMIC_ON_REQ T9 SNVS_PMIC_ON_REQ 3.3V
119 ONOFF R8 NC 3.3V
120 POR_B P8 RESET 3.3V
121 BOOT_MODE1 U10 SRC_BOOT_MODE1 3.3V
122 BOOT_MODE0 T10 SRC_BOOT_MODE0 3.3V
123 GND --- --- ---
124 USB_OTG2_VBUS U12 USB_VBUS 5V(input)
125 USB_OTG2_DP U13 USB_OTG2_DP 3.3V
126 USB_OTG2_DN T13 USB_OTG2_DN 3.3V
127 GND --- --- ---
128 USB_OTG1_VBUS T12 USB_VBUS 5V(input)
129 USB_OTG1_DP U15 USB_OTG1_DP 3.3V
130 USB_OTG1_DN T15 USB_OTG1_DN 3.3V
131 GND --- --- ---
132 NUSB_OTG_CHD U16 NC 3.3V
133 USB_OTG1_ID K13 ADC_ADC1_IN0 3.3V
ADC_ADC2_IN0
ENET1_1588_EVENT0_IN
GPIO1_IO0
GPT1_CAPTURE1
I2C2_SCL
MQS_RIGHT
USB_OTG1_ID
WDOG3_WDOG_B
XTALOSC_REF_CLK1
134 JTAG_NTRST N14 GPIO1_IO15 3.3V
GPT2_COMPARE3
PWM8_OUT
SAI2_TX_DATA
SJC_TRSTB
135 JTAG_TMS P14 CCM_CLKO1 3.3V
EPIT1_OUT
GPIO1_IO11
GPT2_CAPTURE1
SAI2_MCLK
SDMA_EXT_EVENT1
SJC_TMS
136 JTAG_MOD P15 CCM_PMIC_READY 3.3V
GPIO1_IO10
GPT2_CLK
SDMA_EXT_EVENT0
SJC_MOD
SPDIF_OUT
XTALOSC_ENET_REF_CLK_25M
137 JTAG_TCK M14 GPIO1_IO14 3.3V
GPT2_COMPARE2
PWM7_OUT
SAI2_RX_DATA
SIM2_POWER_FAIL
SJC_TCK
138 JTAG_TDO N15 CCM_CLKO2 3.3V
EPIT2_OUT
GPIO1_IO12
GPT2_CAPTURE2
MQS_RIGHT
SAI2_TX_SYNC
SJC_TDO
139 JTAG_TD1 N16 GPIO1_IO13 3.3V
GPT2_COMPARE1
MQS_LEFT
PWM6_OUT
SAI2_TX_BCLK
SIM1_POWER_FAIL
SJC_TDI
140 GND --- --- ---

I.MX6ULZ（6Z)

核心板管脚号 核心板管脚定义 CPU 管脚号 CPU管脚复用功能 管脚电压
1 CLK1_N P16 CCM_CLK1_N 2.5V
2 CLK1_P P17 CCM_CLK1_P 2.5V
3 WDOG_B N17 CCM_PMIC_READY 3.3V
GPIO1_IO08
PWM1_OUT
WDOG1_WDOG_B
USDHC2_VSELECT
SPDIF_OUT
4 PWM4 M17 GPIO1_IO5 3.3V
PWM4_OUT
USB_OTG2_ID
USDHC1_VSELECT
5 PWM2 M15 GPIO1_IO9 3.3V
PWM2_OUT
SPDIF_IN
USDHC1_RESET_B
USDHC2_RESET_B
WDOG1_WDOG_ANY
6 GPIO4_IO16 E6 EIM_WAIT 3.3V
GPIO4_IO16
NAND_DQS
QSPI_A_SS0_B
SDMA_EXT_EVENT1
SPDIF_EXT_CLK
7 USB_OTG2_PWR L14 GPIO1_IO2 3.3V
GPT1_COMPARE2
I2C1_SCL
SDMA_EXT_EVENT0
UART1_TX_DATA
USB_OTG2_PWR
USDHC1_WP
8 USB_OTG1_OC L15 GPIO1_IO1 3.3V
GPT1_COMPARE1
I2C2_SDA
MQS_LEFT
USB_OTG1_OC
WDOG1_WDOG_B
9 USB_OTG1_PWR M16 GPIO1_IO4 3.3V
PWM3_OUT
USB_OTG1_PWR
USDHC1_RESET_B
XTALOSC_REF_CLK_24M
10 USB_OTG2_OC L17 GPIO1_IO3 3.3V
GPT1_COMPARE3
I2C1_SDA
UART1_RX_DATA
USB_OTG2_OC
USDHC1_CD_B
11 GPIO1_IO23 H14 GPIO1_IO23 3.3V
GPT1_COMPARE3
UART2_RTS_B
12 GPIO1_IO22 J15 GPIO1_IO22 3.3V
GPT1_COMPARE2
SJC_DE_B
UART2_CTS_B
13 GPIO1_IO27 G14 GPIO1_IO27 3.3V
UART3_RTS_B
WDOG1_WDOG_B
14 GPIO1_IO26 H15 GPIO1_IO26 3.3V
UART3_CTS_B
15 GPIO1_IO7 L16 GPIO1_IO7 3.3V
UART1_RTS_B
USB_OTG_HOST_MODE
USDHC2_CD_B
16 GPIO1_IO6 K17 CCM_REF_EN_B 3.3V
GPIO1_IO6
UART1_CTS_B
USB_OTG_PWR_WAKE
USDHC2_WP
17 GPIO2_IO4 E14 GPIO2_IO4 3.3V
KPP_ROW2
WDOG1_WDOG_RST_B_DEB
18 GPIO2_IO5 F15 GPIO2_IO5 3.3V
KPP_COL2
WDOG2_WDOG_RST_B_DEB
19 GPIO2_IO0 F16 GPIO2_IO0 3.3V
KPP_ROW0
PWM1_OUT
UART4_RTS_B
USDHC1_LCTL
20 GPIO2_IO3 E15 GPIO2_IO3 3.3V
KPP_COL1
USDHC2_VSELECT
XTALOSC_REF_CLK_24M
21 GPIO2_IO1 E17 GPIO2_IO1 3.3V
KPP_COL0
PWM2_OUT
UART4_CTS_B
USDHC2_LCTL
22 GPIO2_IO6 F14 GPIO2_IO6 3.3V
GPT1_CLK
KPP_ROW3
23 GPIO2_IO2 E16 GPIO2_IO2 3.3V
KPP_ROW1
USDHC1_VSELECT
24 GPIO2_IO7 D15 EIM_CRE 3.3V
GPIO2_IO7
GPT1_CAPTURE2
KPP_COL3
25 UART1_RXD K16 GPIO1_IO17 3.3V
GPT1_CLK
SPDIF_IN
UART1_RX_DATA
26 UART1_CTS K15 GPIO1_IO18 3.3V
UART1_CTS_B
USDHC1_WP
USDHC2_WP
27 UART1_TXD K14 GPIO1_IO16 3.3V
GPT1_COMPARE1
SPDIF_OUT
UART1_TX_DATA
28 UART1_RTS J14 GPIO1_IO19 3.3V
UART1_RTS_B
USDHC1_CD_B
USDHC2_CD_B
29 UART2_TXD J17 GPIO1_IO20 3.3V
GPT1_CAPTURE1
UART2_TX_DATA
30 UART2_RXD J16 GPIO1_IO21 3.3V
GPT1_CAPTURE2
UART2_RX_DATA
31 UART3_TXD H17 GPIO1_IO24 3.3V
UART2_CTS_B
UART3_TX_DATA
USB_OTG1_ID
32 UART3_RXD H16 EPIT1_OUT 3.3V
GPIO1_IO25
UART2_RTS_B
UART3_RX_DATA
33 UART4_TXD G17 ECSPI2_SCLK 3.3V
GPIO1_IO28
I2C1_SCL
UART4_TX_DATA
34 UART4_RXD G16 ECSPI2_SS0 3.3V
GPIO1_IO29
I2C1_SDA
UART4_RX_DATA
35 GPIO1_IO30 F17 ECSPI2_MOSI 3.3V
GPIO1_IO30
I2C2_SCL
36 GPIO1_IO31 G13 ECSPI2_MISO 3.3V
GPIO1_IO31
I2C2_SDA
37 GPIO2_IO15 D16 EIM_ADDR25 3.3V
GPIO2_IO15
KPP_COL7
WDOG1_WDOG_ANY
38 GPIO2_IO9 C16 GPIO2_IO9 3.3V
KPP_COL4
USB_OTG1_OC
39 GPIO2_IO14 D17 GPIO2_IO14 3.3V
KPP_ROW7
USB_OTG2_ID
40 GPIO2_IO8 C17 GPIO2_IO8 3.3V
KPP_ROW4
USB_OTG1_PWR
41 GPIO2_IO13 B15 EIM_ACLK_FREERUN 3.3V
GPIO2_IO13
KPP_COL6
USB_OTG2_OC
42 GPIO2_IO10 B17 EIM_ADDR26 3.3V
GPIO2_IO10
KPP_ROW5
43 GPIO2_IO12 A16 EIM_EB3_B 3.3V
GPIO2_IO12
KPP_ROW6
USB_OTG2_PWR
44 GPIO2_IO11 A15 EIM_EB2_B 3.3V
GPIO2_IO11
KPP_COL5
XTALOSC_REF_CLK_24M
45 GND --- --- ---
46 5VIN --- --- input
47 5VIN
48 5VIN
49 DCDC_3V3 --- 30mA(Use for LED or Power enable) 3V3(output)
50 VDD_SNVS_IN --- 5mA(Only use for Boot Mode) 3V3(output)
51 GND --- --- ---
52 GND --- --- ---
53 GPIO3_IO28 B16 ECSPI1_MISO 3.3V
EIM_DATA15
GPIO3_IO28
MQS_LEFT
SRC_BT_CFG31
USDHC2_DATA3
54 GPIO3_IO24 D14 EIM_DATA11 3.3V
GPIO3_IO24
SRC_BT_CFG27
USDHC2_CLK
WDOG1_WDOG_ANY
55 GPIO3_IO25 C14 ECSPI1_SCLK 3.3V
EIM_DATA12
GPIO3_IO25
SRC_BT_CFG28
USDHC2_DATA0
56 GPIO3_IO26 B14 ECSPI1_SS0 3.3V
EIM_DATA13
GPIO3_IO26
SRC_BT_CFG29
USDHC2_DATA1
57 GPIO3_IO27 A14 ECSPI1_MOSI 3.3V
EIM_DATA14
GPIO3_IO27
MQS_RIGHT
SRC_BT_CFG30
USDHC2_DATA2
58 GPIO3_IO22 B13 ARM_PLATFORM_TRACE_CTL 3.3V
EIM_DATA9
GPIO3_IO22
SRC_BT_CFG25
USDHC2_DATA7
59 GPIO3_IO23 A13 ARM_PLATFORM_EVENTO 3.3V
EIM_DATA10
GPIO3_IO23
SRC_BT_CFG26
USDHC2_CMD
60 GPIO3_IO18 B12 ARM_PLATFORM_TRACE13 3.3V
EIM_DATA5
GPIO3_IO18
SAI3_TX_BCLK
SRC_BT_CFG13
USDHC2_RESET_B
61 GPIO3_IO19 A12 ARM_PLATFORM_TRACE14 3.3V
EIM_DATA6
GPIO3_IO19
SAI3_RX_DATA
SRC_BT_CFG14
USDHC2_DATA4
62 GPIO3_IO13 B11 ARM_PLATFORM_TRACE8 3.3V
EIM_DATA0
GPIO3_IO13
SRC_BT_CFG8
SPDIF_IN
63 GPIO3_IO14 A11 ARM_PLATFORM_TRACE9 3.3V
EIM_DATA1
GPIO3_IO14
SAI3_MCLK
SRC_BT_CFG9
64 GPIO3_IO12 D11 ARM_PLATFORM_TRACE7 3.3V
ECSPI1_SS3
GPIO3_IO12
SRC_BT_CFG7
SPDIF_EXT_CLK
65 GPIO3_IO11 A10 ARM_PLATFORM_TRACE6 3.3V
ECSPI1_SS2
GPIO3_IO11
SRC_BT_CFG6
SPDIF_LOCK
66 GPIO3_IO10 B10 ARM_PLATFORM_TRACE5 3.3V
ECSPI1_SS1
GPIO3_IO10
SRC_BT_CFG5
SPDIF_OUT
67 GPIO3_IO9 C10 ARM_PLATFORM_TRACE4 3.3V
GPIO3_IO9
SAI1_TX_DATA
SRC_BT_CFG4
SPDIF_SR_CLK
68 GPIO3_IO5 B9 ARM_PLATFORM_TRACE0 3.3V
GPIO3_IO5
PWM1_OUT
SAI1_MCLK
SRC_BT_CFG0
69 GPIO3_IO6 A9 ARM_PLATFORM_TRACE1 3.3V
GPIO3_IO6
PWM2_OUT
SAI1_TX_SYNC
SRC_BT_CFG1
70 GPIO3_IO15 E12 ARM_PLATFORM_TRACE10 3.3V
EIM_DATA2
GPIO3_IO15
SAI3_RX_SYNC
SRC_BT_CFG10
71 GPIO3_IO20 D13 ARM_PLATFORM_TRACE15 3.3V
EIM_DATA7
GPIO3_IO20
SAI3_TX_DATA
SRC_BT_CFG15
USDHC2_DATA5
72 GPIO3_IO21 C13 ARM_PLATFORM_TRACE_CLK 3.3V
EIM_DATA8
GPIO3_IO21
SRC_BT_CFG24
USDHC2_DATA6
73 GPIO3_IO17 C12 ARM_PLATFORM_TRACE12 3.3V
ECSPI1_RDY
EIM_DATA4
GPIO3_IO17
SAI3_TX_SYNC
SRC_BT_CFG12
74 GPIO3_IO16 D12 ARM_PLATFORM_TRACE11 3.3V
EIM_DATA3
GPIO3_IO16
SAI3_RX_BCLK
SRC_BT_CFG11
75 GPIO3_IO8 D10 ARM_PLATFORM_TRACE3 3.3V
GPIO3_IO8
PWM4_OUT
SAI1_RX_DATA
SRC_BT_CFG3
76 GPIO3_IO7 E10 ARM_PLATFORM_TRACE2 3.3V
GPIO3_IO7
PWM3_OUT
SAI1_TX_BCLK
SRC_BT_CFG2
77 GPIO3_IO4 E9 ARM_PLATFORM_EVENTI 3.3V
ECSPI2_SS3
GPIO3_IO4
SAI3_TX_DATA
WDOG1_WDOG_ANY
78 GPIO3_IO3 C9 ECSPI2_SS2 3.3V
GPIO3_IO3
SAI3_RX_SYNC
UART4_RTS_B
WDOG2_WDOG_B
79 GPIO3_IO2 D9 ECSPI2_SS1 3.3V
GPIO3_IO2
SAI3_TX_BCLK
UART4_CTS_B
WDOG3_WDOG_RST_B_DEB
80 GPIO3_IO0 A8 EIM_CS2_B 3.3V
GPIO3_IO0
SAI3_MCLK
UART4_TX_DATA
WDOG1_WDOG_RST_B_DEB
81 GPIO3_IO1 B8 ECSPI2_RDY 3.3V
EIM_CS3_B
GPIO3_IO1
SAI3_TX_SYNC
UART4_RX_DATA
82 GND --- _ ---
83 I2C1_SCL E5 EIM_OE 3.3V
ESAI_TX2_RX3
GPIO4_IO18
I2C1_SCL
NAND_CE3_B
SNVS_VIO_5
USDHC2_WP
84 I2C1_SDA F5 EIM_CS0_B 3.3V
ESAI_TX3_RX2
GPIO4_IO17
I2C1_SDA
NAND_CE2_B
SNVS_VIO_5_CTL
USDHC2_CD_B
85 GPIO4_IO14 B5 EIM_ADDR18 3.3V
GPIO4_IO14
NAND_CE1_B
QSPI_A_DATA2
UART3_CTS_B
USDHC1_DATA6
86 SD1_CLK C1 EIM_ADDR20 3.3V
GPIO2_IO17
SAI2_MCLK
SPDIF_IN
USB_OTG1_OC
USDHC1_CLK
87 SD1_DATA3 A2 CCM_CLKO2 3.3V
EIM_ADDR24
GPIO2_IO21
SAI2_TX_DATA
USB_OTG2_ID
USDHC1_DATA3
88 SD1_DATA0 B3 EIM_ADDR21 3.3V
GPIO2_IO18
SAI2_TX_SYNC
USB_OTG1_ID
USDHC1_DATA0
89 SD1_DATA1 B2 EIM_ADDR22 3.3V
GPIO2_IO19
SAI2_TX_BCLK
USB_OTG2_PWR
USDHC1_DATA1
90 SD1_DATA2 B1 CCM_CLKO1 3.3V
EIM_ADDR23
GPIO2_IO20
SAI2_RX_DATA
USB_OTG2_OC
USDHC1_DATA2
91 SD1_CMD C2 EIM_ADDR19 3.3V
GPIO2_IO16
SAI2_RX_SYNC
SDMA_EXT_EVENT0
SPDIF_OUT
USB_OTG1_PWR
USDHC1_CMD
92 GND --- _ ---
93 ECSPI1_MOSI D2 ECSPI1_MOSI 3.3V
EIM_AD6
ESAI_TX5_RX0
GPIO4_IO27
SAI1_RX_DATA
USDHC1_RESET_B
USDHC2_DATA6
94 ECSPI2_MOSI E2 ECSPI2_MOSI 3.3V
EIM_AD2
ESAI_RX_FS
GPIO4_IO23
SAI1_RX_SYNC
USDHC2_DATA2
95 ECSPI1_MISO D1 ECSPI1_MISO 3.3V
EIM_AD7
ESAI_TX0
GPIO4_IO28
SAI1_TX_DATA
USDHC1_VSELECT
USDHC2_DATA7
96 ECSPI1_SCLK D4 ECSPI1_SCLK 3.3V
EIM_AD4
ESAI_TX_FS
GPIO4_IO25
SAI1_TX_SYNC
USDHC1_WP
USDHC2_DATA4
97 ECSPI2_SCLK E4 ECSPI2_SCLK 3.3V
EIM_AD0
ESAI_TX_HF_CLK
GPIO4_IO21
USDHC2_DATA0
98 ECSPI1_CS0 D3 ECSPI1_SS0 3.3V
EIM_AD5
ESAI_TX_CLK
GPIO4_IO26
SAI1_TX_BCLK
USDHC1_CD_B
USDHC2_DATA5
99 ECSPI2_CS0 E3 ECSPI2_SS0 3.3V
EIM_AD1
ESAI_RX_HF_CLK
GPIO4_IO22
SAI1_MCLK
USDHC2_DATA1
100 ECSPI2_MISO E1 ECSPI2_MISO 3.3V
EIM_AD3
ESAI_RX_CLK
GPIO4_IO24
SAI1_RX_BCLK
USDHC2_DATA3
101 GND --- --- ---
102 I2C2_SCL F3 EIM_LBA_B 3.3V
ESAI_TX1
GPIO4_IO20
I2C2_SCL
USDHC2_CMD
103 I2C2_SDA F2 EIM_RW 3.3V
ESAI_TX4_RX1
GPIO4_IO19
I2C2_SDA
USDHC2_CLK
104 GND --- --- ---
105 GND --- --- ---
106 GND --- --- ---
107 SNVS_TAMPER5 N8 GPIO5_IO05/SNVS_TAMPER5 3.3V
108 SNVS_TAMPER8 N9 GPIO5_IO08/SNVS_TAMPER8 3.3V
109 SNVS_TAMPER1 R9 GPIO5_IO01/SNVS_TAMPER1 3.3V
110 SNVS_TAMPER4 P9 GPIO5_IO04/SNVS_TAMPER4 3.3V
111 SNVS_TAMPER3 P10 GPIO5_IO03/SNVS_TAMPER3 3.3V
112 SNVS_TAMPER7 N10 GPIO5_IO07/SNVS_TAMPER7 3.3V
113 SNVS_TAMPER0 R10 GPIO5_IO00/SNVS_TAMPER0 3.3V
114 SNVS_TAMPER2 P11 GPIO5_IO02/SNVS_TAMPER2 3.3V
115 SNVS_TAMPER6 N11 GPIO5_IO06/SNVS_TAMPER6 3.3V
116 SNVS_TAMPER9 R6 GPIO5_IO09/SNVS_TAMPER9 3.3V
117 GND --- --- ---
118 PMIC_ON_REQ T9 SNVS_PMIC_ON_REQ 3.3V
119 ONOFF R8 NC 3.3V
120 POR_B P8 RESET 3.3V
121 BOOT_MODE1 U10 SRC_BOOT_MODE1 3.3V
122 BOOT_MODE0 T10 SRC_BOOT_MODE0 3.3V
123 GND --- --- ---
124 USB_OTG2_VBUS U12 USB_VBUS 5V(input)
125 USB_OTG2_DP U13 USB_OTG2_DP 3.3V
126 USB_OTG2_DN T13 USB_OTG2_DN 3.3V
127 GND --- --- ---
128 USB_OTG1_VBUS T12 USB_VBUS 5V(input)
129 USB_OTG1_DP U15 USB_OTG1_DP 3.3V
130 USB_OTG1_DN T15 USB_OTG1_DN 3.3V
131 GND --- --- ---
132 NUSB_OTG_CHD U16 NC 3.3V
133 USB_OTG1_ID K13 GPIO1_IO0 3.3V
GPT1_CAPTURE1
I2C2_SCL
MQS_RIGHT
USB_OTG1_ID
WDOG3_WDOG_B
134 GPIO1_IO15 N14 GPIO1_IO15 3.3V
SAI2_TX_DATA
SJC_TRSTB
XTALOSC_REF_CLK_24M
135 GPIO1_IO11 P14 CCM_CLKO1 3.3V
EPIT1_OUT
GPIO1_IO11
SAI2_MCLK
SDMA_EXT_EVENT1
SJC_TMS
136 GPIO1_IO10 P15 CCM_PMIC_READY 3.3V
GPIO1_IO10
SDMA_EXT_EVENT0
SJC_MOD
SPDIF_OUT
137 GPIO1_IO14 M14 GPIO1_IO14 3.3V
SAI2_RX_DATA
SJC_TCK
138 GPIO1_IO12 N15 CCM_CLKO2 3.3V
GPIO1_IO12
MQS_RIGHT
SAI2_TX_SYNC
SJC_TDO
139 GPIO1_IO13 N16 GPIO1_IO13 3.3V
MQS_LEFT
SAI2_TX_BCLK
SJC_TDI
140 GND --- --- ---
取自“http://wiki.myzr.com.cn/index.php?title=MYZR-IMX6-CB140_硬件介绍&oldid=3574”