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== '''管脚详细功能说明(instruction of detailed function of pins)''' ==
+
== '''管脚定义&详细功能说明(Pin definition & detailed functional description)''' ==
−
=== 表1(form 1) ===
 
 
{| class="wikitable"
 
{| class="wikitable"
−
!Pin
+
!Pin NO.
−
!CPU Ball Name  
+
!Pin Name
−
!Pin Name  
+
!CPU Ball Name
−
!功能选择<br>(function selection)
+
!功能描述<br>(functional description)
−
!所属模块<br>(module affiliated)
+
!管脚电压<br>(Pin voltage)
−
!功能描述 <br>(function description)
 
−
!电压<br>(voltage)
 
 
|-
 
|-
−
|1 ||rowspan=5|NC ||rowspan=5|GND ||rowspan=5| ||rowspan=5|电源<br>(power supply) ||rowspan=5|数字地<br>(digitally) ||rowspan=5|0V
+
|1 ||rowspan=5|GND ||rowspan=5| --- ||rowspan=5|--- || rowspan=5|---
 
|-
 
|-
 
|3  
 
|3  
 
|-
 
|-
−
|5  
+
|5
 
|-
 
|-
−
|7  
+
|7
 
|-
 
|-
−
|9  
+
|9
 
|-
 
|-
−
|rowspan=5|11 ||rowspan=5|F15 ||rowspan=5|NANDF_CS0 ||0 ||rawnand ||CE0N ||rowspan=5|3.3V
+
|2 ||rowspan=5|GND ||rowspan=5| --- ||rowspan=5|--- || rowspan=5|---
 
|-
 
|-
−
|3 ||usboh3 ||UH3_DFD_OUT[15]
+
|4
 
|-
 
|-
−
|4 ||usboh3 ||UH2_DFD_OUT[15]
+
|6
 
|-
 
|-
−
|5 ||gpio6 ||GPIO[11]
+
|8
 
|-
 
|-
−
|7 ||pl301_mx6q_per1 ||HSIZE[2]
+
|10
 
|-
 
|-
−
|rowspan=6|13 ||rowspan=6|C16 ||rowspan=6|NANDF_CS1 ||0 ||rawnand ||CE1N ||rowspan=6|3.3V
+
|rowspan=2|11 ||rowspan=2|NANDF_CS0 ||rowspan=2|F15 || NAND_CE0_B ||rowspan=2|3.3V  
 
|-
 
|-
−
| 1 ||usdhc4 ||VSELECT
+
|GPIO6_IO11
 
|-
 
|-
−
| 2 ||usdhc3 ||VSELECT
+
|12||rowspan=4|3P3V ||rowspan=4| --- ||rowspan=4|--- || rowspan=4| 3.3V(output)
 
|-
 
|-
−
| 4 ||pcie_ctrl ||DIAG_STATUS_BUS_MUX[3]
+
|14
 
|-
 
|-
−
| 5 ||gpio6 ||GPIO[14]
+
|16
 
|-
 
|-
−
| 7 ||pl301_mx6q_per1 ||HREADYOUT
+
|18
−
|-
 
−
|rowspan=7|15 ||rowspan=7|A17 ||rowspan=7|NANDF_CS2 ||0 ||rawnand ||CE2N ||rowspan=7|3.3V
 
−
|-
 
−
| 1 ||ipu1 ||SISG[0]
 
−
|-
 
−
| 2 ||esai1 ||TX0
 
−
|-
 
−
| 3 ||weim ||WEIM_CRE
 
−
|-
 
−
| 4 ||ccm ||CLKO2
 
−
|-
 
−
| 5 ||gpio6 ||GPIO[15]
 
−
|-
 
−
| 6 ||ipu2 ||SISG[0]
 
−
|-
 
−
|rowspan=7|17 ||rowspan=7|A21 ||rowspan=7|SD1_DAT0 ||0 ||usdhc1 ||DAT0 ||rowspan=7|3.3V
 
−
|-
 
−
| 1 ||ecspi5 ||MISO
 
−
|-
 
−
| 2 ||caam_wrapper ||RNG_OSC_OBS
 
−
|-
 
−
| 3 ||gpt ||CAPIN1
 
−
|-
 
−
| 4 ||pcie_ctrl ||DIAG_STATUS_BUS_MUX[8]
 
−
|-
 
−
| 5 ||gpio1 ||GPIO[16]
 
−
|-
 
−
| 6 ||hdmi_tx ||OPHYDTB[1]
 
−
|-
 
−
|rowspan=7|19 ||rowspan=7|D15 ||rowspan=7|SD3_RST ||0 ||usdhc3 ||RST ||rowspan=13|3.3V
 
−
|-
 
−
| 1 ||uart3 ||RTS
 
−
|-
 
−
| 2 ||pcie_ctrl ||DIAG_STATUS_BUS_MUX[30]
 
−
|-
 
−
| 3 ||usboh3 ||UH3_DFD_OUT[10]
 
−
|-
 
−
| 4 ||usboh3 ||UH2_DFD_OUT[10]
 
−
|-
 
−
| 5 ||gpio7 ||GPIO[8]
 
−
|-
 
−
| 6 ||mipi_core ||DPHY_TEST_IN[22]
 
−
|-
 
−
|rowspan=6|21 ||rowspan=6|W6 ||rowspan=6|KEY_COL2 ||2 ||can1 ||TXCAN
 
−
|-
 
−
| 3 ||kpp ||COL[2]
 
−
|-
 
−
| 4 ||enet ||MDC
 
−
|-
 
−
| 5 ||gpio4 ||GPIO[10]
 
−
|-
 
−
| 6 ||usboh3 ||H1USB_PWRCTL_WAKEUP
 
−
|-
 
−
| 7 ||pl301_mx6q_per1 ||HADDR[3]
 
−
|-
 
−
|rowspan=7|23 ||rowspan=7|G20 ||rowspan=7|EIM_D20 ||0 ||weim ||WEIM_D[20] ||rowspan=7|3.3V
 
−
|-
 
−
| 1 ||ecspi4 ||SS0
 
−
|-
 
−
| 2 ||ipu1 ||DI0_PIN16
 
−
|-
 
−
|3 ||ipu2 ||CSI1_D[15]
 
−
|-
 
−
| 4 ||uart1 ||RTS
 
−
|-
 
−
| 5 ||gpio3 ||GPIO[20]
 
−
|-
 
−
| 6 ||epit2 ||EPITO
 
−
|-
 
−
|rowspan=7|25 ||rowspan=7|K20 ||rowspan=7|CSPI2_CS0 ||0 ||weim ||WEIM_RW ||rowspan=7|3.3V
 
−
|-
 
−
| 1 ||ipu1 ||DI1_PIN8
 
−
|-
 
−
| 2 ||ecspi2 ||SS0
 
−
|-
 
−
| 4 ||mipi_core ||DPHY_TEST_OUT[27]
 
−
|-
 
−
| 5 ||gpio2 ||GPIO[26]
 
−
|-
 
−
| 6 ||tpsmp ||HDATA[10]
 
−
|-
 
−
| 7 ||src ||BT_CFG[29]
 
−
|-
 
−
|rowspan=8|27 ||rowspan=8|H19 ||rowspan=8|CSPI2_RDY ||0 ||weim ||WEIM_A[25] ||rowspan=8|3.3V
 
−
|-
 
−
| 1 ||ecspi4 ||SS1
 
−
|-
 
−
| 2 ||ecspi2 ||RDY
 
−
|-
 
−
| 3 ||ipu1 ||DI1_PIN12
 
−
|-
 
−
| 4 ||ipu1 ||DI0_D1_CS
 
−
|-
 
−
| 5 ||gpio5 ||GPIO[2]
 
−
|-
 
−
| 6 ||hdmi_tx ||CEC_LINE
 
−
|-
 
−
| 7 ||pl301_mx6q_per1 ||HBURST[0]
 
−
|-
 
−
|rowspan=6|29 ||rowspan=6|J23 ||rowspan=6|CSPI2_MOSI ||0 ||weim ||WEIM_CS[1] ||rowspan=6|3.3V
 
−
|-
 
−
| 1 ||ipu1 ||DI1_PIN6
 
−
|-
 
−
| 2 ||ecspi2 ||MOSI
 
−
|-
 
−
| 4 ||mipi_core ||DPHY_TEST_OUT[25]
 
−
|-
 
−
| 5 ||gpio2 ||GPIO[24]
 
−
|-
 
−
| 6 ||tpsmp ||HDATA[8]
 
−
|-
 
−
|rowspan=6|31 ||rowspan=6|H24 ||rowspan=6|CSPI2_CLK ||0 ||weim ||WEIM_CS[0] ||rowspan=6|3.3V
 
−
|-
 
−
| 1 ||ipu1 ||DI1_PIN5
 
−
|-
 
−
| 2 ||ecspi2 ||SCLK
 
−
|-
 
−
| 4 ||mipi_core ||DPHY_TEST_OUT[24]
 
−
|-
 
−
| 5 ||gpio2 ||GPIO[23]
 
−
|-
 
−
| 6 ||tpsmp ||HDATA[7]
 
−
|-
 
−
|rowspan=6|33 ||rowspan=6|K22 ||rowspan=6|CSPI2_CS1 ||0 ||weim ||WEIM_LBA ||rowspan=6|3.3V
 
−
|-
 
−
| 1 ||ipu1 ||DI1_PIN17
 
−
|-
 
−
| 2 ||ecspi2 ||SS1
 
−
|-
 
−
| 5 ||gpio2 ||GPIO[27]
 
−
|-
 
−
| 6 ||tpsmp ||HDATA[11]
 
−
|-
 
−
| 7 ||src ||BT_CFG[26]
 
−
|-
 
−
|rowspan=6|35 ||rowspan=6|J24 ||rowspan=6|CSPI2_MISO ||0 ||weim ||WEIM_OE ||rowspan=6|3.3V
 
−
|-
 
−
| 1 ||ipu1 ||DI1_PIN7
 
−
|-
 
−
| 2 ||ecspi2 ||MISO
 
−
|-
 
−
| 4 ||mipi_core ||DPHY_TEST_OUT[26]
 
−
|-
 
−
| 5 ||gpio2 ||GPIO[25]
 
−
|-
 
−
| 6 ||tpsmp ||HDATA[9]
 
−
|-
 
−
|37 ||D12 ||MX6_ONOFF || ||MX6_ONOFF ||ON/OFF ||3.3V
 
−
|-
 
−
|39 ||NC ||nRESET || ||nRESET ||nRESET ||3.3V
 
−
|-
 
−
|rowspan=8|41 ||rowspan=8|E22 ||rowspan=8|CSPI1_CS0 ||0 ||weim ||WEIM_EB[2] ||rowspan=8|3.3V
 
−
|-
 
−
| 1 ||ecspi1 ||SS0
 
−
|-
 
−
| 2 ||ccm ||DI1_EXT_CLK
 
−
|-
 
−
| 3 ||ipu2 ||CSI1_D[19]
 
−
|-
 
−
| 4 ||hdmi_tx ||DDC_SCL
 
−
|-
 
−
| 5 ||gpio2 ||GPIO[30]
 
−
|-
 
−
| 6 ||i2c2 ||SCL
 
−
|-
 
−
| 7 ||src ||BT_CFG[30]
 
−
|-
 
−
|rowspan=8|43 ||rowspan=8|F21 ||rowspan=8|CSPI1_MISO ||0 ||weim ||WEIM_D[17] ||rowspan=8|3.3V
 
−
|-
 
−
| 1 ||ecspi1 ||MISO
 
−
|-
 
−
| 2 ||ipu1 ||DI0_PIN6
 
−
|-
 
−
| 3 ||ipu2 ||CSI1_PIXCLK
 
−
|-
 
−
| 4 ||dcic1 ||DCIC_OUT
 
−
|-
 
−
| 5 ||gpio3 ||GPIO[17]
 
−
|-
 
−
| 6 ||i2c3 ||SCL
 
−
|-
 
−
| 7 ||pl301_mx6q_per1 ||HBURST[1]
 
−
|-
 
−
|rowspan=8|45 ||rowspan=8|D24 ||rowspan=8|CSPI1_MOSI ||0 ||weim ||WEIM_D[18] ||rowspan=8|3.3V
 
−
|-
 
−
| 1 ||ecspi1 ||MOSI
 
−
|-
 
−
| 2 ||ipu1 ||DI0_PIN7
 
−
|-
 
−
| 3 ||ipu2 ||CSI1_D[17]
 
−
|-
 
−
| 4 ||ipu1 ||DI1_D0_CS
 
−
|-
 
−
| 5 ||gpio3 ||GPIO[18]
 
−
|-
 
−
| 6 ||i2c3 ||SDA
 
−
|-
 
−
| 7 ||pl301_mx6q_per1 ||HBURST[2]
 
−
|-
 
−
|rowspan=7|47 ||rowspan=7|C25 ||rowspan=7|CSPI1_CLK ||0 ||weim ||WEIM_D[16] ||rowspan=7|3.3V
 
−
|-
 
−
| 1 ||ecspi1 ||SCLK
 
−
|-
 
−
| 2 ||ipu1 ||DI0_PIN5
 
−
|-
 
−
| 3 ||ipu2 ||CSI1_D[18]
 
−
|-
 
−
| 4 ||hdmi_tx ||DDC_SDA
 
−
|-
 
−
| 5 ||gpio3 ||GPIO[16]
 
−
|-
 
−
| 6 ||i2c2 ||SDA
 
−
|-
 
−
|rowspan=8|49 ||rowspan=8|P5 ||rowspan=8|CSPI1_RDY ||0 ||kpp ||COL[5] ||rowspan=8|3.3V
 
−
|-
 
−
| 1 ||enet ||1588_EVENT0_OUT
 
−
|-
 
−
| 2 ||spdif ||OUT1
 
−
|-
 
−
| 3 ||ccm ||CLKO
 
−
|-
 
−
| 4 ||ecspi1 ||RDY
 
−
|-
 
−
| 5 ||gpio4 ||GPIO[5]
 
−
|-
 
−
| 6 ||enet ||TX_ER
 
−
|-
 
−
| 7 ||src ||INT_BOOT
 
−
|-
 
−
|51 ||NC ||GND || || || ||0V
 
−
|-
 
−
|rowspan=7|53 ||rowspan=7|B15 ||rowspan=7|SD3_DATA3 ||0 ||usdhc3 ||DAT3 ||rowspan=7|3.3V
 
−
|-
 
−
|1 ||uart3 ||CTS
 
−
|-
 
−
| 2 ||pcie_ctrl ||DIAG_STATUS_BUS_MUX[29]
 
−
|-
 
−
|3 ||usboh3 ||UH3_DFD_OUT[9]
 
−
|-
 
−
| 4 ||usboh3 ||UH2_DFD_OUT[9]
 
−
|-
 
−
| 5 ||gpio7 ||GPIO[7]
 
−
|-
 
−
| 6 ||mipi_core ||DPHY_TEST_IN[21]
 
−
|-
 
−
|rowspan=6|55 ||rowspan=6|A15 ||rowspan=6|SD3_DATA2 ||0 ||usdhc3 ||DAT2 ||rowspan=6|3.3V
 
−
|-
 
−
| 2 ||pcie_ctrl ||DIAG_STATUS_BUS_MUX[28]
 
−
|-
 
−
| 3 ||usboh3 ||UH3_DFD_OUT[8]
 
−
|-
 
−
| 4 ||usboh3 ||UH2_DFD_OUT[8]
 
−
|-
 
−
| 5 ||gpio7 ||GPIO[6]
 
−
|-
 
−
| 6 ||mipi_core ||DPHY_TEST_IN[20]
 
−
|-
 
−
|rowspan=7|57 ||rowspan=7|B13 ||rowspan=7|SD3_CMD ||0 ||usdhc3 ||CMD ||rowspan=7|3.3V
 
−
|-
 
−
| 1 ||uart2 ||CTS
 
−
|-
 
−
| 2 ||can1 ||TXCAN
 
−
|-
 
−
| 3 ||usboh3 ||UH3_DFD_OUT[4]
 
−
|-
 
−
| 4 ||usboh3 ||UH2_DFD_OUT[4]
 
−
|-
 
−
| 5 ||gpio7 ||GPIO[2]
 
−
|-
 
−
| 6 ||mipi_core ||DPHY_TEST_IN[16]
 
−
|-
 
−
|rowspan=7|59 ||rowspan=7|D14 ||rowspan=7|SD3_CLK ||0 ||usdhc3 ||CLK ||rowspan=7|3.3V
 
−
|-
 
−
| 1 ||uart2 ||RTS
 
−
|-
 
−
| 2 ||can1 ||RXCAN
 
−
|-
 
−
| 3 ||usboh3 ||UH3_DFD_OUT[5]
 
−
|-
 
−
| 4 ||usboh3 ||UH2_DFD_OUT[5]
 
−
|-
 
−
| 5 ||gpio7 ||GPIO[3]
 
−
|-
 
−
| 6 ||mipi_core ||DPHY_TEST_IN[17]
 
−
|-
 
−
|rowspan=7|61 ||rowspan=7|F14 ||rowspan=7|SD3_DATA1 ||0 ||usdhc3 ||DAT1 ||rowspan=7|3.3V
 
−
|-
 
−
| 1 ||uart1 ||RTS
 
−
|-
 
−
| 2 ||can2 ||RXCAN
 
−
|-
 
−
| 3 ||usboh3 ||UH3_DFD_OUT[7]
 
−
|-
 
−
| 4 ||usboh3 ||UH2_DFD_OUT[7]
 
−
|-
 
−
| 5 ||gpio7 ||GPIO[5]
 
−
|-
 
−
| 6 ||mipi_core ||DPHY_TEST_IN[19]
 
−
|-
 
−
|rowspan=7|63 ||rowspan=7|E14 ||rowspan=7|SD3_DATA0 ||0 ||usdhc3 ||DAT0 ||rowspan=7|3.3V
 
−
|-
 
−
| 1 ||uart1 ||CTS
 
−
|-
 
−
| 2 ||can2 ||TXCAN
 
−
|-
 
−
| 3 ||usboh3 ||UH3_DFD_OUT[6]
 
−
|-
 
−
| 4 ||usboh3 ||UH2_DFD_OUT[6]
 
−
|-
 
−
| 5 ||gpio7 ||GPIO[4]
 
−
|-
 
−
| 6 ||mipi_core ||DPHY_TEST_IN[18]
 
−
|-
 
−
|65 ||NC ||GND || || || ||0V
 
−
|-
 
−
|rowspan=7|67 ||rowspan=7|C13 ||rowspan=7|USB_H1_PWR_EN ||0 ||usdhc3 ||DAT5 ||rowspan=7|3.3V
 
−
|-
 
−
| 1 ||uart2 ||TXD_MUX
 
−
|-
 
−
| 2 ||pcie_ctrl ||DIAG_STATUS_BUS_MUX[26]
 
−
|-
 
−
| 3 ||usboh3 ||UH3_DFD_OUT[2]
 
−
|-
 
−
| 4 ||usboh3 ||UH2_DFD_OUT[2]
 
−
|-
 
−
| 5 ||gpio7 ||GPIO[0]
 
−
|-
 
−
| 6 ||mipi_core ||DPHY_TEST_IN[14]
 
−
|-
 
−
|69 ||F10 ||USB_HOST_DN || ||USBHOST ||USB_HOST_DN ||2.5V
 
−
|-
 
−
|71 ||E10 ||USB_HOST_DP || ||USBHOST ||USB_HOST_DP ||2.5V
 
−
|-
 
−
|rowspan=8|73 ||rowspan=8|J20 ||rowspan=8|USB_H1_OC ||0 ||weim ||WEIM_D[30] ||rowspan=8|3.3V
 
−
|-
 
−
| 1 ||ipu1 ||DISP1_DAT[21]
 
−
|-
 
−
| 2 ||ipu1 ||DI0_PIN11
 
−
|-
 
−
| 3 ||ipu1 ||CSI0_D[3]
 
−
|-
 
−
| 4 ||uart3 ||CTS
 
−
|-
 
−
| 5 ||gpio3 ||GPIO[30]
 
−
|-
 
−
| 6 ||usboh3 ||USBH1_OC
 
−
|-
 
−
| 7 ||pl301_mx6q_per1 ||HPROT[0]
 
−
|-
 
−
|75 ||D10 ||USB_H1_VBUS || || ||USB_H1_VBUS ||5V
 
−
|-
 
−
|77 ||D1 ||CSI_D1M || ||rowspan=6|CSI_MIPI ||CSI_D1M ||rowspan=6|2.5V
 
−
|-
 
−
|79 ||D2 ||CSI_D1P ||  ||CSI_D1P
 
−
|-
 
−
|81 ||E4 ||CSI_D0M ||  ||CSI_D0M
 
−
|-
 
−
|83 ||E3 ||CSI_D0P ||  ||CSI_D0P
 
 
|-
 
|-
−
|85 ||F4 ||CSI_CLK0M || ||CSI_CLK0M
+
|rowspan=4|13 ||rowspan=4| NANDF_CS1 ||rowspan=4|C16 || NAND_CE1_B || rowspan=4| 3.3V
 
|-
 
|-
−
|87 ||F3 ||CSI_CLK0P ||  ||CSI_CLK0P
+
|SD4_VSELECT
 
|-
 
|-
−
|rowspan=8|89 ||rowspan=8|M3 ||rowspan=8|UART1_RX ||0 ||ipu1 ||CSI0_D[11] ||rowspan=8|2.5V
+
|SD3_VSELECT
 
|-
 
|-
−
| 1 ||audmux ||AUD3_RXFS
+
|GPIO6_IO14
 
|-
 
|-
−
| 2 ||ecspi2 ||SS0
+
|rowspan=7|15 ||rowspan=7| NANDF_CS2 ||rowspan=7| A17 || NAND_CE2_B || rowspan=7| 3.3V
 
|-
 
|-
−
| 3 ||uart1 ||RXD_MUX
+
|IPU1_SISG0
 
|-
 
|-
−
| 4 ||sdma ||DEBUG_PC[5]
+
|ESAI_TX0
 
|-
 
|-
−
| 5 ||gpio5 ||GPIO[29]
+
|EIM_CRE
 
|-
 
|-
−
| 6 ||mmdc ||MMDC_DEBUG[34]
+
|CCM_CLKO2
 
|-
 
|-
−
| 7 ||ARMCortexA9 MPCorePlatform ||TRACE[8]
+
|GPIO6_IO15
 
|-
 
|-
−
|rowspan=8|91 ||rowspan=8|M1 ||rowspan=8|UART1_TX ||0 ||ipu1 ||CSI0_D[10] ||rowspan=8|2.5V
+
|IPU2_SISG0
 
|-
 
|-
−
| 1 ||audmux ||AUD3_RXC
+
|rowspan=4|17 ||rowspan=4| SD1_DAT0/CSI0_PWN ||rowspan=4| A21 || SD1_DATA0 || rowspan=4| 3.3V
 
|-
 
|-
−
| 2 ||ecspi2 ||MISO
+
|ECSPI5_MISO
 
|-
 
|-
−
| 3 ||uart1 ||TXD_MUX
+
|GPT_CAPTURE1
 
|-
 
|-
−
| 4 ||sdma ||DEBUG_PC[4]
+
|GPIO1_IO16
 
|-
 
|-
−
| 5 ||gpio5 ||GPIO[28]
+
|rowspan=3|19 ||rowspan=3| SD3_RST/SD3_WP ||rowspan=3| D15 || SD3_RESET  || rowspan=3| 3.3V
 
|-
 
|-
−
| 6 ||mmdc ||MMDC_DEBUG[33]
+
|UART3_RTS_B
 
|-
 
|-
−
| 7 ||ARMCortexA9 MPCorePlatform ||TRACE[7]
+
|GPIO7_IO08
 
|-
 
|-
−
|93 ||NC ||GND || || || ||0V
+
|rowspan=4| 20 ||rowspan=4| GPIO_4/SLEEP WAKE ||rowspan=4| R6 || ESAI_TX_HF_CLK || rowspan=4| 3.3V
 
|-
 
|-
−
|rowspan=8|95 ||rowspan=8|L3 ||rowspan=8|CSI0_DAT17 ||0 ||ipu1 ||CSI0_D[17] ||rowspan=8|2.5V
+
|KEY_COL7
 
|-
 
|-
−
| 1 ||weim ||WEIM_D[13]
+
|GPIO1_IO04
 
|-
 
|-
−
| 2 ||pcie_ctrl ||DIAG_STATUS_BUS_MUX[21]
+
|SD2_CD_B
 
|-
 
|-
−
| 3 ||uart4 ||CTS
+
|rowspan=7|21 ||rowspan=7| KEY_COL2/SD3_CD_B ||rowspan=7| W6 || ECSPI1_SS1  || rowspan=7| 3.3V
 
|-
 
|-
−
| 4 ||sdma ||DEBUG_PC[11]
+
|ENET_RX_DATA2
 
|-
 
|-
−
| 5 ||gpio6 ||GPIO[3]
+
|FLEXCAN1_TX
 
|-
 
|-
−
| 6 ||mmdc ||MMDC_DEBUG[40]
+
|KEY_COL2
 
|-
 
|-
−
| 7 ||ARMCortexA9 MPCorePlatform ||TRACE[14]
+
|ENET_MDC
 
|-
 
|-
−
|rowspan=8|97 ||rowspan=8|L4 ||rowspan=8|CSI0_DAT16 ||0 ||ipu1 ||CSI0_D[16] ||rowspan=8|2.5V
+
|GPIO4_IO10
 
|-
 
|-
−
| 1 ||weim ||WEIM_D[12]
+
|USB_H1_PWR_CTL_WAKE
 
|-
 
|-
−
| 2 ||pcie_ctrl ||DIAG_STATUS_BUS_MUX[20]
+
|rowspan=3|22 ||rowspan=3| EIM_BCLK/VOL+ ||rowspan=3| N22 ||EIM_BCLK  || rowspan=3| 3.3V
 
|-
 
|-
−
| 3 ||uart4 ||RTS
+
|IPU1_DI1_PIN16
 
|-
 
|-
−
| 4 ||sdma ||DEBUG_PC[10]
+
|GPIO6_IO31
 
|-
 
|-
−
| 5 ||gpio6 ||GPIO[2]
+
|rowspan=7|23 ||rowspan=7| EIM_D20 ||rowspan=7| G20 || EIM_DATA20  || rowspan=7| 3.3V
 
|-
 
|-
−
| 6 ||mmdc ||MMDC_DEBUG[39]
+
|ECSPI4_SS0
 
|-
 
|-
−
| 7 ||ARMCortexA9 MPCorePlatform ||TRACE[13]
+
|IPU1_DI0_PIN16
 
|-
 
|-
−
|rowspan=8|99 ||rowspan=8|M4 ||rowspan=8|CSI0_DAT14 ||0 ||ipu1 ||CSI0_D[14] ||rowspan=8|2.5V
+
|IPU2_CSI1_DATA15
 
|-
 
|-
−
| 1 ||weim ||WEIM_D[10]
+
|UART1_RTS_B
 
|-
 
|-
−
| 2 ||pcie_ctrl ||DIAG_STATUS_BUS_MUX[18]
+
|GPIO3_IO20
 
|-
 
|-
−
| 3 ||uart5 ||TXD_MUX
+
|EPIT2_OUT
 
|-
 
|-
−
| 4 ||sdma ||DEBUG_PC[8]
+
|rowspan=4| 24 ||rowspan=4|CSI0_DATA_EN/VOL- ||rowspan=4| P3 ||IPU1_CSI0_DATA_EN  || rowspan=4| 2.5V
 
|-
 
|-
−
| 5 ||gpio6 ||GPIO[0]
+
|EIM_DATA00
 
|-
 
|-
−
| 6 ||mmdc ||MMDC_DEBUG[37]
+
|GPIO5_IO20
 
|-
 
|-
−
| 7 ||ARMCortexA9 MPCorePlatform ||TRACE[11]
+
|ARM_TRACE_CLK
 
|-
 
|-
−
|rowspan=7|101 ||rowspan=7|L6 ||rowspan=7|CSI0_DAT19 ||0 ||ipu1 ||CSI0_D[19] ||rowspan=7|2.5V
+
|rowspan=5| 25 ||rowspan=5|CSPI2_CS0||rowspan=5| K20 || EIM_RW  || rowspan=5| 3.3V
 
|-
 
|-
−
| 1 ||weim ||WEIM_D[15]
+
|IPU1_DI1_PIN08
 
|-
 
|-
−
| 2 ||pcie_ctrl ||DIAG_STATUS_BUS_MUX[23]
+
|ECSPI2_SS0
 
|-
 
|-
−
| 3 ||uart5 ||CTS
+
|GPIO2_IO26
 
|-
 
|-
−
| 4 ||sdma ||DEBUG_PC[13]
+
|SRC_BOOT_CFG29
 
|-
 
|-
−
| 5 ||gpio6 ||GPIO[5]
+
|rowspan=8| 26 ||rowspan=8| UART2_CTS ||rowspan=8| G23 || EIM_DATA28  || rowspan=8| 3.3V
 
|-
 
|-
−
| 6 ||mmdc ||MMDC_DEBUG[42]
+
|I2C1_SDA
 
|-
 
|-
−
|rowspan=8|103 ||rowspan=8|M6 ||rowspan=8|CSI0_DAT18 ||0 ||ipu1 ||CSI0_D[18] ||rowspan=8|2.5V
+
|ECSPI4_MOSI
 
|-
 
|-
−
| 1 ||weim ||WEIM_D[14]
+
|IPU2_CSI1_DATA12
 
|-
 
|-
−
| 2 ||pcie_ctrl ||DIAG_STATUS_BUS_MUX[22]
+
|UART2_CTS_B
 
|-
 
|-
−
| 3 ||uart5 ||RTS
+
|GPIO3_IO28
 
|-
 
|-
−
| 4 ||sdma ||DEBUG_PC[12]
+
|IPU1_EXT_TRIG
 
|-
 
|-
−
| 5 ||gpio6 ||GPIO[4]
+
|IPU1_DI0_PIN13
 
|-
 
|-
−
| 6 ||mmdc ||MMDC_DEBUG[41]
+
|rowspan=7| 27 ||rowspan=7| CSPI2_RDY ||rowspan=7| H19 || EIM_ADDR25 || rowspan=7| 3.3V
 
|-
 
|-
−
| 7 ||ARMCortexA9 MPCorePlatform ||TRACE[15]
+
|ECSPI4_SS1
 
|-
 
|-
−
|rowspan=8|105 ||rowspan=8|L1 ||rowspan=8|CSI0_DAT13 ||0 ||ipu1 ||CSI0_D[13] ||rowspan=8|2.5V
+
|ECSPI2_RDY
 
|-
 
|-
−
| 1 ||weim ||WEIM_D[9]
+
|IPU1_DI1_PIN12
 
|-
 
|-
−
| 2 ||pcie_ctrl ||DIAG_STATUS_BUS_MUX[17]
+
|IPU1_DI0_D1_CS
 
|-
 
|-
−
| 3 ||uart4 ||RXD_MUX
+
|GPIO5_IO02
 
|-
 
|-
−
| 4 ||sdma ||DEBUG_PC[7]
+
|HDMI_TX_CEC_LINE
 
|-
 
|-
−
| 5 ||gpio5 ||GPIO[31]
+
|rowspan=7| 28 ||rowspan=7| UART2_RTS ||rowspan=7| J19 || EIM_DATA29 || rowspan=7| 3.3V
 
|-
 
|-
−
| 6 ||mmdc ||MMDC_DEBUG[36]
+
|IPU1_DI1_PIN15
 
|-
 
|-
−
| 7 ||ARMCortexA9 MPCorePlatform ||TRACE[10]
+
|ECSPI4_SS0
 
|-
 
|-
−
|rowspan=8|107 ||rowspan=8|M2 ||rowspan=8|CSI0_DAT12 ||0 ||ipu1 ||CSI0_D[12] ||rowspan=8|2.5V
+
|UART2_RTS_B
 
|-
 
|-
−
| 1 ||weim ||WEIM_D[8]
+
|GPIO3_IO29
 
|-
 
|-
−
| 2 ||pcie_ctrl ||DIAG_STATUS_BUS_MUX[16]
+
|IPU2_CSI1_VSYNC
 
|-
 
|-
−
| 3 ||uart4 ||TXD_MUX
+
|IPU1_DI0_PIN14
 
|-
 
|-
−
| 4 ||sdma ||DEBUG_PC[6]
+
|rowspan=4| 29 ||rowspan=4| CSPI2_MOSI ||rowspan=4| J23 || EIM_CS1_B  || rowspan=4| 3.3V
 
|-
 
|-
−
| 5 ||gpio5 ||GPIO[30]
+
|IPU1_DI1_PIN06
 
|-
 
|-
−
| 6 ||mmdc ||MMDC_DEBUG[35]
+
|ECSPI2_MOSI
 
|-
 
|-
−
| 7 ||ARMCortexA9 MPCorePlatform ||TRACE[9]
+
|GPIO2_IO24
 
|-
 
|-
−
|rowspan=7|109 ||rowspan=7|N2 ||rowspan=7|CSI0_VSYNCH ||0 ||ipu1 ||CSI0_VSYNC ||rowspan=7|2.5V
+
|rowspan=8| 30 ||rowspan=8| UART2_TXD ||rowspan=8| E24 || EIM_DATA26 || rowspan=8| 3.3V
 
|-
 
|-
−
| 1 ||weim ||WEIM_D[1]
+
|IPU1_DI1_PIN11
 
|-
 
|-
−
| 2 ||pcie_ctrl ||DIAG_STATUS_BUS_MUX[15]
+
|IPU1_CSI0_DATA01
 
|-
 
|-
−
| 4 ||sdma ||DEBUG_PC[3]
+
|IPU2_CSI1_DATA14
 
|-
 
|-
−
| 5 ||gpio5 ||GPIO[21]
+
|UART2_TX_DATA
 
|-
 
|-
−
| 6 ||mmdc ||MMDC_DEBUG[32]
+
|UART2_TX_DATA
 
|-
 
|-
−
| 7 ||ARMCortexA9 MPCorePlatform ||TRACE[0]
+
|IPU1_SISG2
 
|-
 
|-
−
|rowspan=6|111 ||rowspan=6|P1 ||rowspan=6|CSI0_PIXCLK ||0 ||ipu1 ||CSI0_PIXCLK ||rowspan=6|2.5V
+
|IPU1_DISP1_DATA22
 
|-
 
|-
−
|2 ||pcie_ctrl ||DIAG_STATUS_BUS_MUX[12]
+
|rowspan=4| 31 ||rowspan=4| CSPI2_CLK ||rowspan=4| H24 || EIM_CS0_B  || rowspan=4| 3.3V
 
|-
 
|-
−
|4 ||sdma ||DEBUG_PC[0]
+
|IPU1_DI1_PIN05
 
|-
 
|-
−
|5 ||gpio5 ||GPIO[18]
+
|ECSPI2_SCLK
 
|-
 
|-
−
|6 ||mmdc ||MMDC_DEBUG[29]
+
|GPIO2_IO23
 
|-
 
|-
−
|7 ||ARMCortexA9 MPCorePlatform ||EVENTO
+
|rowspan=8| 32 ||rowspan=8| UART2_RXD ||rowspan=8| E25 || EIM_DATA27 || rowspan=8| 3.3V
 
|-
 
|-
−
|rowspan=7|113 ||rowspan=7|P4 ||rowspan=7|CSI0_HSYNCH ||0 ||ipu1 ||CSI0_HSYNC ||rowspan=7|2.5V
+
|IPU1_DI1_PIN13
 
|-
 
|-
−
| 2 ||pcie_ctrl ||DIAG_STATUS_BUS_MUX[13]
+
|IPU1_CSI0_DATA00
 +
|-             
 +
|IPU2_CSI1_DATA13
 
|-
 
|-
−
| 3 ||ccm ||CLKO
+
|UART2_RX_DATA
 
|-
 
|-
−
| 4 ||sdma ||DEBUG_PC[1]
+
|GPIO3_IO27 
 
|-
 
|-
−
| 5 ||gpio5 ||GPIO[19]
+
|IPU1_SISG3
 
|-
 
|-
−
| 6 ||mmdc ||MMDC_DEBUG[30]
+
|IPU1_DISP1_DATA23 
 
|-
 
|-
−
| 7 ||ARMCortexA9 MPCorePlatform ||TRCTL
+
|rowspan=5| 33 ||rowspan=5| CSPI2_CS1 ||rowspan=5| K22 || EIM_LBA_B || rowspan=5| 3.3V
 
|-
 
|-
−
|rowspan=8|115 ||rowspan=8|M5 ||rowspan=8|CSI0_DAT15 ||0 ||ipu1 ||CSI0_D[15] ||rowspan=8|2.5V
+
|IPU1_DI1_PIN17
 +
|- 
 +
|ECSPI2_SS1
 
|-
 
|-
−
| 1 ||weim ||WEIM_D[11]
+
|GPIO2_IO27
 
|-
 
|-
−
| 2 ||pcie_ctrl ||DIAG_STATUS_BUS_MUX[19]
+
|SRC_BOOT_CFG26 
 
|-
 
|-
−
| 3 ||uart5 ||RXD_MUX
+
|rowspan=8| 34 ||rowspan=8| UART3_CTS ||rowspan=8| D25 || EIM_DATA23 || rowspan=8| 3.3V
 
|-
 
|-
−
| 4 ||sdma ||DEBUG_PC[9]
+
|IPU1_DI0_D0_CS 
 
|-
 
|-
−
| 5 ||gpio6 ||GPIO[1]
+
|UART3_CTS_B
 
|-
 
|-
−
| 6 ||mmdc ||MMDC_DEBUG[38]
+
|UART1_DCD_B
 
|-
 
|-
−
| 7 ||ARMCortexA9 MPCorePlatform ||TRACE[12]
+
|IPU2_CSI1_DATA_EN
 
|-
 
|-
−
|rowspan=8|117 ||rowspan=8|R3 ||rowspan=8|CAN1_TX ||0 ||esai1 ||TX4_RX1 ||rowspan=8|3.3V
+
|GPIO3_IO23
 
|-
 
|-
−
| 1 ||ecspi5 ||RDY
+
|IPU1_DI1_PIN02
 +
|- 
 +
|IPU1_DI1_PIN14
 
|-
 
|-
−
| 2 ||epit1 ||EPITO
+
|rowspan=4| 35 ||rowspan=4| CSPI2_MISO ||rowspan=4| J24 || EIM_OE_B  || rowspan=4| 3.3V
 
|-
 
|-
−
| 3 ||can1 ||TXCAN
+
|IPU1_DI1_PIN07 
 
|-
 
|-
−
| 4 ||uart2 ||TXD_MUX
+
|ECSPI2_MISO
 
|-
 
|-
−
| 5 ||gpio1 ||GPIO[7]
+
|GPIO2_IO25 
 
|-
 
|-
−
| 6 ||spdif ||PLOCK
+
|rowspan=7| 36 ||rowspan=7| UART3_RTS ||rowspan=7| H21 || EIM_DATA31 || rowspan=7| 3.3V
 
|-
 
|-
−
| 7 ||usboh3 ||OTGUSB_HOST_MODE
+
|IPU1_DISP1_DATA20
 
|-
 
|-
−
|rowspan=7|119 ||rowspan=7|R5 ||rowspan=7|CAN1_RX ||0 ||esai1 ||TX5_RX0 ||rowspan=7|3.3V
+
|IPU1_DI0_PIN12
 
|-
 
|-
−
| 2 ||epit2 ||EPITO
+
|IPU1_CSI0_DATA02
 
|-
 
|-
−
| 3 ||can1 ||RXCAN
+
|UART3_RTS_B
 +
|- 
 +
|GPIO3_IO31
 
|-
 
|-
−
| 4 ||uart2 ||RXD_MUX
+
|USB_H1_PWR
 
|-
 
|-
−
| 5 ||gpio1 ||RXD_MUX
+
|37|| BOOT_MODE0|| D12 || SRC_BOOT_MODE0 || 3.3V
 
|-
 
|-
−
| 6 ||spdif ||SRCLK
+
|rowspan=8| 38 ||rowspan=8| UART3_TXD ||rowspan=8| F22 || EIM_DATA24|| rowspan=8| 3.3V
 
|-
 
|-
−
| 7 ||usboh3 ||OTGUSB_PWRCTL_WAKEUP |
+
|ECSPI4_SS2 
 
|-
 
|-
−
|rowspan=8|121 ||rowspan=8|W5 ||rowspan=8|UART4_TXD ||0 ||ecspi1 ||SCLK ||rowspan=8|3.3V
+
|UART3_TX_DATA
 
|-
 
|-
−
| 1 ||enet ||RDATA[3]
+
|ECSPI1_SS2
 
|-
 
|-
−
| 2 ||audmux ||AUD5_TXC
+
|ECSPI2_SS2
 
|-
 
|-
−
| 3 ||kpp ||COL[0]
+
|GPIO3_IO24
 
|-
 
|-
−
| 4 ||uart4 ||TXD_MUX
+
|AUD5_RXFS
 +
|- 
 +
|UART1_DTR_
 
|-
 
|-
−
| 5 ||gpio4 ||GPIO[6]
+
|39|| NRESET || --- || --- || 3.3V
 
|-
 
|-
−
| 6 ||dcic1 ||DCIC_OUT
+
|rowspan=8| 40 ||rowspan=8| UART3_RXD ||rowspan=8| G22 || EIM_DATA25|| rowspan=8| 3.3V 
 
|-
 
|-
−
| 7 ||src ||ANY_PU_RST
+
|ECSPI4_SS3
 
|-
 
|-
−
|rowspan=8|123 ||rowspan=8|V6 ||rowspan=8|UART4_RXD ||0 ||ecspi1 ||MOSI ||rowspan=8|3.3V
+
|UART3_RX_DA 
 
|-
 
|-
−
| 1 ||enet ||TDATA[3]
+
|ECSPI1_SS3
 
|-
 
|-
−
| 2 ||audmux ||AUD5_TXD
+
|ECSPI2_SS3
 
|-
 
|-
−
| 3 ||kpp ||ROW[0]
+
|GPIO3_IO25
 
|-
 
|-
−
| 4 ||uart4 ||RXD_MUX
+
|AUD5_RXC
 +
|- 
 +
|UART1_DSR_B
 
|-
 
|-
−
| 5 ||gpio4 ||GPIO[7]
+
|rowspan=7| 41 ||rowspan=7| CSPI1_CS0 ||rowspan=7| E22 || EIM_EB2_B|| rowspan=7| 3.3V
 
|-
 
|-
−
| 6 ||dcic2 ||DCIC_OUT
+
|ECSPI1_SS0 
 
|-
 
|-
−
| 7 ||pl301_mx6q_per1 ||HADDR[0]
+
|IPU2_CSI1_DATA19
 
|-
 
|-
−
|rowspan=8|125 ||rowspan=8|U6 ||rowspan=8|UART5_RXD ||0 ||ecspi1 ||SS0 ||rowspan=8|3.3V
+
|HDMI_TX_DDC_SCL 
 
|-
 
|-
−
| 1 ||enet ||COL
+
|GPIO2_IO30
 
|-
 
|-
−
| 2 ||audmux ||AUD5_RXD
+
|I2C2_SCL
 
|-
 
|-
−
| 3 ||kpp ||ROW[1]
+
|SRC_BOOT_CFG30
 
|-
 
|-
−
| 4 ||uart5 ||RXD_MUX
+
|rowspan=6| 42 ||rowspan=6| SD2_DATA2 ||rowspan=6| A23 || EIM_EB2_B|| rowspan=6| 3.3V
 
|-
 
|-
−
| 5 ||gpio4 ||GPIO[9]
+
|ECSPI5_SS1
 
|-
 
|-
−
| 6 ||usdhc2 ||VSELECT
+
|EIM_CS3_B 
 
|-
 
|-
−
| 7 ||pl301_mx6q_per1 ||HADDR[2]
+
|AUD4_TXD
 
|-
 
|-
−
|rowspan=8|127 ||rowspan=8|U7 ||rowspan=8|UART5_TXD ||0 ||ecspi1 ||MISO ||rowspan=8|3.3V
+
|KEY_ROW6 
 
|-
 
|-
−
|1 ||enet ||MDIO
+
|GPIO1_IO13
 
|-
 
|-
−
| 2 ||audmux ||AUD5_TXFS
+
|rowspan=7| 43 ||rowspan=7| CSPI1_MISO ||rowspan=7|F21 ||EIM_DATA17|| rowspan=7| 3.3V
 
|-
 
|-
−
| 3 ||kpp ||COL[1]
+
|ECSPI1_MISO             
 
|-
 
|-
−
| 4 ||uart5 ||TXD_MUX
+
|IPU1_DI0_PIN06
 
|-
 
|-
−
| 5 ||gpio4 ||GPIO[8]
+
|IPU2_CSI1_PIXCLK 
 
|-
 
|-
−
| 6 ||usdhc1 ||VSELECT
+
|DCIC1_OUT
 
|-
 
|-
−
| 7 ||pl301_mx6q_per1 ||HADDR[1]
+
|GPIO3_IO17 
 
|-
 
|-
−
|129 ||V1 ||LVDS0_TX2_P || ||rowspan=10|LVDS0 ||LVDS0_TX2_P ||rowspan=10|2.5V
+
|I2C3_SCL
 
|-
 
|-
−
|131 ||V2 ||LVDS0_TX2_N || ||LVDS0_TX2_N
+
|rowspan=6| 44 ||rowspan=6|SD2_DATA0 ||rowspan=6|A22 || SD2_DATA0|| rowspan=6| 3.3V 
 
|-
 
|-
−
|133 ||U2 ||LVDS0_TX0_N  || ||LVDS0_TX0_N
+
|ECSPI5_MISO
 
|-
 
|-
−
|135 ||U1 ||LVDS0_TX0_P  || ||LVDS0_TX0_P
+
|AUD4_RXD
 
|-
 
|-
−
|137 ||W2 ||LVDS0_TX3_N  || ||LVDS0_TX3_N
+
|KEY_ROW7             
 
|-
 
|-
−
|139 ||W1 ||LVDS0_TX3_P  || ||LVDS0_TX3_P
+
|GPIO1_IO15
 +
|-
 +
|DCIC2_OUT
 
|-
 
|-
−
|141 ||V4 ||LVDS0_CLK_N  || ||LVDS0_CLK_N
+
|rowspan=7| 45 ||rowspan=7| CSPI1_MOSI ||rowspan=7|D24 || EIM_DATA18|| rowspan=7| 3.3V
 
|-
 
|-
−
|143 ||V3 ||LVDS0_CLK_P  || ||LVDS0_CLK_P
+
|ECSPI1_MOSI 
 
|-
 
|-
−
|145 ||U4 ||LVDS0_TX1_N  || ||LVDS0_TX1_N
+
|IPU1_DI0_PIN07
 
|-
 
|-
−
|147 ||U3 ||LVDS0_TX1_P  || ||LVDS0_TX1_P
+
|IPU2_CSI1_DATA17 
 
|-
 
|-
−
|149 ||NC ||GND  || || || ||0V
+
|IPU1_DI1_D0_CS
 
|-
 
|-
−
|rowspan=7|151 ||rowspan=7|C20 ||rowspan=7|SD1_DAT1 ||0 ||usdhc1 ||DAT1 ||rowspan=7|3.3V
+
|GPIO3_IO18
 
|-
 
|-
−
| 1 ||ecspi5 ||SS0
+
|I2C3_SDA             
 
|-
 
|-
−
| 2 ||pwm3 ||PWMO
+
|rowspan=5| 46 ||rowspan=5| SD2_CLK ||rowspan=5| C21 || SD2_CLK|| rowspan=5| 3.3V
 +
|- 
 +
|ECSPI5_SCLK
 
|-
 
|-
−
| 3 ||gpt ||CAPIN2
+
|KEY_COL5
 
|-
 
|-
−
| 4 ||pcie_ctrl ||DIAG_STATUS_BUS_MUX[7]
+
|AUD4_RXFS
 
|-
 
|-
−
|  5 ||gpio1 ||GPIO[17]
+
|GPIO1_IO10  
 
|-
 
|-
−
| 6 ||hdmi_tx ||OPHYDTB[0]
+
|rowspan=7| 47 ||rowspan=7| CSPI1_CLK ||rowspan=7| C25 || EIM_DATA16|| rowspan=7| 3.3V
 
|-
 
|-
−
|rowspan=7|153 ||rowspan=7|E19 ||rowspan=7|SD1_DAT2 ||0 ||usdhc1 ||DAT2 ||rowspan=7|3.3V
+
|ECSPI1_SCLK 
 
|-
 
|-
−
| 1 ||ecspi5 ||SS1
+
|IPU1_DI0_PIN05
 
|-
 
|-
−
| 2 ||gpt ||CMPOUT2
+
|IPU2_CSI1_DATA18
 
|-
 
|-
−
| 3 ||pwm2 ||PWMO
+
|HDMI_TX_DDC_SDA             
 
|-
 
|-
−
| 4 ||wdog1 ||WDOG_B
+
|GPIO3_IO16
 +
|- 
 +
|I2C2_SDA
 
|-
 
|-
−
| 5 ||gpio1 ||GPIO[19]
+
|rowspan=5| 48 ||rowspan=5| SD2_DATA3 ||rowspan=5| B22 || SD2_DATA3 || rowspan=5| 3.3V
 
|-
 
|-
−
| 6 ||wdog1 ||WDOG_RST_B_DEB
+
|ECSPI5_SS3 
 
|-
 
|-
−
|rowspan=8|155 ||rowspan=8|D16 ||rowspan=8|NANDF_CS3 ||0 ||rawnand ||CE3N ||rowspan=8|3.3V
+
|KEY_COL6
 
|-
 
|-
−
| 1 ||ipu1 ||SISG[1]
+
|AUD4_TXC 
 
|-
 
|-
−
| 2 ||esai1 ||TX1
+
|GPIO1_IO12
 
|-
 
|-
−
|  3 ||weim ||WEIM_A[26]
+
|rowspan=7|49 ||rowspan=7| CSPI1_RDY ||rowspan=7| P5 || KEY_COL5 ||rowspan=7|3.3V
 
|-
 
|-
−
| 4 ||pcie_ctrl ||DIAG_STATUS_BUS_MUX[4]
+
|ENET_1588_EVENT0_OUT
 
|-
 
|-
−
| 5 ||gpio6 ||GPIO[16]
+
|SPDIF_OUT
 
|-
 
|-
−
| 6 ||ipu2 ||SISG[1]
+
|CCM_CLKO1
 
|-
 
|-
−
| 7 ||tpsmp ||CLK
+
|ECSPI1_RDY
 
|-
 
|-
−
|rowspan=8|157 ||rowspan=8|T21 ||rowspan=8|DISP0_DAT16 ||0 ||ipu1 ||DISP0_DAT[16] ||rowspan=8|3.3V
+
|GPIO4_IO05
 
|-
 
|-
−
| 1 ||ipu2 ||DISP0_DAT[16]
+
|ENET_TX_ER
 
|-
 
|-
−
| 2 ||ecspi2 ||MOSI
+
|rowspan=5|50 ||rowspan=5| SD2_CMD ||rowspan=5| F19 || SD2_CMD ||rowspan=5|3.3V
 
|-
 
|-
−
| 3 ||audmux ||AUD5_TXC
+
|ECSPI5_MOSI
 
|-
 
|-
−
| 4 ||sdma ||SDMA_EXT_EVENT[0]
+
|KEY_ROW5
 
|-
 
|-
−
| 5 ||gpio5 ||GPIO[10]
+
|AUD4_RXC
 
|-
 
|-
−
| 6 ||mmdc ||MMDC_DEBUG[21]
+
|GPIO1_IO11
 
|-
 
|-
−
| 7 ||pl301_mx6q_per1 ||HADDR[26]
+
|51 || GND || --- || --- || ---
 
|-
 
|-
−
|rowspan=8|159 ||rowspan=8|W24 ||rowspan=8|DISP0_DAT23 ||0 ||ipu1 ||DISP0_DAT[23] ||rowspan=8|3.3V
+
|rowspan=6| 52 ||rowspan=6| SD2_DATA1 ||rowspan=6| E20 || SD2_DATA1 || rowspan=6 | 3.3V  
 
|-
 
|-
−
| 1 ||ipu2 ||DISP0_DAT[23]
+
|ECSPI5_SS0
 
|-
 
|-
−
| 2 ||ecspi1 ||SS0
+
|EIM_CS2_B
 
|-
 
|-
−
| 3 ||audmux ||AUD4_RXD
+
|AUD4_TXFS
 
|-
 
|-
−
| 4 ||sdma ||DEBUG_BUS_DEVICE[2]
+
|KEY_COL7
 
|-
 
|-
−
| 5 ||gpio5 ||GPIO[17]
+
|GPIO1_IO14
 
|-
 
|-
−
| 6 ||mmdc ||MMDC_DEBUG[28]
+
|rowspan=3| 53 ||rowspan=3| SD3_DATA3 ||rowspan=3| B15 || SD3_DATA3 || rowspan=3 | 3.3V
 
|-
 
|-
−
| 7 ||pl301_mx6q_per1 ||HADDR[31]
+
|UART3_CTS_B
 
|-
 
|-
−
|rowspan=7|161 ||rowspan=7|T23 ||rowspan=7|DISP0_DAT11 ||0 ||ipu1 ||DISP0_DAT[11] ||rowspan=7|3.3V
+
|GPIO7_IO07
 
|-
 
|-
−
| 1 ||ipu2 ||DISP0_DAT[11]
+
|54 || SATA_RXP || B14 || SATA_PHY_RX_P || 2.5V
 
|-
 
|-
−
| 3 ||usdhc1 ||USDHC_DEBUG[7]
+
|rowspan=2| 55 ||rowspan=2| SD3_DATA2 ||rowspan=2| A15 || SD3_DATA2 || rowspan=2 | 3.3V
 
|-
 
|-
−
| 4 ||sdma ||DEBUG_EVENT_CHANNEL[4]
+
|GPIO7_IO06
 
|-
 
|-
−
| 5 ||gpio5 ||GPIO[5]
+
|56 || SATA_RXN || B13 || SATA_PHY_RX_N || 2.5V
 
|-
 
|-
−
| 6 ||mmdc ||MMDC_DEBUG[16]
+
|rowspan=4| 57 ||rowspan=4| SD3_CMD ||rowspan=4| B13 || SD3_CMD || rowspan=4 | 3.3V
 
|-
 
|-
−
| 7 ||pl301_mx6q_per1 ||HADDR[22]
+
|UART2_CTS_B
 
|-
 
|-
−
|rowspan=8|163 ||rowspan=8|T22 ||rowspan=8|DISP0_DAT15 ||0 ||ipu1 ||DISP0_DAT[15] ||rowspan=8|3.3V
+
|FLEXCAN1_TX
 
|-
 
|-
−
| 1 ||ipu2 ||DISP0_DAT[15]
+
|GPIO7_IO02
 
|-
 
|-
−
| 2 ||ecspi1 ||SS1
+
|58 || SATA_TXN || B12 || SATA_PHY_TX_N || 2.5V
 
|-
 
|-
−
| 3 ||ecspi2 ||SS1
+
|rowspan=4| 59 ||rowspan=4| SD3_CLK ||rowspan=4| D14 || SD3_CLK || rowspan=4 | 3.3V
 
|-
 
|-
−
| 4 ||sdma ||DEBUG_EVT_CHN_LINES[2]
+
|UART2_RTS_B
 
|-
 
|-
−
| 5 ||gpio5 ||GPIO[9]
+
|FLEXCAN1_RX
 
|-
 
|-
−
| 6 ||mmdc ||MMDC_DEBUG[20]
+
|GPIO7_IO03
 
|-
 
|-
−
| 7 ||pl301_mx6q_per1 ||HADDR[25]
+
|60 || SATA_TXP || A12 || SATA_PHY_TX_P || 2.5V
 
|-
 
|-
−
|rowspan=7|165 ||rowspan=7|R20 ||rowspan=7|DISP0_DAT13 ||0 ||ipu1 ||DISP0_DAT[13] ||rowspan=7|3.3V
+
|rowspan=4| 61 ||rowspan=4| SD3_DATA1 ||rowspan=4| F14|| SD3_DATA1 || rowspan=4 | 3.3V
 
|-
 
|-
−
| 1 ||ipu2 ||DISP0_DAT[13]
+
|UART1_RTS_B
 
|-
 
|-
−
| 3 ||audmux ||AUD5_RXFS
+
|FLEXCAN2_RX
 
|-
 
|-
−
| 4 ||sdma ||DEBUG_EVT_CHN_LINES[0]
+
|GPIO7_IO05
 
|-
 
|-
−
| 5 ||gpio5 ||GPIO[7]
+
|rowspan=8| 62 ||rowspan=8| USB_OTG_OC ||rowspan=8| H20 || EIM_DATA21 || rowspan=8 | 3.3V
 
|-
 
|-
−
| 6 ||mmdc ||MMDC_DEBUG[18]
+
|ECSPI4_SCLK
 
|-
 
|-
−
| 7 ||pl301_mx6q_per1 ||HADDR[24]
+
|IPU1_DI0_PIN17
 
|-
 
|-
−
|rowspan=8|167 ||rowspan=8|R22 ||rowspan=8|DISP0_DAT8 ||0 ||ipu1 ||DISP0_DAT[8] ||rowspan=8|3.3V
+
|IPU2_CSI1_DATA11
 
|-
 
|-
−
| 1 ||ipu2 ||DISP0_DAT[8]
+
|USB_OTG_OC
 
|-
 
|-
−
| 2 ||pwm1 ||PWMO
+
|GPIO3_IO21
 
|-
 
|-
−
| 3 ||wdog1 ||WDOG_B
+
|I2C1_SCL
 
|-
 
|-
−
| 4 ||sdma ||DEBUG_EVENT_CHANNEL[1]
+
|SPDIF_IN
 
|-
 
|-
−
| 5 ||gpio4 ||GPIO[29]
+
|rowspan=4| 63 ||rowspan=4| SD3_DATA0 ||rowspan=4| E14|| SD3_DATA0 || rowspan=4 | 3.3V
 
|-
 
|-
−
| 6 ||mmdc ||MMDC_DEBUG[13]
+
|UART1_CTS_B
 
|-
 
|-
−
| 7 ||pl301_mx6q_per1 ||HADDR[19]
+
|FLEXCAN2_TX
 
|-
 
|-
−
|rowspan=8|169 ||rowspan=8|P21 ||rowspan=8|DISP0_DAT3 ||0 ||ipu1 ||DISP0_DAT[3] ||rowspan=8|3.3V
+
|GPIO7_IO04
 
|-
 
|-
−
|  1 ||ipu2 ||DISP0_DAT[3]
+
|rowspan=7|64 ||rowspan=7| USB_OTG_PWR_EN ||rowspan=7| E23 || EIM_DATA22 ||rowspan=7|3.3V
 
|-
 
|-
−
| 2 ||ecspi3 ||SS0
+
|ECSPI4_MISO
 
|-
 
|-
−
| 3 ||usdhc1 ||USDHC_DEBUG[3]
+
|IPU1_DI0_PIN01
 
|-
 
|-
−
| 4 ||sdma ||DEBUG_BUS_ERROR
+
|IPU2_CSI1_DATA10
 
|-
 
|-
−
| 5 ||gpio4 ||GPIO[24]
+
|USB_OTG_PWR
 
|-
 
|-
−
| 6 ||mmdc ||MMDC_DEBUG[8]
+
|GPIO3_IO22
 
|-
 
|-
−
| 7 ||pl301_mx6q_per1 ||HADDR[14]
+
|SPDIF_OUT
 
|-
 
|-
−
|rowspan=8|171 ||rowspan=8|P22 ||rowspan=8|DISP0_DAT1 ||0 ||ipu1 ||DISP0_DAT[1] ||rowspan=8|3.3V
+
|65 || GND || --- || --- || ---
 
|-
 
|-
−
| 1 ||ipu2 ||DISP0_DAT[1]
+
|66 || USB_OTG_DN || B6 || USB_OTG_DN || 2.5V
 
|-
 
|-
−
| 2 ||ecspi3 ||MOSI
+
|rowspan=3| 67 ||rowspan=3| USB_H1_PWR_EN ||rowspan=3| C13 || SD3_DATA5 || rowspan=3 | 3.3V
 
|-
 
|-
−
| 3 ||usdhc1 ||USDHC_DEBUG[1]
+
|UART2_TX_DATA
 
|-
 
|-
−
| 4 ||sdma ||DEBUG_EVENT_CHANNEL_SEL
+
|GPIO7_IO00
 
|-
 
|-
−
| 5 ||gpio4 ||GPIO[22]
+
|68 || USB_OTG_DP || A6 || USB_OTG_DP || 2.5V
 
|-
 
|-
−
| 6 ||mmdc ||MMDC_DEBUG[6]
+
|69 || USB_HOST_DN || F10 || USB_H1_DN || 2.5V
 
|-
 
|-
−
| 7 ||pl301_mx6q_per1 ||HADDR[12]
+
|70 || USB_OTG_VBUS|| E9 || USB_OTG_VBUS || 5V
 
|-
 
|-
−
|rowspan=7|173 ||rowspan=7|N21 ||rowspan=7|DISP0_DRDY ||0 ||ipu1 ||DI0_PIN15 ||rowspan=7|3.3V
+
|71 || USB_HOST_DP || E10|| USB_H1_DP || 2.5V
 
|-
 
|-
−
| 1 ||ipu2 ||DI0_PIN15
+
|rowspan=7|72 ||rowspan=7| USB_OTG_ID ||rowspan=7| T4 || ESAI_RX_CLK ||rowspan=7|3.3V
 
|-
 
|-
−
| 2 ||audmux ||AUD6_TXC
+
|WDOG2_B
 
|-
 
|-
−
| 3 ||mipi_core ||DPHY_TEST_OUT[29]
+
|KEY_ROW5
 
|-
 
|-
−
| 4 ||sdma ||DEBUG_CORE_STATE[1]
+
|USB_OTG_ID
 
|-
 
|-
−
| 5 ||gpio4 ||GPIO[17]
+
|PWM2_OUT
 
|-
 
|-
−
| 6 ||mmdc ||MMDC_DEBUG[1]
+
|GPIO1_IO01
 
|-
 
|-
−
|rowspan=8|175 ||rowspan=8|N20 ||rowspan=8|DISP0_VSYNCH ||0 ||ipu1 ||DI0_PIN3 ||rowspan=8|3.3V
+
|SD1_CD_B
 
|-
 
|-
−
| 1 ||ipu2 ||DI0_PIN3
+
|rowspan=7|73 ||rowspan=7| USB_H1_OC ||rowspan=7| J20 || EIM_DATA30 ||rowspan=7|3.3V
 
|-
 
|-
−
| 2 ||audmux ||AUD6_TXFS
+
|IPU1_DISP1_DATA21
 
|-
 
|-
−
| 3 ||mipi_core ||DPHY_TEST_OUT[31]
+
|IPU1_DI0_PIN11
 
|-
 
|-
−
| 4 ||sdma ||DEBUG_CORE_STATE[3]
+
|IPU1_CSI0_DATA03
 
|-
 
|-
−
| 5 ||gpio4 ||GPIO[19]
+
|UART3_CTS_B
 
|-
 
|-
−
| 6 ||mmdc ||MMDC_DEBUG[3]
+
|GPIO3_IO30
 
|-
 
|-
−
| 7 ||pl301_mx6q_per1 ||HADDR[10]
+
|USB_H1_OC
 
|-
 
|-
−
|rowspan=7|177 ||rowspan=7|F18 ||rowspan=7|DISP0_CONTRAST ||0 ||usdhc1 ||DAT3 ||rowspan=7|3.3V
+
|74 || PCIE_RXP || B2 || PCIE_RX_P || 2.5V
 
|-
 
|-
−
| 1 ||ecspi5 ||SS2
+
|75 || USB_H1_VBUS || D10 || USB_H1_VBUS ||5V
 
|-
 
|-
−
| 2 ||gpt ||CMPOUT3
+
|76 || PCIE_RXM || B1 || PCIE_RX_N ||rowspan=13|2.5V
 
|-
 
|-
−
| 3 ||pwm1 ||PWMO
+
|77 || CSI_D1M || D1 || CSI_DATA1_N
 
|-
 
|-
−
| 4 ||wdog2 ||WDOG_B
+
|78 || PCIE_TXP|| B3 || PCIE_TX_P
 
|-
 
|-
−
| 5 ||gpio1 ||GPIO[21]
+
|79 || CSI_D1P || D2 || CSI_DATA1_P
 
|-
 
|-
−
| 6 ||wdog2 ||WDOG_RST_B_DEB
+
|80 || PCIE_TXM || A3 || PCIE_TX_N
 
|-
 
|-
−
|rowspan=6|179 ||rowspan=6|N19 ||rowspan=6|DISP0_CLK ||0 ||ipu1 ||DI0_DISP_CLK ||rowspan=6|3.3V
+
|81 || CSI_D0M || E4 || CSI_DATA0_N
 
|-
 
|-
−
| 1 ||ipu2 ||DI0_DISP_CLK
+
|82 || CLK1_P || D7 || XTALOSC_CLK1_P
 
|-
 
|-
−
| 3 ||mipi_core ||DPHY_TEST_OUT[28]
+
|83 || CSI_D0P || E3 || CSI_DATA0_P
 
|-
 
|-
−
| 4 ||sdma ||DPHY_TEST_OUT[28]
+
|84 || CLK1_N || C7 || XTALOSC_CLK2_N
 
|-
 
|-
−
| 5 ||gpio4 ||GPIO[16]
+
|85 || CSI_CLK0M || F4 || CSI_CLK0_N
 
|-
 
|-
−
| 6 ||mmdc ||MMDC_DEBUG[0]
+
|86 || HDMI_D2P || K4 || HDMI_TX_DATA2_P
 
|-
 
|-
−
|rowspan=8|181 ||rowspan=8|V25 ||rowspan=8|DISP0_DAT18 ||0 ||ipu1 ||DISP0_DAT[18] ||rowspan=8|3.3V
+
|87 || CSI_CLK0P || F3 || CSI_CLK0_P
 
|-
 
|-
−
| 1 ||ipu2 ||DISP0_DAT[18]
+
|88 || HDMI_D2M || K3 || HDMI_TX_DATA2_N
 
|-
 
|-
−
| 2 ||ecspi2 ||SS0
+
|rowspan=6| 89 ||rowspan=6|UART1_RX ||rowspan=6| M3 || IPU1_CSI0_DATA11 || rowspan=6 | 2.5V
 
|-
 
|-
−
| 3 ||audmux ||AUD5_TXFS
+
|AUD3_RXFS
 
|-
 
|-
−
| 4 ||audmux ||AUD4_RXFS
+
|ECSPI2_SS0
 
|-
 
|-
−
| 5 ||gpio5 ||GPIO[12]
+
|UART1_RX_DATA
 
|-
 
|-
−
| 6 ||mmdc ||MMDC_DEBUG[23]
+
|GPIO5_IO29
 
|-
 
|-
−
| 7 ||weim ||WEIM_CS[2]
+
|ARM_TRACE08
 
|-
 
|-
−
|rowspan=8|183 ||rowspan=8|V24 ||rowspan=8|DISP0_DAT22 ||0 ||ipu1 ||DISP0_DAT[22] ||rowspan=8|3.3V
+
|90 || HDMI_CEC_IN || W4 ||HDMI_TX_DDC_CEC || 2.5V
 
|-
 
|-
−
|  1 ||ipu2 ||DISP0_DAT[22]
+
|rowspan=7|91 ||rowspan=7| UART1_TX ||rowspan=7| M1 || IPU1_CSI0_DATA10 ||rowspan=7|2.5V
−
|-
 
−
|  2 ||ecspi1 ||MISO
 
−
|-
 
−
|  3 ||audmux ||AUD4_TXFS
 
−
|-
 
−
|  4 ||sdma ||DEBUG_BUS_DEVICE[1]
 
−
|-
 
−
|  5 ||gpio5 ||GPIO[16]
 
−
|-
 
−
|  6 ||mmdc ||MMDC_DEBUG[27]
 
−
|-
 
−
|  7 ||pl301_mx6q_per1 ||HADDR[30]
 
−
|-
 
−
|rowspan=6|185 ||rowspan=6|U25 ||rowspan=6|DISP0_DAT14 ||0 ||ipu1 ||DISP0_DAT[14] ||rowspan=6|3.3V
 
−
|-
 
−
|  1 ||ipu2 ||DISP0_DAT[14]
 
−
|-
 
−
|  3 ||audmux ||AUD5_RXC
 
−
|-
 
−
|  4 ||sdma ||DEBUG_EVT_CHN_LINES[1]
 
−
|-
 
−
|  5 ||gpio5 ||GPIO[8]
 
−
|-
 
−
|  6 ||mmdc ||MMDC_DEBUG[19]
 
−
|-
 
−
|rowspan=8|187 ||rowspan=8|U24 ||rowspan=8|DISP0_DAT17 ||0 ||ipu1 ||DISP0_DAT[17] ||rowspan=8|3.3V
 
−
|-
 
−
|  1 ||ipu2 ||DISP0_DAT[17]
 
−
|-
 
−
|  2 ||ecspi2 ||DISP0_DAT[17]
 
−
|-
 
−
|  3 ||audmux ||AUD5_TXD
 
−
|-
 
−
|  4 ||sdma ||SDMA_EXT_EVENT[1]
 
−
|-
 
−
|  5 ||gpio5 ||GPIO[11]
 
−
|-
 
−
|  6 ||mmdc ||MMDC_DEBUG[22]
 
−
|-
 
−
|  7 ||pl301_mx6q_per1 ||HADDR[27]
 
−
|-
 
−
|rowspan=8|189 ||rowspan=8|T25 ||rowspan=8|DISP0_DAT9 ||0 ||ipu1 ||DISP0_DAT[9] ||rowspan=8|3.3V
 
−
|-
 
−
|  1 ||ipu2 ||DISP0_DAT[9]
 
−
|-
 
−
|  2 ||pwm2 ||PWMO
 
−
|-
 
−
|  3 ||wdog2 ||WDOG_B
 
−
|-
 
−
|  4 ||sdma ||DEBUG_EVENT_CHANNEL[2]
 
−
|-
 
−
|  5 ||gpio4 ||GPIO[30]
 
−
|-
 
−
|  6 ||mmdc ||MMDC_DEBUG[14]
 
−
|-
 
−
|  7 ||pl301_mx6q_per1 ||HADDR[20]
 
−
|-
 
−
|rowspan=6|191 ||rowspan=6|T24 ||rowspan=6|DISP0_DAT12 ||0 ||ipu1 ||DISP0_DAT[12] ||rowspan=6|3.3V
 
−
|-
 
−
|  1 ||ipu2 ||DISP0_DAT[12]
 
−
|-
 
−
|  4 ||sdma ||DEBUG_EVENT_CHANNEL[5]
 
−
|-
 
−
|  5 ||gpio5 ||GPIO[6]
 
−
|-
 
−
|  6 ||mmdc ||MMDC_DEBUG[17]
 
−
|-
 
−
|  7 ||pl301_mx6q_per1 ||HADDR[23]
 
−
|-
 
−
|rowspan=8|193 ||rowspan=8|R25 ||rowspan=8|DISP0_DAT5 ||0 ||ipu1 ||DISP0_DAT[5] ||rowspan=8|3.3V
 
−
|-
 
−
|  1 ||ipu2 ||DISP0_DAT[5]
 
−
|-
 
−
|  2 ||ecspi3 ||SS2
 
−
|-
 
−
|  3 ||audmux ||AUD6_RXFS
 
−
|-
 
−
|  4 ||sdma ||DEBUG_MATCHED_DMBUB
 
−
|-
 
−
|  5 ||gpio4 ||GPIO[26]
 
−
|-
 
−
|  6 ||mmdc ||MMDC_DEBUG[10]
 
−
|-
 
−
|  7 ||pl301_mx6q_per1 ||HADDR[16]
 
−
|-
 
−
|rowspan=8|195 ||rowspan=8|R24 ||rowspan=8|DISP0_DAT7 ||0 ||ipu1 ||DISP0_DAT[7] ||rowspan=8|3.3V
 
−
|-
 
−
|  1 ||ipu2 ||DISP0_DAT[7]
 
−
|-
 
−
|  2 ||ecspi3 ||RDY
 
−
|-
 
−
|  3 ||usdhc1 ||USDHC_DEBUG[5]
 
−
|-
 
−
|  4 ||sdma ||DEBUG_EVENT_CHANNE L[0]
 
−
|-
 
−
|  5 ||gpio4 ||GPIO[28]
 
−
|-
 
−
|  6 ||mmdc ||MMDC_DEBUG[12]
 
−
|-
 
−
|  7 ||pl301_mx6q_per1 ||HADDR[18]
 
−
|-
 
−
|rowspan=7|197 ||rowspan=7|P24 ||rowspan=7|DISP0_DAT0 ||0 ||ipu1 ||DISP0_DAT[0] ||rowspan=7|3.3V
 
−
|-
 
−
|  1 ||ipu2 ||DISP0_DAT[0]
 
−
|-
 
−
|  2 ||ecspi3 ||SCLK
 
−
|-
 
−
|  3 ||usdhc1 ||USDHC_DEBUG[0]
 
−
|-
 
−
|  4 ||sdma ||DEBUG_CORE_RUN
 
−
|-
 
−
|  5 ||gpio4 ||GPIO[21]
 
−
|-
 
−
|  6 ||mmdc ||MMDC_DEBUG[5]
 
−
|-
 
−
|rowspan=8|199 ||rowspan=8|N25 ||rowspan=8|DISP0_HSYNCH ||0 ||ipu1 ||DI0_PIN2 ||rowspan=8|3.3V
 
−
|-
 
−
|  1 ||ipu2 ||DI0_PIN2
 
−
|-
 
−
|  2 ||audmux ||AUD6_TXD
 
−
|-
 
−
|  3 ||mipi_core ||DPHY_TEST_OUT[30]
 
−
|-
 
−
|  4 ||sdma ||DEBUG_CORE_STATE[2]
 
−
|-
 
−
|  5 ||gpio4 ||GPIO[18]
 
−
|-
 
−
|  6 ||mmdc ||MMDC_DEBUG[2]
 
−
|-
 
−
|  7 ||pl301_mx6q_per1 ||HADDR[9]
 
−
|}
 
−
 
 
−
=== 表2(form 2)===
 
−
{| class="wikitable"
 
−
!Pin
 
−
!CPU Ball Name
 
−
!Pin Name
 
−
!功能选择<br>(function selection)
 
−
!所属模块<br>(module affiliated)
 
−
!功能描述<br>(function description)
 
−
!电压<br>(voltage)
 
−
|-
 
−
|2||rowspan=5|NC||rowspan=5|5VIN||rowspan=5| ||rowspan=5|电源<br>(power supply)||rowspan=5|5V输入<br>(5V input)||rowspan=5|5V
 
−
|-
 
−
|4
 
−
|-
 
−
|6
 
−
|-
 
−
|8
 
−
|-
 
−
|10
 
−
|-
 
−
|12||rowspan=4|NC||rowspan=4|3P3V||rowspan=4| ||rowspan=4|电源<br>(power supply)||rowspan=4|3.3V输出（1A）<br>(output（1A）)||rowspan=4|3.3V
 
−
|-
 
−
|14
 
−
|-
 
−
|16
 
−
|-
 
−
|18
 
 
|-
 
|-
−
| rowspan=8|20||rowspan=8|R6||rowspan=8|GPIO_4||0||esai1||HCKT||rowspan=8|3.3V
+
|AUD3_RXC
 
|-
 
|-
−
|1||observe_mux||OBSRV_INT_OUT3
+
|ECSPI2_MISO
 
|-
 
|-
−
|2||kpp||COL[7]
+
|UART1_TX_DATA
 
|-
 
|-
−
|3||ccm||CCM_OUT_2
+
|UART1_TX_DATA
 
|-
 
|-
−
|4||csu||CSU_ALARM_AUT[1]
+
|GPIO5_IO28
 
|-
 
|-
−
|5||gpio1||GPIO[4]
+
|ARM_TRACE07
 
|-
 
|-
−
|6||usdhc2||CD
+
|92 || HDMI_HPD || K1 ||HDMI_TX_HPD || 2.5V
 
|-
 
|-
−
|7||ocotp_ctrl_wrapper||FUSE_LATCHED
+
|93 || GND || --- || --- || ---
 
|-
 
|-
−
| rowspan=4|22||rowspan=4|N22||rowspan=4|EIM_BCLK||0||weim||WEIM_BCLK||rowspan=4|3.3V
+
|94 || HDMI_H1P || J4 || HDMI_TX_DATA1_P || 2.5V
 
|-
 
|-
−
|1||ipu1||DI1_PIN16
+
|rowspan=5|95 ||rowspan=5| CSI0_DAT17 ||rowspan=5|L3 || IPU1_CSI0_DATA17 ||rowspan=5|2.5V
 
|-
 
|-
−
|5||gpio6||GPIO[31]
+
|EIM_DATA13
 
|-
 
|-
−
|6||tpsmp||HDATA[31]
+
|UART4_CTS_B
 
|-
 
|-
−
| rowspan=7|24||rowspan=7|P3||rowspan=7|CSI0_DATA_EN||0||ipu1||CSI0_DATA_EN||rowspan=7|2.5V
+
|GPIO6_IO03
 
|-
 
|-
−
|1||weim||WEIM_D[0]
+
|ARM_TRACE14
 
|-
 
|-
−
|2||pcie_ctrl||DIAG_STATUS_BUS_MUX[14]
+
|96 || HDMI_D1M || J3 || HDMI_TX_DATA1_N || 2.5V
 
|-
 
|-
−
|4||sdma||DEBUG_PC[2]
+
|rowspan=5|97 ||rowspan=5| CSI0_DAT16 ||rowspan=5|L4 || IPU1_CSI0_DATA16 ||rowspan=5|2.5V
 
|-
 
|-
−
|5||gpio5||GPIO[20]
+
|EIM_DATA12
 
|-
 
|-
−
|6||mmdc||MMDC_DEBUG[31]
+
|UART4_RTS_B
 
|-
 
|-
−
|7||ARM CortexA9 MPCore Platform||TRCLK
+
|GPIO6_IO02
 
|-
 
|-
−
| rowspan=8|26||rowspan=8|G23||rowspan=8|UART2_CTS||0||weim||WEIM_D[28]||rowspan=8|3.3V
+
|ARM_TRACE13
 
|-
 
|-
−
|1||i2c1||SDA
+
|98 || HDMI_CLKP || J6 || HDMI_TX_CLK_P || 2.5V
 
|-
 
|-
−
|2||ecspi4||MOSI
+
|rowspan=5|99 ||rowspan=5| CSI0_DAT14 ||rowspan=5|M4 ||IPU1_CSI0_DATA14 ||rowspan=5|2.5V
 
|-
 
|-
−
|3||ipu2||CSI1_D[12]
+
|EIM_DATA10
 
|-
 
|-
−
|4||uart2||CTS
+
|UART5_TX_DATA
 
|-
 
|-
−
|5||gpio3||GPIO[28]
+
|GPIO6_IO00
 
|-
 
|-
−
|6||ipu1||EXT_TRIG
+
|ARM_TRACE11
 
|-
 
|-
−
|7||ipu1||DI0_PIN13
+
|100 || HDMI_CLKM || J5 || HDMI_TX_CLK_N || 2.5V
 
|-
 
|-
−
| rowspan=7|28||rowspan=7|J19||rowspan=7|UART2_RTS||0||weim||WEIM_D[29]||rowspan=7|3.3V
+
|rowspan=4|101 ||rowspan=4 | CSI0_DAT19 ||rowspan=4|L6 ||IPU1_CSI0_DATA19 ||rowspan=4|2.5V
 
|-
 
|-
−
|1||ipu1||DI1_PIN15
+
|EIM_DATA15
 
|-
 
|-
−
|2||ecspi4||SS0
+
|UART5_CTS_B
 
|-
 
|-
−
|4||uart2||RTS
+
|GPIO6_IO05
 
|-
 
|-
−
|5||gpio3||GPIO[29]
+
|102 || HDMI_D0P || K6 || HDMI_TX_DATA0_P || 2.5V
 
|-
 
|-
−
|6||ipu2||CSI1_VSYNC
+
|rowspan=5|103 ||rowspan=5| CSI0_DATA18 ||rowspan=5|M6 ||IPU1_CSI0_DATA18 ||rowspan=5|2.5V
 
|-
 
|-
−
|7||ipu1||DI0_PIN14
+
|EIM_DATA14
 
|-
 
|-
−
| rowspan=8|30||rowspan=8|E24||rowspan=8|UART2_TXD||0||weim||WEIM_D[26]||rowspan=8|3.3V
+
|UART5_RTS_B
 
|-
 
|-
−
|1||ipu1||DI1_PIN11
+
|GPIO6_IO04
 
|-
 
|-
−
|2||ipu1||CSI0_D[1]
+
|ARM_TRACE15
 
|-
 
|-
−
|3||ipu2||CSI1_D[14]
+
|104 || HDMI_D0M || K5 || HDMI_TX_DATA0_NP || 2.5V
 
|-
 
|-
−
|4||uart2||TXD_MUX
+
|rowspan=5|105 ||rowspan=5| CSI0_DATA13 ||rowspan=5|L1 ||IPU1_CSI0_DATA13 ||rowspan=5|2.5V
 
|-
 
|-
−
|5||gpio3||GPIO[26]
+
|EIM_DATA09
 
|-
 
|-
−
|6||ipu1||SISG[2]
+
|UART4_RX_DATA
 
|-
 
|-
−
|7||ipu1||DISP1_DAT[22]
+
|GPIO5_IO31
 
|-
 
|-
−
| rowspan=8|32||rowspan=8|E25||rowspan=8|UART2_RXD||0||weim||WEIM_D[27]||rowspan=8|3.3V
+
|ARM_TRACE10
 
|-
 
|-
−
|1||ipu1||DI1_PIN13
+
|rowspan=7|106 ||rowspan=7| I2C1_SCL ||rowspan=7| N5 || IPU1_CSI0_DATA09 ||rowspan=7|2.5V
 
|-
 
|-
−
|2||ipu1||CSI0_D[0]
+
|EIM_DATA07
 
|-
 
|-
−
|3||ipu2||CSI1_D[13]
+
|ECSPI2_MOSI
 
|-
 
|-
−
|4||uart2||RXD_MUX
+
|KEY_ROW7
 
|-
 
|-
−
|5||gpio3||GPIO[27]
+
|I2C1_SCL
 
|-
 
|-
−
|6||ipu1||SISG[3]
+
|GPIO5_IO27
 
|-
 
|-
−
|7||ipu1||DISP1_DAT[23]
+
|ARM_TRACE06
 
|-
 
|-
−
| rowspan=8|34||rowspan=8|D25||rowspan=8|UART3_CTS||0||weim||WEIM_D[23]||rowspan=8|3.3V
+
|rowspan=5|107 ||rowspan=5| CSI0_DAT12 ||rowspan=5|M2 ||IPU1_CSI0_DATA12  ||rowspan=5|2.5V
 
|-
 
|-
−
|1||ipu1||DI0_D0_CS
+
|EIM_DATA08
 
|-
 
|-
−
|2||uart3||CTS
+
|UART4_TX_DATA
 
|-
 
|-
−
|3||uart1||DCD
+
|GPIO5_IO30
 
|-
 
|-
−
|4||ipu2||CSI1_DATA_EN
+
|ARM_TRACE09
 
|-
 
|-
−
|5||gpio3||GPIO[23]
+
|rowspan=7|108 ||rowspan=7| I2C1_SDA ||rowspan=7| N6 || IPU1_CSI0_DATA08 ||rowspan=7|2.5V
 
|-
 
|-
−
|6||ipu1||DI1_PIN2
+
|EIM_DATA06
 
|-
 
|-
−
|7||ipu1||DI1_PIN14
+
|ECSPI2_SCLK
 
|-
 
|-
−
| rowspan=8|36||rowspan=8|H21||rowspan=8|UART3_RTS||0||weim||WEIM_D[31]||rowspan=8|3.3V
+
|KEY_COL7
 
|-
 
|-
−
|1||ipu1||DISP1_DAT[20]
+
|I2C1_SDA
 
|-
 
|-
−
|2||ipu1||DI0_PIN12
+
|GPIO5_IO26
 
|-
 
|-
−
|3||ipu1||CSI0_D[2]
+
|ARM_TRACE05
 
|-
 
|-
−
|4||uart3||RTS
+
|rowspan=4|109 ||rowspan=4| CSI0_VSYNCH ||rowspan=4| N2 ||IPU1_CSI0_VSYNC ||rowspan=4|2.5V
 
|-
 
|-
−
|5||gpio3||GPIO[31]
+
|EIM_DATA01
 
|-
 
|-
−
|6||usboh3||USBH1_PWR
+
|GPIO5_IO21
 
|-
 
|-
−
|7||pl301_mx6q_ per1||HPROT[1]
+
|ARM_TRACE00
 
|-
 
|-
−
| rowspan=8|38||rowspan=8|F22||rowspan=8|UART3_TXD||0||weim||WEIM_D[24]||rowspan=8|3.3V
+
|rowspan=7|110 ||rowspan=7|AUD3_TXC ||rowspan=7| N1 || IPU1_CSI0_DATA04 ||rowspan=7|2.5V
 
|-
 
|-
−
|1||ecspi4||SS2
+
|EIM_DATA02
 
|-
 
|-
−
|2||uart3||TXD_MUX
+
|ECSPI1_SCLK
 
|-
 
|-
−
|3||ecspi1||SS2
+
|KEY_COL5
 
|-
 
|-
−
|4||ecspi2||SS2
+
|AUD3_TXC
 
|-
 
|-
−
|5||gpio3||GPIO[24]
+
|GPIO5_IO22
 
|-
 
|-
−
|6||audmux||AUD5_RXFS
+
|ARM_TRACE01
 
|-
 
|-
−
|7||uart1||DTR
+
|rowspan=3|111 ||rowspan=3| CSI0_PIXCLK ||rowspan=3| P1 ||IPU1_CSI0_PIXCLK ||rowspan=3|2.5V
 
|-
 
|-
−
| rowspan=8|40||rowspan=8|G22||rowspan=8|UART3_RXD||0||weim||WEIM_D[25]||rowspan=8|3.3V
+
|GPIO5_IO18
 
|-
 
|-
−
|1||ecspi4||SS3
+
|ARM_EVENTO
 
|-
 
|-
−
|2||uart3||RXD_MUX
+
|rowspan=7|112 ||rowspan=7|AUD3_TXD ||rowspan=7| P2 || IPU1_CSI0_DATA05 ||rowspan=7|2.5V
 
|-
 
|-
−
|3||ecspi1||SS3
+
|EIM_DATA03
 
|-
 
|-
−
|4||ecspi2||SS3
+
|ECSPI1_MOSI
 
|-
 
|-
−
|5||gpio3||GPIO[25]
+
|KEY_ROW5
 
|-
 
|-
−
|6||audmux||AUD5_RXC
+
|AUD3_TXD
 
|-
 
|-
−
|7||uart1||DSR
+
|GPIO5_IO23
 
|-
 
|-
−
| rowspan=7|42||rowspan=7|A23||rowspan=7|SD2_DATA2||0||usdhc2||DAT2||rowspan=7|3.3V
+
|ARM_TRACE02
 
|-
 
|-
−
|1||ecspi5||SS1
+
|rowspan=4|113 ||rowspan=4|CSI0_HSYNCH ||rowspan=4| P4 ||IPU1_CSI0_HSYNC ||rowspan=4|2.5V
 
|-
 
|-
−
|2||weim||WEIM_CS[3]
+
|CCM_CLKO1
 
|-
 
|-
−
|3||audmux||AUD4_TXD
+
|GPIO5_IO19
 
|-
 
|-
−
|4||kpp||ROW[6]
+
|ARM_TRACE_CTL
 
|-
 
|-
−
|5||gpio1||GPIO[13]
+
|rowspan=7|114 ||rowspan=7|AUD3_RXD ||rowspan=7| N3 || IPU1_CSI0_DATA07 ||rowspan=7|2.5V
 
|-
 
|-
−
|6||ccm||STOP
+
|EIM_DATA05
 
|-
 
|-
−
| rowspan=6|44||rowspan=6|A22||rowspan=6|SD2_DATA0||0||usdhc2||DAT0||rowspan=6|3.3V
+
|ECSPI1_SS0
 
|-
 
|-
−
|1||ecspi5||MISO
+
|KEY_ROW6
 
|-
 
|-
−
|3||audmux||AUD4_RXD
+
|AUD3_RXD
 
|-
 
|-
−
|4||kpp||ROW[7]
+
|GPIO5_IO25
 
|-
 
|-
−
|5||gpio1||GPIO[15]
+
|ARM_TRACE04
 
|-
 
|-
−
|6||dcic2||DCIC_OUT
+
|rowspan=5|115 ||rowspan=5| CSI0_DAT15 ||rowspan=5|M5 ||IPU1_CSI0_DATA15  ||rowspan=5|2.5V
 
|-
 
|-
−
| rowspan=8|46||rowspan=8|C21||rowspan=8|SD2_CLK||0||usdhc2||CLK||rowspan=8|3.3V
+
|EIM_DATA11
 
|-
 
|-
−
|1||ecspi5||SCLK
+
|UART5_RX_DATA
 
|-
 
|-
−
|2||kpp||COL[5]
+
|GPIO6_IO01
 
|-
 
|-
−
|3||audmux||AUD4_RXFS
+
|ARM_TRACE12
 
|-
 
|-
−
|4||pcie_ctrl||DIAG_STATUS_BUS_MUX[9]
+
|rowspan=7|116 ||rowspan=7|AUD3_TXFS ||rowspan=7| N4 || IPU1_CSI0_DATA06 ||rowspan=7|2.5V
 
|-
 
|-
−
|5||gpio1||GPIO[10]
+
|EIM_DATA04
 
|-
 
|-
−
|6||phy||DTB[1]
+
|ECSPI1_MISO
 
|-
 
|-
−
|7||sata_phy||DTB[1]
+
|KEY_COL6
 
|-
 
|-
−
| rowspan=7|48||rowspan=7|B22||rowspan=7|SD2_DATA3||0||usdhc2||DAT3||rowspan=7|3.3V
+
|AUD3_TXFS
 
|-
 
|-
−
|1||ecspi5||SS3
+
|GPIO5_IO24
 
|-
 
|-
−
|2||kpp||COL[6]
+
|ARM_TRACE03
 
|-
 
|-
−
|3||audmux||AUD4_TXC
+
|rowspan=8|117 ||rowspan=8|CAN1_TX ||rowspan=8| R3 || ESAI_TX4_RX1 ||rowspan=8|3.3V
 
|-
 
|-
−
|4||pcie_ctrl||DIAG_STATUS_BUS_MUX[11]
+
|ECSPI5_RDY
 
|-
 
|-
−
|5||gpio1||GPIO[12]
+
|EPIT1_OUT
 
|-
 
|-
−
|6||sjc||DONE
+
|FLEXCAN1_TX
 
|-
 
|-
−
| rowspan=6|50||rowspan=6|F19||rowspan=6|SD2_CMD||0||usdhc2||CMD||rowspan=6|3.3V
+
|UART2_TX_DATA
 
|-
 
|-
−
|1||ecspi5||MOSI
+
|GPIO1_IO07
 
|-
 
|-
−
|2||kpp||ROW[5]
+
|SPDIF_LOCK
 
|-
 
|-
−
|3||audmux||AUD4_RXC
+
|USB_OTG_HOST_MODE
 
|-
 
|-
−
|4||pcie_ctrl||DIAG_STATUS_BUS_MUX[10]
+
|rowspan=7|118 ||rowspan=7|I2C3_SCL ||rowspan=7| R7 || ESAI_RX_HF_CLK ||rowspan=7|3.3V
 
|-
 
|-
−
|5||gpio1||GPIO[11]
+
|I2C3_SCL
 
|-
 
|-
−
| rowspan=7|52||rowspan=7|E20||rowspan=7|SD2_DATA1||0||usdhc2||DAT1||rowspan=7|3.3V
+
|XTALOSC_REF_CLK_24M
 
|-
 
|-
−
|1||ecspi5||SS0
+
|CCM_CLKO2
 
|-
 
|-
−
|2||weim||WEIM_CS[2]
+
|GPIO1_IO03
 
|-
 
|-
−
|3||audmux||AUD4_TXFS
+
|USB_H1_OC
 
|-
 
|-
−
|4||kpp||COL[7]
+
|MLB_CLK
 
|-
 
|-
−
|5||gpio1||GPIO[14]
+
|rowspan=8|119 ||rowspan=8|CAN1_RX ||rowspan=8| R5 || ESAI_TX5_RX0 ||rowspan=8|3.3V
 
|-
 
|-
−
|6||ccm||WAIT
+
|XTALOSC_REF_CLK_32K
 
|-
 
|-
−
|54||B14||SATA_RXP|| ||rowspan=4|SATA</p| ||SATA_RXP||rowspan=4|2.5V
+
|EPIT2_OUT
 
|-
 
|-
−
|56||A14||SATA_RXN|| ||SATA_RXN
+
|FLEXCAN1_RX
 
|-
 
|-
−
|58||B12||SATA_TXN|| ||SATA_TXN
+
|UART2_RX_DATA
 
|-
 
|-
−
|60||A12||SATA_TXP|| ||SATA_TXP
+
|GPIO1_IO08
 
|-
 
|-
−
| rowspan=8|62||rowspan=8|H20||rowspan=8|USB_OTG_OC||0||weim||WEIM_D[21]||rowspan=8|3.3V
+
|SPDIF_SR_CLK
 
|-
 
|-
−
|1||ecspi4||SCLK
+
|USB_OTG_PWR_CTL_WAKE
 
|-
 
|-
−
|2||ipu1||DI0_PIN17
+
|rowspan=5|120 ||rowspan=5| I2C3_SDA ||rowspan=5|T3 ||ESAI_TX_CLK  ||rowspan=5|3.3V
 
|-
 
|-
−
|3||ipu2||CSI1_D[11]
+
|I2C3_SDA
 
|-
 
|-
−
|4||usboh3||USBOTG_OC
+
|GPIO1_IO06
 
|-
 
|-
−
|5||gpio3||GPIO[21]
+
|SD2_LCTL
 
|-
 
|-
−
|6||i2c1||SCL
+
|MLB_SIG
 
|-
 
|-
−
|7||spdif||IN1
+
|rowspan=7| 121 ||rowspan=7|UART4_TXD ||rowspan=7| W5 || ECSPI1_SCLK ||rowspan=7|3.3V
 
|-
 
|-
−
| rowspan=8|64||rowspan=8|E23||rowspan=8|USB_OTG_PWR_EN||0||weim||WEIM_D[22]||rowspan=8|3.3V
+
|ENET_RX_DATA3
 
|-
 
|-
−
|1||ecspi4||MISO
+
|AUD5_TXC
 
|-
 
|-
−
|2||ipu1||DI0_PIN1
+
|KEY_COL0
 
|-
 
|-
−
|3||ipu2||CSI1_D[10]
+
|UART4_TX_DATA
 
|-
 
|-
−
|4||usboh3||USBOTG_PWR
+
|GPIO4_IO06
 
|-
 
|-
−
|5||gpio3||GPIO[22]
+
|DCIC1_OUT
 
|-
 
|-
−
|6||spdif||OUT1
+
|rowspan=6| 122 ||rowspan=6|CAN2_TX ||rowspan=6| T6 || FLEXCAN2_TX ||rowspan=6|3.3V
 
|-
 
|-
−
|7||pl301_mx6q_ per1||HWRITE
+
|IPU1_SISG4
 
|-
 
|-
−
|66||B6||USB_OTG_DN|| ||rowspan=3|USBOTG</p| ||USB_OTG_DN||rowspan=2|2.5V
+
|USB_OTG_OC
 
|-
 
|-
−
|68||A6||USB_OTG_DP|| ||USB_OTG_DP
+
|KEY_COL4
 
|-
 
|-
−
|70||E9||USB_OTG_VBUS|| ||USB_OTG_VBUS||5V
+
|UART5_RTS_B
 
|-
 
|-
−
| rowspan=7|72||rowspan=7|T4||rowspan=7|USB_OTG_ID||0||esai1||SCKR||rowspan=7|3.3V
+
|GPIO4_IO14
 
|-
 
|-
−
|1||wdog2||WDOG_B
+
|rowspan=7| 123 ||rowspan=7|UART4_RXD ||rowspan=7| V6 || ECSPI1_MOSI ||rowspan=7|3.3V
 
|-
 
|-
−
|2||kpp||ROW[5]
+
|ENET_TX_DATA3
 
|-
 
|-
−
|4||pwm2||PWMO
+
|AUD5_TXD
 
|-
 
|-
−
|5||gpio1||GPIO[1]
+
|KEY_ROW0
 
|-
 
|-
−
|6||usdhc1||CD
+
|UART4_RX_DATA
 
|-
 
|-
−
|7||src||TESTER_ACK
+
|GPIO4_IO07
 
|-
 
|-
−
|74||B2||PCIE_RXP|| ||rowspan=6|PCIE</p| ||PCIE_RXP||rowspan=6|2.5V
+
|DCIC2_OUT
 
|-
 
|-
−
|76||B1||PCIE_RXM|| ||PCIE_RXM
+
|rowspan=6| 124 ||rowspan=6|CAN2_RX ||rowspan=6|V5 || FLEXCAN2_RX ||rowspan=6|3.3V
 
|-
 
|-
−
|78||B3||PCIE_TXP|| ||PCIE_TXP
+
|IPU1_SISG5
 
|-
 
|-
−
|80||A3||PCIE_TXM|| ||PCIE_TXM
+
|USB_OTG_PWR
 
|-
 
|-
−
|82||D7||CLK1_P|| ||CLK1_P
+
|KEY_ROW4
 
|-
 
|-
−
|84||C7||CLK1_N|| ||CLK1_N
+
|UART5_CTS_B
 
|-
 
|-
−
|86||K4||HDMI_D2P|| ||rowspan=10|HDMI</p| ||HDMI_D2P||rowspan=10|2.5V
+
|GPIO4_IO15
 
|-
 
|-
−
|88||K3||HDMI_D2M|| ||HDMI_D2M
+
|rowspan=7| 125 ||rowspan=7|UART5_RXD ||rowspan=7| U6 || ECSPI1_SS0 ||rowspan=7|3.3V
 
|-
 
|-
−
|90||W4||HDMI_CEC_IN|| ||HDMI_CEC_IN
+
|ENET_COL
 
|-
 
|-
−
|92||K1||HDMI_HPD|| ||HDMI_HPD
+
|AUD5_RXD
 
|-
 
|-
−
|94||J4||HDMI_D1P|| ||HDMI_D1P
+
|KEY_ROW1
 
|-
 
|-
−
|96||J3||HDMI_D1M|| ||HDMI_D1M
+
|UART5_RX_DATA
 
|-
 
|-
−
|98||J6||HDMI_CLKP|| ||HDMI_CLKP
+
|GPIO4_IO09
 
|-
 
|-
−
|100||J5||HDMI_CLKM|| ||HDMI_CLKM
+
|SD2_VSELECT
 
|-
 
|-
−
|102||K6||HDMI_D0P|| ||HDMI_D0P
+
|rowspan=7| 126 ||rowspan=7|GPIO_0_CLKO ||rowspan=7| T5 || CCM_CLKO1 ||rowspan=7|3.3V
 
|-
 
|-
−
|104||K5||HDMI_D0M|| ||HDMI_D0M
+
|KEY_COL5
 
|-
 
|-
−
| rowspan=8|106||rowspan=8|N5||rowspan=8|I2C1_SCL||0||ipu1||CSI0_D[9]||rowspan=8|2.5V
+
|ASRC_EXT_CLK
 
|-
 
|-
−
|1||weim||WEIM_D[7]
+
|EPIT1_OUT
 
|-
 
|-
−
|2||ecspi2||MOSI
+
|GPIO1_IO00
 
|-
 
|-
−
|3||kpp||ROW[7]
+
|USB_H1_PWR
 
|-
 
|-
−
|4||i2c1||SCL
+
|SNVS_VIO_5
 
|-
 
|-
−
|5||gpio5||GPIO[27]
+
|rowspan=7|127 ||rowspan=7| UART5_TXD ||rowspan=7|U7 || ECSPI1_MISO||rowspan=7|3.3V
 
|-
 
|-
−
|6||mmdc||MMDC_DEBUG[48]
+
|ENET_MDIO
 
|-
 
|-
−
|7||ARM CortexA9 MPCore Platform||TRACE[6]
+
|AUD5_TXFS
 
|-
 
|-
−
| rowspan=8|108||rowspan=8|N6||rowspan=8|I2C1_SDA||0||ipu1||CSI0_D[8]||rowspan=8|2.5V
+
|KEY_COL1
 
|-
 
|-
−
|1||weim||WEIM_D[6]
+
|UART5_TX_DATA
 
|-
 
|-
−
|2||ecspi2||SCLK
+
|GPIO4_IO08
 
|-
 
|-
−
|3||kpp||COL[7]
+
|SD1_VSELECT
 
|-
 
|-
−
|4||i2c1||SDA
+
|128 || GND || --- || --- || ---
 
|-
 
|-
−
|5||gpio5||GPIO[26]
+
|129 || LVDS0_TX2_P || V1 || LVDS0_DATA2_P ||rowspan=20| 2.5V
 
|-
 
|-
−
|6||mmdc||MMDC_DEBUG[47]
+
|130 ||LVDS1_TX1_N || AA2 || LVDS1_DATA1_N
 
|-
 
|-
−
|7||ARM CortexA9 MPCore Platform||TRACE[5]
+
|131 ||LVDS0_TX2_N || V2 || LVDS0_DATA2_N 
 
|-
 
|-
−
| rowspan=8|110||rowspan=8|N1||rowspan=8|AUD3_TXC||0||ipu1||CSI0_D[4]||rowspan=8|2.5V
+
|132 ||LVDS1_TX1_P || AA1 || LVDS1_DATA1_P 
 
|-
 
|-
−
|1||weim||WEIM_D[2]
+
|133 ||LVDS0_TX0_N || U2 || LVDS0_DATA0_N 
 
|-
 
|-
−
|2||ecspi1||SCLK
+
|134 ||LVDS1_TX0_P || Y2 || LVDS1_DATA0_P 
 
|-
 
|-
−
|3||kpp||COL[5]
+
|135 ||LVDS0_TX0_P || U1 || LVDS0_DATA0_P
 
|-
 
|-
−
|4||audmux||AUD3_TXC
+
|136 || LVDS1_TX0_N || Y1 || LVDS1_DATA0_N
 
|-
 
|-
−
|5||gpio5||GPIO[22]
+
|137 || LVDS0_TX3_N || W2 || LVDS0_DATA3_N
 
|-
 
|-
−
|6||mmdc||MMDC_DEBUG[43]
+
|138 || LVDS1_TX3_N || AA3|| LVDS1_DATA3_N
 
|-
 
|-
−
|7||ARM CortexA9 MPCore Platform||TRACE[1]
+
|139 || LVDS0_TX3_P ||W1|| LVDS0_DATA3_P
 
|-
 
|-
−
| rowspan=8|112||rowspan=8|P2||rowspan=8|AUD3_TXD||0||ipu1||CSI0_D[5]||rowspan=8|2.5V
+
|140 ||LVDS1_TX3_P|| AA4 || LVDS1_DATA3_P
 
|-
 
|-
−
|1||weim||WEIM_D[3]
+
|141 ||LVDS0_CLK_N||V4||LVDS0_CLK_N
 
|-
 
|-
−
|2||ecspi1||MOSI
+
|142 ||LVDS1_TX2_P||AB2||LVDS1_DATA2_P
 
|-
 
|-
−
|3||kpp||ROW[5]
+
|143 ||LVDS0_CLK_P||V3||LVDS0_CLK_P
 
|-
 
|-
−
|4||audmux||AUD3_TXD
+
|144 ||LVDS1_TX2_N||AB1||LVDS1_DATA2_N
 
|-
 
|-
−
|5||gpio5||GPIO[23]
+
|145 ||LVDS0_TX1_N||U4||LVDS0_DATA1_N
 
|-
 
|-
−
|6||mmdc||MMDC_DEBUG[44]
+
|146 ||LVDS1_CLK_N||Y3||LVDS1_CLK_N
 
|-
 
|-
−
|7||ARM CortexA9 MPCore Platform||TRACE[2]
+
|147||LVDS0_TX1_P ||U3 ||LVDS0_DATA1_P
 
|-
 
|-
−
| rowspan=8|114||rowspan=8|N3||rowspan=8|AUD3_RXD||0||ipu1||CSI0_D[7]||rowspan=8|2.5V
+
|148||LVDS1_CLK_P ||Y4 || LVDS1_CLK_P
 
|-
 
|-
−
|1||weim||WEIM_D[5]
+
|149 || GND || --- || --- || ---
 
|-
 
|-
−
|2||ecspi1||SS0
+
|rowspan=3|150 ||rowspan=3| NANDF_ALE ||rowspan=3| A16 ||NAND_ALE ||rowspan=3|3.3V
 
|-
 
|-
−
|3||kpp||ROW[6]
+
|SD4_RESET
 
|-
 
|-
−
|4||audmux||AUD3_RXD
+
|GPIO6_IO08
 
|-
 
|-
−
|5||gpio5||GPIO[25]
+
|rowspan=5|151 ||rowspan=5| SD1_DAT1/TOUCH_NEINT1 ||rowspan=5| C20 ||SD1_DATA1 ||rowspan=5|3.3V
 
|-
 
|-
−
|6||mmdc||MMDC_DEBUG[46]
+
|ECSPI5_SS0
 
|-
 
|-
−
|7||ARM CortexA9 MPCore Platform||TRACE[4]
+
|PWM3_OUT
 
|-
 
|-
−
| rowspan=8|116||rowspan=8|N4||rowspan=8|AUD3_TXFS||0||ipu1||CSI0_D[6]||rowspan=8|2.5V
+
|GPT_CAPTURE2
 
|-
 
|-
−
|1||weim||WEIM_D[4]
+
|GPIO1_IO17
 
|-
 
|-
−
|2||ecspi1||MISO
+
|rowspan=3|152 ||rowspan=3| NANDF_CLE ||rowspan=3| C15 || NAND_CLE  ||rowspan=3|3.3V
 
|-
 
|-
−
|3||kpp||COL[6]
+
|IPU2_SISG4
 
|-
 
|-
−
|4||audmux||AUD3_TXFS
+
|GPIO6_IO07
 
|-
 
|-
−
|5||gpio5||GPIO[24]
+
|rowspan=7| 153 ||rowspan=7|SD1_DATA2  ||rowspan=7| E19 || SD1_DATA2 ||rowspan=7|3.3V
 
|-
 
|-
−
|6||mmdc||MMDC_DEBUG[45]
+
|ECSPI5_SS1
 
|-
 
|-
−
|7||ARM CortexA9 MPCore Platform||TRACE[3]
+
|GPT_COMPARE2
 
|-
 
|-
−
| rowspan=7|118||rowspan=7|R7||rowspan=7|I2C3_SCL||0||esai1||HCKR||rowspan=7|3.3V
+
|PWM2_OUT
 
|-
 
|-
−
|1||observe_mux||OBSRV_INT_OUT0
+
|WDOG1_B
 
|-
 
|-
−
|2||i2c3||SCL
+
|GPIO1_IO19
 
|-
 
|-
−
|4||ccm||CLKO2
+
|WDOG1_RESET_B_DEB
 
|-
 
|-
−
|5||gpio1||GPIO[3]
+
|rowspan=3|154 ||rowspan=3| NANDF_WP_B ||rowspan=3| E15 || NAND_WP_B  ||rowspan=3|3.3V
 
|-
 
|-
−
|6||usboh3||USBH1_OC
+
|IPU2_SISG5
 
|-
 
|-
−
|7||mlb||MLBCLK
+
|GPIO6_IO09
 
|-
 
|-
−
| rowspan=8|120||rowspan=8|T3||rowspan=8|I2C3_SDA||0||esai1||SCKT||rowspan=8|3.3V
+
|rowspan=6|155 ||rowspan=6| NANDF_CS3 ||rowspan=6| D16 ||NAND_CE3_B ||rowspan=6|3.3V
 
|-
 
|-
−
|1||observe_mux||OBSRV_INT_OUT1
+
|IPU1_SISG1
 
|-
 
|-
−
|2||i2c3||SDA
+
|ESAI_TX1
 
|-
 
|-
−
|3||ccm||CCM_OUT_0
+
|EIM_ADDR26
 
|-
 
|-
−
|4||csu||CSU_INT_DEB
+
|GPIO6_IO16
 
|-
 
|-
−
|5||gpio1||GPIO[6]
+
|IPU2_SISG1
 
|-
 
|-
−
|6||usdhc2||LCTL
+
|rowspan=5|156 ||rowspan=5| SD1_CLK ||rowspan=5| D20 ||SD1_CLK ||rowspan=5|3.3V
 
|-
 
|-
−
|7||mlb||MLBSIG
+
|ECSPI5_SCLK
 
|-
 
|-
−
| rowspan=8|122||rowspan=8|T6||rowspan=8|CAN2_TX||0||can2||TXCAN||rowspan=8|3.3V
+
|XTALOSC_OSC32K_32K_OUT
 
|-
 
|-
−
|1||ipu1||SISG[4]
+
|GPT_CLKIN
 
|-
 
|-
−
|2||usboh3||USBOTG_OC
+
|GPIO1_IO20
 
|-
 
|-
−
|3||kpp||COL[4]
+
|rowspan=6|157 ||rowspan=6| DISP0_DAT16 ||rowspan=6| T21 ||IPU1_DISP0_DATA16 ||rowspan=6|3.3V
 
|-
 
|-
−
|4||uart5||RTS
+
|IPU2_DISP0_DATA16
 
|-
 
|-
−
|5||gpio4||GPIO[14]
+
|ECSPI2_MOSI
 
|-
 
|-
−
|6||mmdc||MMDC_DEBUG[49]
+
|AUD5_TXC
 
|-
 
|-
−
|7||ARM CortexA9 MPCore Platform||HADDR[7]
+
|SDMA_EXT_EVENT0
 
|-
 
|-
−
| rowspan=8|124||rowspan=8|V5||rowspan=8|CAN2_RX||0||can2||RXCAN||rowspan=8|3.3V
+
|GPIO5_IO10
 
|-
 
|-
−
|1||ipu1||SISG[5]
+
|rowspan=7| 158 ||rowspan=7|I2C2_SCL  ||rowspan=7| U5 || ECSPI1_SS1 ||rowspan=7|3.3V
 
|-
 
|-
−
|2||usboh3||USBOTG_PWR
+
|ENET_RX_DATA2
 
|-
 
|-
−
|3||kpp||ROW[4]
+
|FLEXCAN1_TX
 
|-
 
|-
−
|4||uart5||CTS
+
|KEY_COL2
 
|-
 
|-
−
|5||gpio4||GPIO[15]
+
|ENET_MDC
 
|-
 
|-
−
|6||mmdc||MMDC_DEBUG[50]
+
|GPIO4_IO10
 
|-
 
|-
−
|7||pl301_mx6q_ per1||HADDR[8]
+
|USB_H1_PWR_CTL_WAKE
 
|-
 
|-
−
| rowspan=7|126||rowspan=7|T5||rowspan=7|GPIO_0_CLKO||0||ccm||CLKO||rowspan=7|3.3V
+
|rowspan=5|159 ||rowspan=5| DISP0_DAT23 ||rowspan=5| W24 ||IPU1_DISP0_DATA23 ||rowspan=5|3.3V
 
|-
 
|-
−
|2||kpp||COL[5]
+
|IPU2_DISP0_DATA23
 
|-
 
|-
−
|3||asrc||ASRC_EXT_CLK
+
|ECSPI1_SS0
 
|-
 
|-
−
|4||epit1||EPITO
+
|AUD4_RXD
 
|-
 
|-
−
|5||gpio1||GPIO[0]
+
|GPIO5_IO17
 
|-
 
|-
−
|6||usboh3||USBH1_PWR
+
|rowspan=7| 160 ||rowspan=7|I2C2_SDA  ||rowspan=7| T7 ||XTALOSC_OSC32K_32K_OUT||rowspan=7|3.3V
 
|-
 
|-
−
|7||snvs_hp_wrapper||SNVS_VIO_5
+
|ASRC_EXT_CLK
 
|-
 
|-
−
|128||NC||GND|| || || ||0V
+
|HDMI_TX_DDC_SDA
 
|-
 
|-
−
|130||AA2||LVDS1_TX1_N|| ||rowspan=10|LVDS1</p| ||LVDS1_TX1_N||rowspan=10|2.5V
+
|KEY_ROW3
 
|-
 
|-
−
|132||AA1||LVDS1_TX1_P|| ||LVDS1_TX1_P
+
|I2C2_SDA
 
|-
 
|-
−
|134||Y2||LVDS1_TX0_P|| ||LVDS1_TX0_P
+
|GPIO4_IO13
 
|-
 
|-
−
|136||Y1||LVDS1_TX0_N|| ||LVDS1_TX0_N
+
|SD1_VSELECT
 
|-
 
|-
−
|138||AA3||LVDS1_TX3_N|| ||LVDS1_TX3_N
+
|rowspan=3|161 ||rowspan=3| DISP0_DAT11 ||rowspan=3| T23 || IPU1_DISP0_DATA11  ||rowspan=3|3.3V
 
|-
 
|-
−
|140||AA4||LVDS1_TX3_P|| ||LVDS1_TX3_P
+
|IPU2_DISP0_DATA11
 
|-
 
|-
−
|142||AB2||LVDS1_TX2_P|| ||LVDS1_TX2_P
+
|GPIO5_IO05
 
|-
 
|-
−
|144||AB1||LVDS1_TX2_N|| ||LVDS1_TX2_N
+
|rowspan=7| 162 ||rowspan=7|DISP0_DAT19  ||rowspan=7| U23 ||IPU1_DISP0_DATA19||rowspan=7|3.3V
 
|-
 
|-
−
|146||Y3||LVDS1_CLK_N|| ||LVDS1_CLK_N
+
|IPU2_DISP0_DATA19
 
|-
 
|-
−
|148||Y4||LVDS1_CLK_P|| ||LVDS1_CLK_P
+
|ECSPI2_SCLK
 
|-
 
|-
−
| rowspan=8|150||rowspan=8|A16||rowspan=8|NANDF_ALE||0||rawnand||ALE||rowspan=8|3.3V
+
|AUD5_RXD
 
|-
 
|-
−
|1||usdhc4||RST
+
|AUD4_RXC
 
|-
 
|-
−
|2||pcie_ctrl||DIAG_STATUS_BUS_MUX[0]
+
|GPIO5_IO13
 
|-
 
|-
−
|3||usboh3||UH3_DFD_OUT[12]
+
|EIM_CS3_B
 
|-
 
|-
−
|4||usboh3||UH2_DFD_OUT[12]
+
|rowspan=5|163 ||rowspan=5| DISP0_DAT15 ||rowspan=5| T22 ||IPU1_DISP0_DATA15 ||rowspan=5|3.3V
 
|-
 
|-
−
|5||gpio6||GPIO[8]
+
|IPU2_DISP0_DATA15
 
|-
 
|-
−
|6||mipi_core||DPHY_TEST_IN[24]
+
|ECSPI1_SS1
 
|-
 
|-
−
|7||tpsmp||HTRANS[1]
+
|ECSPI2_SS1
 
|-
 
|-
−
| rowspan=8|152||rowspan=8|C15||rowspan=8|NANDF_CLE||0||rawnand||CLE||rowspan=8|3.3V
+
|GPIO5_IO09
 
|-
 
|-
−
|1||ipu2||SISG[4]
+
|rowspan=5|164 ||rowspan=5| DISP0_DAT20 ||rowspan=5| U22 ||IPU1_DISP0_DATA20 ||rowspan=5|3.3V
 
|-
 
|-
−
|2||pcie_ctrl||DIAG_STATUS_BUS_MUX[31]
+
|IPU2_DISP0_DATA20
 
|-
 
|-
−
|3||usboh3||UH3_DFD_OUT[11]
+
|ECSPI1_SCLK
 
|-
 
|-
−
|4||usboh3||UH2_DFD_OUT[11]
+
|AUD4_TXC
 
|-
 
|-
−
|5||gpio6||GPIO[7]
+
|GPIO5_IO14
 
|-
 
|-
−
|6||mipi_core||DPHY_TEST_IN[23]
+
|rowspan=4|165 ||rowspan=4| DISP0_DAT13 ||rowspan=4| R20 ||IPU1_DISP0_DATA13 ||rowspan=4|3.3V
 
|-
 
|-
−
|7||tpsmp||HTRANS[0]
+
|IPU2_DISP0_DATA13
 
|-
 
|-
−
| rowspan=8|154||rowspan=8|E15||rowspan=8|NANDF_WP_B||0||rawnand||RESETN||rowspan=8|3.3V
+
|AUD5_RXFS
 
|-
 
|-
−
|1||ipu2||SISG[5]
+
|GPIO5_IO0
 
|-
 
|-
−
|2||pcie_ctrl||DIAG_STATUS_BUS_MUX[1]
+
|rowspan=5|166 ||rowspan=5| DISP0_DAT6 ||rowspan=5| R23 ||IPU1_DISP0_DATA06 ||rowspan=5|3.3V
 
|-
 
|-
−
|3||usboh3||UH3_DFD_OUT[13]
+
|IPU2_DISP0_DATA06
 
|-
 
|-
−
|4||usboh3||UH2_DFD_OUT[13]
+
|ECSPI3_SS3
 
|-
 
|-
−
|5||gpio6||GPIO[9]
+
|AUD6_RXC
 
|-
 
|-
−
|6||mipi_core||DPHY_TEST_OUT[32]
+
|GPIO4_IO27
 
|-
 
|-
−
|7||pl301_mx6q_per1||HSIZE[0]
+
|rowspan=5|167 ||rowspan=5| DISP0_DAT8 ||rowspan=5| R22 ||IPU1_DISP0_DATA08 ||rowspan=5|3.3V
 
|-
 
|-
−
| rowspan=7|156||rowspan=7|D20||rowspan=7|SD1_CLK||0||usdhc1||CLK||rowspan=7|3.3V
+
|IPU2_DISP0_DATA08
 
|-
 
|-
−
|1||ecspi5||SCLK
+
|PWM1_OUT
 
|-
 
|-
−
|2||osc32k||32K_OUT
+
|WDOG1_B
 
|-
 
|-
−
|3||gpt||CLKIN
+
|GPIO4_IO29
 
|-
 
|-
−
|5||gpio1||GPIO[20]
+
|rowspan=5|168 ||rowspan=5| DISP0_DAT21 ||rowspan=5| T20 ||IPU1_DISP0_DATA21 ||rowspan=5|3.3V
 
|-
 
|-
−
|6||phy||DTB[0]
+
|IPU2_DISP0_DATA21
 
|-
 
|-
−
|7||sata_phy||DTB[0]
+
|ECSPI1_MOSI
 
|-
 
|-
−
| rowspan=8|158||rowspan=8|U5||rowspan=8|I2C2_SCL||0||ecspi1||SS3||rowspan=8|3.3V
+
|AUD4_TXD
 
|-
 
|-
−
|1||enet||CRS
+
|GPIO5_IO15
 
|-
 
|-
−
|2||hdmi_tx||DDC_SCL
+
|rowspan=4|169 ||rowspan=4| DISP0_DAT3 ||rowspan=4| P21 ||IPU1_DISP0_DATA03 ||rowspan=4|3.3V
 
|-
 
|-
−
|3||kpp||COL[3]
+
|IPU2_DISP0_DATA03
 
|-
 
|-
−
|4||i2c2||SCL
+
|ECSPI3_SS0
 
|-
 
|-
−
|5||gpio4||GPIO[12]
+
|GPIO4_IO24
 
|-
 
|-
−
|6||spdif||IN1
+
|rowspan=4|170 ||rowspan=4| DISP0_DAT2 ||rowspan=4| P23 ||IPU1_DISP0_DATA02 ||rowspan=4|3.3V
 
|-
 
|-
−
|7||pl301_mx6q_per1||HADDR[5]
+
|IPU2_DISP0_DATA02
 
|-
 
|-
−
| rowspan=8|160||rowspan=8|T7||rowspan=8|I2C2_SDA||0||osc32k||32K_OUT||rowspan=8|3.3V
+
|ECSPI3_MISO
 
|-
 
|-
−
|1||asrc||ASRC_EXT_CLK
+
|GPIO4_IO23
 
|-
 
|-
−
|2||hdmi_tx||DDC_SDA
+
|rowspan=4|171 ||rowspan=4| DISP0_DAT1 ||rowspan=4| P22 ||IPU1_DISP0_DATA01 ||rowspan=4|3.3V
 
|-
 
|-
−
|3||kpp||ROW[3]
+
|IPU2_DISP0_DATA01
 
|-
 
|-
−
|4||i2c2||SDA
+
|ECSPI3_MOSI
 
|-
 
|-
−
|5||gpio4||GPIO[13]
+
|GPIO4_IO22
 
|-
 
|-
−
|6||usdhc1||VSELECT
+
|rowspan=4|172 ||rowspan=4| DISP0_DAT10 ||rowspan=4| R21 ||IPU1_DISP0_DATA00  ||rowspan=4|3.3V
 
|-
 
|-
−
|7||pl301_mx6q_per1||HADDR[6]
+
|IPU2_DISP0_DATA00
 
|-
 
|-
−
| rowspan=8|162||rowspan=8|U23||rowspan=8|DISP0_DAT19||0||ipu1||DISP0_DAT[19]||rowspan=8|3.3V
+
|ECSPI3_SCLK
 
|-
 
|-
−
|1||ipu2||DISP0_DAT[19]
+
|GPIO4_IO21
 
|-
 
|-
−
|2||ecspi2||SCLK
+
|rowspan=4|173 ||rowspan=4| DISP0_DRDY ||rowspan=4| N21 ||IPU1_DI0_PIN15  ||rowspan=4|3.3V
 
|-
 
|-
−
|3||audmux||AUD5_RXD
+
|IPU2_DI0_PIN15
 
|-
 
|-
−
|4||audmux||AUD4_RXC
+
|AUD6_TXC
 
|-
 
|-
−
|5||gpio5||GPIO[13]
+
|GPIO4_IO17
 
|-
 
|-
−
|6||mmdc||MMDC_DEBUG[24]
+
|rowspan=4|174 ||rowspan=4| DISP0_DAT4 ||rowspan=4| P20 ||IPU1_DISP0_DATA04  ||rowspan=4|3.3V
 
|-
 
|-
−
|7||weim||WEIM_CS[3]
+
|IPU2_DISP0_DATA04
 
|-
 
|-
−
| rowspan=8|164||rowspan=8|U22||rowspan=8|DISP0_DAT20||0||ipu1||DISP0_DAT[20]||rowspan=8|3.3V
+
|ECSPI3_SS1
 
|-
 
|-
−
|1||ipu2||DISP0_DAT[20]
+
|GPIO4_IO25
 
|-
 
|-
−
|2||ecspi1||SCLK
+
|rowspan=4|175 ||rowspan=4| DISP0_VSYNCH||rowspan=4| N20 ||IPU1_DI0_PIN03  ||rowspan=4|3.3V
 
|-
 
|-
−
|3||audmux||AUD4_TXC
+
|IPU2_DI0_PIN03
 
|-
 
|-
−
|4||sdma||DEBUG_EVT_CHN_LINES[7]
+
|AUD6_TXFS
 
|-
 
|-
−
|5||gpio5||GPIO[14]
+
|GPIO4_IO19
 
|-
 
|-
−
|6||mmdc||MMDC_DEBUG[25]
+
|176 || GND || --- || --- || ---
 
|-
 
|-
−
|7||pl301_mx6q_ per1||HADDR[28]
+
|rowspan=7| 177 ||rowspan=7|DISP0_CONTRAST  ||rowspan=7| F18 ||SD1_DATA3||rowspan=7|3.3V
 
|-
 
|-
−
| rowspan=8|166||rowspan=8|R23||rowspan=8|DISP0_DAT6||0||ipu1||DISP0_DAT[6]||rowspan=8|3.3V
+
|ECSPI5_SS2
 
|-
 
|-
−
|1||ipu2||DISP0_DAT[6]
+
|GPT_COMPARE3
 
|-
 
|-
−
|2||ecspi3||SS3
+
|PWM1_OUT
 
|-
 
|-
−
|3||audmux||AUD6_RXC
+
|WDOG2_B
 
|-
 
|-
−
|4||sdma||DEBUG_RTBUFFER_WRITE
+
|GPIO1_IO21
 
|-
 
|-
−
|5||gpio4||GPIO[27]
+
|WDOG2_RESET_B_DEB
 
|-
 
|-
−
|6||mmdc||MMDC_DEBUG[11]
+
|rowspan=4|178 ||rowspan=4| ENET_REF_CLK||rowspan=4| R2 ||ENET_TX_CLK  ||rowspan=4|3.3V
 
|-
 
|-
−
|7||pl301_mx6q_ per1||HADDR[17]
+
|ESAI_RX_FS
 
|-
 
|-
−
| rowspan=8|168||rowspan=8|T20||rowspan=8|DISP0_DAT21||0||ipu1||DISP0_DAT[21]||rowspan=8|3.3V
+
|GPIO1_IO23
 
|-
 
|-
−
|1||ipu2||DISP0_DAT[21]
+
|SPDIF_SR_CLK
 
|-
 
|-
−
|2||ecspi1||MOSI
+
|rowspan=3|179 ||rowspan=3| DISP0_CLK||rowspan=3| N19 ||IPU1_DI0_DISP_CLK  ||rowspan=3|3.3V
 
|-
 
|-
−
|3||audmux||AUD4_TXD
+
|IPU2_DI0_DISP_CLK
 
|-
 
|-
−
|4||sdma||DEBUG_BUS_DEVICE[0]
+
|GPIO4_IO16
 
|-
 
|-
−
|5||gpio5||GPIO[15]
+
|rowspan=7|180 ||rowspan=7|ENET_NINT ||rowspan=7| P6 ||ESAI_TX1||rowspan=7|3.3V
 
|-
 
|-
−
|6||mmdc||MMDC_DEBUG[26]
+
|ENET_RX_CLK
 
|-
 
|-
−
|7||pl301_mx6q_per1||HADDR[29]
+
|SD3_VSELECT
 
|-
 
|-
−
| rowspan=8|170||rowspan=8|P23||rowspan=8|DISP0_DAT2||0||ipu1||DISP0_DAT[2]||rowspan=8|3.3V
+
|SDMA_EXT_EVENT1
 
|-
 
|-
−
|1||ipu2||DISP0_DAT[2]
+
|ASRC_EXT_CLK
 
|-
 
|-
−
|2||ecspi3||MISO
+
|GPIO7_IO13
 
|-
 
|-
−
|3||usdhc1||USDHC_DEBUG[2]
+
|SNVS_VIO_5_CTL
 
|-
 
|-
−
|4||sdma||DEBUG_MODE
+
|rowspan=7|181 ||rowspan=7|DISP0_DAT18 ||rowspan=7| V25 ||IPU1_DISP0_DATA18||rowspan=7|3.3V
 
|-
 
|-
−
|5||gpio4||GPIO[23]
+
|IPU2_DISP0_DATA18
 
|-
 
|-
−
|6||mmdc||MMDC_DEBUG[7]
+
|ECSPI2_SS0
 
|-
 
|-
−
|7||pl301_mx6q_per1||HADDR[13]
+
|AUD5_TXFS
 
|-
 
|-
−
| rowspan=7|172||rowspan=7|R21||rowspan=7|DISP0_DAT10||0||ipu1||DISP0_DAT[10]||rowspan=7|3.3V
+
|AUD4_RXFS
 
|-
 
|-
−
|1||ipu2||DISP0_DAT[10]
+
|GPIO5_IO12
 
|-
 
|-
−
|3||usdhc1||USDHC_DEBUG[6]
+
|EIM_CS2_B
 
|-
 
|-
−
|4||sdma||DEBUG_EVENT_CHANNE L[3]
+
|rowspan=5|182 ||rowspan=5| ENET_RXD1 ||rowspan=5| W22 ||MLB_SIG ||rowspan=5|3.3V
 
|-
 
|-
−
|5||gpio4||GPIO[31]
+
|ENET_RX_DATA1
 
|-
 
|-
−
|6||mmdc||MMDC_DEBUG[15]
+
|ESAI_TX_FS
 
|-
 
|-
−
|7||pl301_mx6q_per1||HADDR[21]
+
|ENET_1588_EVENT3_OUT
 
|-
 
|-
−
| rowspan=8|174||rowspan=8|P20||rowspan=8|DISP0_DAT4||0||ipu1||DISP0_DAT[4]||rowspan=8|3.3V
+
|GPIO1_IO26
 
|-
 
|-
−
|1||ipu2||DISP0_DAT[4]
+
|rowspan=5|183 ||rowspan=5| DISP0_DAT22 ||rowspan=5| V24 ||IPU1_DISP0_DATA22 ||rowspan=5|3.3V
 
|-
 
|-
−
|2||ecspi3||SS1
+
|IPU2_DISP0_DATA22
 
|-
 
|-
−
|3||usdhc1||USDHC_DEBUG[4]
+
|ECSPI1_MISO
 
|-
 
|-
−
|4||sdma||DEBUG_BUS_RWB
+
|AUD4_TXFS
 
|-
 
|-
−
|5||gpio4||GPIO[25]
+
|GPIO5_IO16
 
|-
 
|-
−
|6||mmdc||MMDC_DEBUG[9]
+
|rowspan=6|184 ||rowspan=6| ENET_RX_ER ||rowspan=6| W23 ||USB_OTG_ID ||rowspan=6|3.3V
 
|-
 
|-
−
|7||pl301_mx6q_per1||HADDR[15]
+
|ENET_RX_ER
 
|-
 
|-
−
|176||GND||GND|| || || ||0V
+
|ESAI_RX_HF_CLK
 
|-
 
|-
−
| rowspan=7|178||rowspan=7|R2||rowspan=7|ENET_REF_CLK||0||esai1||TX3_RX2||rowspan=7|3.3V
+
|SPDIF_IN
 
|-
 
|-
−
|1||enet||1588_EVENT2_IN
+
|ENET_1588_EVENT2_OUT
 
|-
 
|-
−
|3||usdhc1||LCTL
+
|GPIO1_IO24
 
|-
 
|-
−
|4||spdif||IN1
+
|rowspan=4|185 ||rowspan=4| DISP0_DAT14||rowspan=4| U25 ||IPU1_DISP0_DATA14  ||rowspan=4|3.3V
 
|-
 
|-
−
|5||gpio7||GPIO[11]
+
|IPU2_DISP0_DATA14
 
|-
 
|-
−
|6||i2c3||SDA
+
|AUD5_RXC
 
|-
 
|-
−
|7||sjc||DE_B
+
|GPIO5_IO08
 
|-
 
|-
−
| rowspan=8|180||rowspan=8|P6||rowspan=8|ENET_nINT||0||esai1||TX1||rowspan=8|3.3V
+
|rowspan=4|186 ||rowspan=4| ENET_NRST||rowspan=4| V22 ||ENET_TX_CLK  ||rowspan=4|3.3V
 
|-
 
|-
−
|1||enet||RX_CLK
+
|ESAI_RX_FS
 
|-
 
|-
−
|2||usdhc3||VSELECT
+
|GPIO1_IO23
 
|-
 
|-
−
|3||sdma||SDMA_EXT_EVENT[1]
+
|SPDIF_SR_CLK
 
|-
 
|-
−
|4||asrc||ASRC_EXT_CLK
+
|rowspan=6|187 ||rowspan=6| DISP0_DAT17 ||rowspan=6| U24 ||IPU1_DISP0_DATA17 ||rowspan=6|3.3V
 
|-
 
|-
−
|5||gpio7||GPIO[13]
+
|IPU2_DISP0_DATA17
 
|-
 
|-
−
|6||snvs_hp_wrapper||SNVS_VIO_5_CTL
+
|ECSPI2_MISO
 
|-
 
|-
−
|7||src||SYSTEM_RST
+
|AUD5_TXD
 
|-
 
|-
−
| rowspan=6|182||rowspan=6|W22||rowspan=6|ENET_RXD1||0||mlb||MLBSIG||rowspan=6|3.3V
+
|SDMA_EXT_EVENT1
 
|-
 
|-
−
|1||enet||RDATA[1]
+
|GPIO5_IO11
 
|-
 
|-
−
|2||esai1||FST
+
|rowspan=5|188 ||rowspan=5| ENET_MDIO ||rowspan=5| V23 ||ENET_MDIO ||rowspan=5|3.3V
 
|-
 
|-
−
|4||enet||1588_EVENT3_OUT
+
|ESAI_RX_CLK
 
|-
 
|-
−
|5||gpio1||GPIO[26]
+
|ENET_1588_EVENT1_OUT
 
|-
 
|-
−
|6||phy||TCK
+
|GPIO1_IO22
 
|-
 
|-
−
| rowspan=7|184||rowspan=7|W23||rowspan=7|ENET_RX_ER||0||NO_NAME||USBOTG_ID||rowspan=7|3.3V
+
|SPDIF_LOCK
 
|-
 
|-
−
|1||enet||RX_ER
+
|rowspan=5|189 ||rowspan=5| DISP0_DAT9 ||rowspan=5| T25 ||IPU1_DISP0_DATA09 ||rowspan=5|3.3V
 
|-
 
|-
−
|2||esai1||HCKR
+
|IPU2_DISP0_DATA09
 
|-
 
|-
−
|3||spdif||IN1
+
|PWM2_OUT
 
|-
 
|-
−
|4||enet||1588_EVENT2_OUT
+
|WDOG2_B
 
|-
 
|-
−
|5||gpio1||GPIO[24]
+
|GPIO4_IO30
 
|-
 
|-
−
|6||phy||TDI
+
|rowspan=4|190 ||rowspan=4|ENET_CRS_DV ||rowspan=4| U21 ||ENET_RX_EN  ||rowspan=4|3.3V
 
|-
 
|-
−
| rowspan=5|186||rowspan=5|V22||rowspan=5|ENET_nRST||1||enet||TX_CLK||rowspan=5|3.3V
+
|ESAI_TX_CLK
 
|-
 
|-
−
|2||esai1||FSR
+
|SPDIF_EXT_CLK
 
|-
 
|-
−
|3||sdma||DEBUG_BUS_DEVICE[4]
+
|GPIO1_IO25
 
|-
 
|-
−
|5||gpio1||GPIO[23]
+
|rowspan=3|191 ||rowspan=3|DISP0_DAT12 ||rowspan=3| T24 ||IPU1_DISP0_DATA12  ||rowspan=3|3.3V
 
|-
 
|-
−
|6||spdif||SRCLK
+
|IPU2_DISP0_DATA12
 
|-
 
|-
−
| rowspan=6|188||rowspan=6|V23||rowspan=6|ENET_MDIO||1||enet||MDIO||rowspan=6|3.3V
+
|GPIO5_IO06
 
|-
 
|-
−
|2||esai1||SCKR
+
|rowspan=3|192 ||rowspan=3|ENET_TX_EN ||rowspan=3| V21 ||ENET_TX_EN  ||rowspan=3|3.3V
 
|-
 
|-
−
|3||sdma||DEBUG_BUS_DEVICE[3]
+
|ESAI_TX3_RX2
 
|-
 
|-
−
|4||enet||1588_EVENT1_OUT
+
|GPIO1_IO28
 
|-
 
|-
−
|5||gpio1||GPIO[22]
+
|rowspan=5|193 ||rowspan=5|DISP0_DAT5 ||rowspan=5| R25 ||IPU1_DISP0_DATA05 ||rowspan=5|3.3V
 
|-
 
|-
−
|6||spdif||PLOCK
+
|DISP0_DATA05
 
|-
 
|-
−
| rowspan=5|190||rowspan=5|U21||rowspan=5|ENET_CRS_DV||1||enet||RX_EN||rowspan=5|3.3V
+
|ECSPI3_SS2
 
|-
 
|-
−
|2||esai1||SCKT
+
|AUD6_RXFS
 
|-
 
|-
−
|3||spdif||SPDIF_EXTCLK
+
|GPIO4_IO26
 
|-
 
|-
−
|5||gpio1||GPIO[25]
+
|rowspan=5|194 ||rowspan=5|ENET_TXD1 ||rowspan=5| W20 ||MLB_CLK  ||rowspan=5|3.3V
 
|-
 
|-
−
|6||phy||TDO
+
|ENET_TX_DATA1
 
|-
 
|-
−
| rowspan=4|192||rowspan=4|V21||rowspan=4|ENET_TX_EN||1||enet||TX_EN||rowspan=4|3.3V
+
|ESAI_TX2_RX3
 
|-
 
|-
−
|2||esai1||TX3_RX2
+
|ENET_1588_EVENT0_IN
 
|-
 
|-
−
|5||gpio1||GPIO[28]
+
|GPIO1_IO29
 
|-
 
|-
−
|6||sata_phy||TDI
+
|rowspan=4|195 ||rowspan=4|DISP0_DAT7 ||rowspan=4| R24 ||IPU1_DISP0_DATA07  ||rowspan=4|3.3V
 
|-
 
|-
−
| rowspan=6|194||rowspan=6|W20||rowspan=6|ENET_TXD1||0||mlb||MLBCLK||rowspan=6|3.3V
+
|IPU2_DISP0_DATA07
 
|-
 
|-
−
|1||enet||TDATA[1]
+
|ECSPI3_RDY
 
|-
 
|-
−
|2||esai1||TX2_RX3
+
|GPIO4_IO28
 
|-
 
|-
−
|4||enet||1588_EVENT0_IN
+
|rowspan=3|196 ||rowspan=3|ENET_RXD0 ||rowspan=3| W21 ||ENET_TX_DATA0  ||rowspan=3|3.3V
 
|-
 
|-
−
|5||gpio1||GPIO[29]
+
|ESAI_TX4_RX1
 
|-
 
|-
−
|6||sata_phy||TDO
+
|GPIO1_IO30
 
|-
 
|-
−
| rowspan=6|196||rowspan=6|W21||rowspan=6|ENET_RXD0||0||osc32k||32K_OUT||rowspan=6|3.3V
+
|rowspan=4|197 ||rowspan=4|DISP0_DAT0 ||rowspan=4| P24 ||IPU1_DISP0_DATA00  ||rowspan=4|3.3V
 
|-
 
|-
−
|1||enet||RDATA[0]
+
|IPU2_DISP0_DATA00
 
|-
 
|-
−
|2||esai1||HCKT
+
|ECSPI3_SCLK
 
|-
 
|-
−
|3||spdif||OUT1
+
|GPIO4_IO21
 
|-
 
|-
−
|5||gpio1||GPIO[27]
+
|rowspan=5|198 ||rowspan=5|ENET_MDC||rowspan=5| V20 ||MLB_DATA  ||rowspan=5|3.3V
 
|-
 
|-
−
|6||phy||TMS
+
|ENET_MDC
 
|-
 
|-
−
| rowspan=6|198||rowspan=6|V20||rowspan=6|ENET_MDC||0||mlb||MLBDAT||rowspan=6|3.3V
+
|ESAI_TX5_RX0
 
|-
 
|-
−
|1||enet||MDC
+
|ENET_1588_EVENT1_IN
 
|-
 
|-
−
|2||esai1||TX5_RX0
+
|GPIO1_IO31
 
|-
 
|-
−
|4||enet||1588_EVENT1_IN
+
|rowspan=4|199 ||rowspan=4|DISP0_HSYNCH ||rowspan=4| N25 ||IPU1_DI0_PIN02  ||rowspan=4|3.3V
 
|-
 
|-
−
|5||gpio1||GPIO[31]
+
|IPU2_DI0_PIN02
 
|-
 
|-
−
|6||sata_phy||TMS
+
|AUD6_TXD
 
|-
 
|-
−
| rowspan=4|200||rowspan=4|U20||rowspan=4|ENET_TXD0||0||enet||TDATA[0]||rowspan=4|3.3V
+
|GPIO4_IO18
 
|-
 
|-
−
|1||esai1||TX4_RX1
+
|rowspan=3|200 ||rowspan=3|ENET_TXD0 ||rowspan=3| U20 ||ENET_TX_DATA0  ||rowspan=3|3.3V
 
|-
 
|-
−
|5||gpio1||GPIO[30]
+
|ESAI_TX4_RX1
 
|-
 
|-
−
|6||sata_phy||TCK
+
|GPIO1_IO30
 
|}
 
|}
  

2018年6月4日 (一) 19:13的版本

= MY-IMX6-CB200视图 =

正面(front view)

Myimx6 cb200 1.0.0.1.png

尺寸(size)

Myimx6 cb200 3.5.0.1.png

= MY-IMX6-CB200参数(MY-IMX6-CB200 parameter) =

硬件配置(hardware configuration)

核心板主型号
(core board main model) 		CPU 内存容量
(memory capacity) 		存储容量
(storage capacity) 		启动方式
(boot mode) 		烧录方式
(burning mode) 		其它
(other)
MY-IMX6-CB200 <thead> </thead> <tbody> </tbody>
i.MX 6QP 1G / 2G eMMC: 4G ~ 64G SPI Flash 二位拨码
(two bit dialing)		 标配：内存1G，存储4G
(standard configuration：memory 1G，storage 4G)
i.MX 6Q 1G / 2G eMMC: 4G ~ 64G SPI Flash 二位拨码
(two bit dialing)		 标配：内存1G，存储4G
(standard configuration：memory 1G，storage 4G)
-
i.MX 6U 1G eMMC: 4G ~ 64G SPI Flash 二位拨码
(two bit dialing)		 标配：内存1G，存储4G
(standard configuration：memory 1G，storage 4G)
-
i.MX 6S 512M / 1G eMMC: 4G ~ 64G SPI Flash 二位拨码
(two bit dialing)		 标配：内存512M，存储4G
(standard configuration：memory 512M，storage 4G)
-
colspan=7
-
rowspan=3 MY-IMX6-CB314
i.MX 6QP 1G / 2G eMMC: 4G ~ 64G SPI Flash 二位拨码
(two bit dialing)		 标配：内存1G，存储4G
(standard configuration：memory 1G，storage 4G)
-
i.MX 6Q 1G / 2G eMMC: 4G ~ 64G SPI Flash 二位拨码
(two bit dialing)		 标配：内存1G，存储4G
(standard configuration：memory 1G，storage 4G)
-
i.MX 6U 1G eMMC: 4G ~ 64G SPI Flash 二位拨码
(two bit dialing)		 标配：内存1G，存储4G
(standard configuration：memory 1G，storage 4G)
-
colspan=7
-
rowspan=2 MY-IMX6-CB336
i.MX 6QP 1G / 2G eMMC: 4G ~ 64G SPI Flash 二位拨码
(two bit dialing)		 标配：内存1G，存储4G
(standard configuration：memory 1G，storage 4G)
-
i.MX 6Q 1G / 2G eMMC: 4G ~ 64G SPI Flash 二位拨码
(two bit dialing)		 标配：内存1G，存储4G
(standard configuration：memory 1G，storage 4G)
-
colspan=7
-
colspan=7 说明：以上系列核心板均可供应 汽车级/工业控制级/消费电子级 规格。标配为 消费电子级。
(instruction：the series of core boards mentioned above can be offered in grades of automotive/industrial control/consumer electronic 。standard configuration is consumer electronic。)
}

温度范围(temperature range)

工作环境温度(working temperature)

  • 扩展消费级：

expansion consumer：

       -20°C ~ 85°C
  • 工业级：

industrial：

       -40°C ~ 85°C
  • 汽车级：

automotive：

       -40°C ~ 100°C

存储温度(storage temperature)

-60°C ~ 125°C

型号命令规则(model command rule)

Myimx6 name.png

型号举例(model example)

  • MY-IMX6-CB200-6Q5E-1024M-4G
   　　CPU：MCIMX6Q5E

   　　内存大小：1024MB

　　　　memory size：1024MB

   　　eMMC大小：4G

　　　　eMMC size：4G

  • MY-IMX6-CB200-6S5D-512M-4G
   　　CPU：MCIMX6S5D

   　　内存大小：512MB

　　　　memory size：512MB

   　　eMMC大小：4G

　　　　eMMC size：4G

操作系统支持(operating system support)

操作系统及版本
(operating system & version)		 MY-IMX6-EK200 MY-IMX6-EK314 MY-IMX6-EK336 MY-IMX6-EK140
Linux <thead> </thead> <tbody> </tbody>
Linux-3.0.35 YES YES - -
Linux-3.14.52 YES YES YES YES
-
rowspan=2 Android
Android 4.2.2 YES - - -
-
Android 4.4.2 YES YES - -
-
rowspan=2 QT
QT-4.8.5 YES YES - YES
-
QT-5.5.0 YES YES YES -
-
rowspan=2 Ubuntu
Ubuntu 11.10 YES YES - -
-
Ubuntu 12.04 YES YES - -
}

硬件接口(hardware interface)

显示模块
(display module) 		HDMI
 1路
(1 way)
<thead> </thead> <tbody> </tbody>
1.4 port
LVDS
 2路
(2 way) <thead> </thead> <tbody> </tbody>
8bit模式up to 165 Mpixels/s
(8bit model up to 165 Mpixels/s)
RGB
 1路
(1 way)
<thead> </thead> <tbody> </tbody>
24bit模式
(24bit model)
rowspan=2|摄像头
(rowspan=2|camera)
CSI
1路
(1 way)
8bit模式
(8bit model)
-
Mipi
 1路
(1 way)
<thead> </thead> <tbody> </tbody>
2 Lanes
rowspan=2|以太网摄像头
(ethernet camera)
RMII
1路
(1 way)
100M
-
USB转以太网摄像头
(USB to ethernet camera) 		1路
(1 way)
<thead> </thead> <tbody> </tbody>
100M
音频
(audio)
I2S/SSI/AC97
1路
(1 way)
up to 1.4 Mbps
-
PCI Express
PCI Express
1路
(1 way)
Gen 2.0
-
rowspan=2|存储
(storage)
SD/MMC卡
(SD/MMC card)
2路
(2 way)
4/8bit
-
SATA
 1路
(1 way)
<thead> </thead> <tbody> </tbody>
SATA II, 3.0 Gbps
rowspan=2|USB
USBOTG
1路
(1 way)
480M高速
(480M high speed)
-
USBHOST
 1路
(1 way)
<thead> </thead> <tbody> </tbody>
480M高速
(480M high speed)
CSPI
CSPI
2路
(2 way)
高速
(high speed)
-
UART
UART
5
up to 4.0 Mbps
-
CAN
CAN
2路
(2 way)
1 Mbps each
-
PWM
PWM
1路
(1 way)
可选配置出4路
(cofiguration of 4 way is optional)
-
I2C
I2C
3路
(3 way)
supporting 400 kbps
-
IO扩展
(IO expansion)
多路
(multiple way)
21路
(21 way)
其它管脚可配置为IO
(other pins can be configured as IO)
-
Watchdog
看门狗
(watch dog)
1路
(1 way)
CPU内部的看门狗
(watchdog inside CPU)
}

供电电源(power supply)

5V输入

默认显示选择(defaulted display selection)

LVDS0

LVDS0 7寸 TFT液晶显示（24bit LVDS接口）
LVDS0 7寸 TFT crystal liquid display（24bit LVDS port）
分辨率1024X600@60Hz
resolution 1024X600@60Hz
白色背光
white backlight
电容触摸
capacitor touch

LVDS1

LVDS1 7寸 TFT液晶显示（24bit LVDS接口）
LVDS1 7-inch TFT crystal liquid display（24bit LVDS port）
分辨率1024X600@60Hz
resolution 1024X600@60Hz
白色背光
white backlight
电容触摸
capacitor touch

RGB

7寸 TFT液晶显示（24bit RGB接口）
7-inch TFT crystal liquid display（24bit RGB port）
分辨率800X480@60Hz
resolution 800X480@60Hz
白色背光
white backlight
电容触摸
capacitor touch

HDMI

HDMI输出 （24bit HDMI接口）
HDMI-output （24bit HDMI port）
1920X1080@60Hz 兼容16/18/24bpp
compatible

管脚定义(definition of pin)

<thead> </thead> <tbody> </tbody>
1 rowspan=5 GND rowspan=5 colspan=2 POWER rowspan=5 5V_IN 2
3 4
-
5 6
-
7 8
-
9 10
-
11 NANDF_CS0 rowspan=7 GPIO rowspan=4 POWER rowspan=4 3V_OUT ||12
-
13 NANDF_CS1 14
-
15 NANDF_CS2 16
-
17 SD1_DAT0 18
-
19 SD3_RST rowspan=3 GPIO GPIO_4 20
-
21 KEY_COL2 EIM_BCLK 22
-
23 EIM_D20 CSI0_DATA_EN 24
-
25 CSPI2_CS0 rowspan=6 CSPI2 rowspan=4 UART2 UART2_CTS |26
-
27 CSPI2_RDY UART2_RTS 28
-
29 CSPI2_MOSI UART2_TXD 30
-
31 CSPI2_CLK UART2_RXD 32
-
33 CSPI2_CS1 rowspan=4 UART3 UART3_CTS 34
-
35 CSPI2_MISO UART3_RTS 36
-
37 MX6_ONOFF ON/OFF UART3_TXD 38
-
39 nRESET nRESET IN UART3_RXD 40
-
41 CSPI1_CS0 rowspan=5 CSPI1 rowspan=6 SD2 SD2_DATA2 |42
-
43 CSPI1_MISO SD2_DATA0 44
-
45 CSPI1_MOSI SD2_CLK 46
-
47 CSPI1_CLK SD2_DATA3 48
-
49 CSPI1_RDY SD2_CMD 50
-
51 GND POWER SD2_DATA1 52
-
53 SD3_DATA3 rowspan=6 SD3 rowspan=4 SATA SATA_RXP |54
-
55 SD3_DATA2 SATA_RXN 56
-
57 SD3_CMD SATA_TXN 58
-
59 SD3_CLK SATA_TXP 60
-
61 SD3_DATA1 rowspan=6 USBOTG USB_OTG_OC 62
-
63 SD3_DATA0 USB_OTG_PWR_EN 64
-
65 GND POWER USB_OTG_DN 66
-
67 USB_H1_PWR_EN rowspan=5 USBHOST USB_OTG_DP 68
-
69 USB_HOST_DN USB_OTG_VBUS 70
-
71 USB_HOST_DP USB_OTG_ID 72
-
73 USB_H1_OC rowspan=6 MINI_PCIE PCIE_RXP 74
-
75 USB_H1_VBUS PCIE_RXM 76
-
77 CSI_D1M rowspan=6 MIPI_CSI PCIE_TXP 78
-
79 CSI_D1P PCIE_TXM 80
-
81 CSI_D0M CLK1_P 82
-
83 CSI_D0P CLK1_N 84
-
85 CSI_CLK0M rowspan=10 HDMI HDMI_D2P 86
-
87 CSI_CLK0P HDMI_D2M 88
-
89 UART1_RX rowspan=2 UART1 HDMI_CEC_IN 90
-
91 UART1_TX HDMI_HPD 92
-
93 GND POWER HDMI_D1P 94
-
95 CSI0_DAT17 rowspan=11 CIS HDMI_D1M 96
-
97 CSI0_DAT16 HDMI_CLKP 98
-
99 CSI0_DAT14 HDMI_CLKM 100
-
101 CSI0_DAT19 HDMI_D0P 102
-
103 CSI0_DAT18 HDMI_D0M 104
-
105 CSI0_DAT13 rowspan=2 I2C1 I2C1_SCL 106
-
107 CSI0_DAT12 I2C1_SDA 108
-
109 CSI0_VSYNCH rowspan=4 AUDIO AUD3_TXC 110
-
111 CSI0_PIXCLK AUD3_TXD 112
-
113 CSI0_HSYNCH AUD3_RXD 114
-
115 CSI0_DAT15 AUD3_TXFS 116
-
117 CAN1_TX rowspan=2 CAN1 rowspan=2 I2C3 I2C3_SCL |118
-
119 CAN1_RX I2C3_SDA 120
-
121 UART4_TXD rowspan=2 UART4 rowspan=2 CAN2 CAN2_TX |122
-
123 UART4_RXD CAN2_RX 124
-
125 UART5_RXD rowspan=2 UART5 CLKOUT GPIO_0_CLKO 126
-
127 UART5_TXD POWER GND 128
-
129 LVDS0_TX2_P rowspan=10 LVDS0 rowspan=10 LVDS1 LVDS1_TX1_N |130
-
131 LVDS0_TX2_N LVDS1_TX1_P 132
-
133 LVDS0_TX0_N LVDS1_TX0_P 134
-
135 LVDS0_TX0_P LVDS1_TX0_N 136
-
137 LVDS0_TX3_N LVDS1_TX3_N 138
-
139 LVDS0_TX3_P LVDS1_TX3_P 140
-
141 LVDS0_CLK_N LVDS1_TX2_P 142
-
143 LVDS0_CLK_P LVDS1_TX2_N 144
-
145 LVDS0_TX1_N LVDS1_CLK_N 146
-
147 LVDS0_TX1_P LVDS1_CLK_P 148
-
149 GND POWER GPIO NANDF_ALE 150
-
151 SD1_DAT1 rowspan=3 colspan=2 GPIO NANDF_CLE 152
-
153 SD1_DAT2 NANDF_WP_B 154
-
155 NANDF_CS3 SD1_CLK 156
-
157 DISP0_DAT16 rowspan=22 LCD rowspan=2 I2C2 I2C2_SCL |158
-
159 DISP0_DAT23 I2C2_SDA 160
-
161 DISP0_DAT11 rowspan=7 LCD DISP0_DAT19 162
-
163 DISP0_DAT15 DISP0_DAT20 164
-
165 DISP0_DAT13 DISP0_DAT6 166
-
167 DISP0_DAT8 DISP0_DAT21 168
-
169 DISP0_DAT3 DISP0_DAT2 170
-
171 DISP0_DAT1 DISP0_DAT10 172
-
173 DISP0_DRDY DISP0_DAT4 174
-
175 DISP0_VSYNCH POWER GND 176
-
177 DISP0_CONTRAST rowspan=12 FEC ENET_REF_CLK 178
-
179 DISP0_CLK ENET_nINT 180
-
181 DISP0_DAT18 ENET_RXD1 182
-
183 DISP0_DAT22 ENET_RX_ER 184
-
185 DISP0_DAT14 ENET_nRST 186
-
187 DISP0_DAT17 ENET_MDIO 188
-
189 DISP0_DAT9 ENET_CRS_DV 190
-
191 DISP0_DAT12 ENET_TX_EN 192
-
193 DISP0_DAT5 ENET_TXD1 194
-
195 DISP0_DAT7 ENET_RXD0 196
-
197 DISP0_DAT0 ENET_MDC 198
-
199 DISP0_HSYNCH ENET_TXD0 200
}

管脚定义&详细功能说明(Pin definition & detailed functional description)

Pin NO. Pin Name CPU Ball Name
 功能描述
(functional description) 		管脚电压
(Pin voltage)
<thead> </thead> <tbody> </tbody>
1 rowspan=5 GND rowspan=5 --- rowspan=5 --- rowspan=5 ---
3
-
5
-
7
-
9
-
2 rowspan=5 GND rowspan=5 --- rowspan=5 --- rowspan=5 ---
-
4
-
6
-
8
-
10
-
rowspan=2 11 rowspan=2 NANDF_CS0 rowspan=2 F15 NAND_CE0_B rowspan=2 3.3V
-
GPIO6_IO11
-
12 rowspan=4 3P3V rowspan=4 --- rowspan=4 --- rowspan=4 3.3V(output)
-
14
-
16
-
18
-
rowspan=4 13 rowspan=4 NANDF_CS1 rowspan=4 C16 NAND_CE1_B rowspan=4 3.3V
-
SD4_VSELECT
-
SD3_VSELECT
-
GPIO6_IO14
-
rowspan=7 15 rowspan=7 NANDF_CS2 rowspan=7 A17 NAND_CE2_B rowspan=7 3.3V
-
IPU1_SISG0
-
ESAI_TX0
-
EIM_CRE
-
CCM_CLKO2
-
GPIO6_IO15
-
IPU2_SISG0
-
rowspan=4 17 rowspan=4 SD1_DAT0/CSI0_PWN rowspan=4 A21 SD1_DATA0 rowspan=4 3.3V
-
ECSPI5_MISO
-
GPT_CAPTURE1
-
GPIO1_IO16
-
rowspan=3 19 rowspan=3 SD3_RST/SD3_WP rowspan=3 D15 SD3_RESET rowspan=3 3.3V
-
UART3_RTS_B
-
GPIO7_IO08
-
rowspan=4 20 rowspan=4 GPIO_4/SLEEP WAKE rowspan=4 R6 ESAI_TX_HF_CLK rowspan=4 3.3V
-
KEY_COL7
-
GPIO1_IO04
-
SD2_CD_B
-
rowspan=7 21 rowspan=7 KEY_COL2/SD3_CD_B rowspan=7 W6 ECSPI1_SS1 rowspan=7 3.3V
-
ENET_RX_DATA2
-
FLEXCAN1_TX
-
KEY_COL2
-
ENET_MDC
-
GPIO4_IO10
-
USB_H1_PWR_CTL_WAKE
-
rowspan=3 22 rowspan=3 EIM_BCLK/VOL+ rowspan=3 N22 EIM_BCLK rowspan=3 3.3V
-
IPU1_DI1_PIN16
-
GPIO6_IO31
-
rowspan=7 23 rowspan=7 EIM_D20 rowspan=7 G20 EIM_DATA20 rowspan=7 3.3V
-
ECSPI4_SS0
-
IPU1_DI0_PIN16
-
IPU2_CSI1_DATA15
-
UART1_RTS_B
-
GPIO3_IO20
-
EPIT2_OUT
-
rowspan=4 24 rowspan=4 CSI0_DATA_EN/VOL- rowspan=4 P3 IPU1_CSI0_DATA_EN rowspan=4 2.5V
-
EIM_DATA00
-
GPIO5_IO20
-
ARM_TRACE_CLK
-
rowspan=5 25 rowspan=5 CSPI2_CS0 rowspan=5 K20 EIM_RW rowspan=5 3.3V
-
IPU1_DI1_PIN08
-
ECSPI2_SS0
-
GPIO2_IO26
-
SRC_BOOT_CFG29
-
rowspan=8 26 rowspan=8 UART2_CTS rowspan=8 G23 EIM_DATA28 rowspan=8 3.3V
-
I2C1_SDA
-
ECSPI4_MOSI
-
IPU2_CSI1_DATA12
-
UART2_CTS_B
-
GPIO3_IO28
-
IPU1_EXT_TRIG
-
IPU1_DI0_PIN13
-
rowspan=7 27 rowspan=7 CSPI2_RDY rowspan=7 H19 EIM_ADDR25 rowspan=7 3.3V
-
ECSPI4_SS1
-
ECSPI2_RDY
-
IPU1_DI1_PIN12
-
IPU1_DI0_D1_CS
-
GPIO5_IO02
-
HDMI_TX_CEC_LINE
-
rowspan=7 28 rowspan=7 UART2_RTS rowspan=7 J19 EIM_DATA29 rowspan=7 3.3V
-
IPU1_DI1_PIN15
-
ECSPI4_SS0
-
UART2_RTS_B
-
GPIO3_IO29
-
IPU2_CSI1_VSYNC
-
IPU1_DI0_PIN14
-
rowspan=4 29 rowspan=4 CSPI2_MOSI rowspan=4 J23 EIM_CS1_B rowspan=4 3.3V
-
IPU1_DI1_PIN06
-
ECSPI2_MOSI
-
GPIO2_IO24
-
rowspan=8 30 rowspan=8 UART2_TXD rowspan=8 E24 EIM_DATA26 rowspan=8 3.3V
-
IPU1_DI1_PIN11
-
IPU1_CSI0_DATA01
-
IPU2_CSI1_DATA14
-
UART2_TX_DATA
-
UART2_TX_DATA
-
IPU1_SISG2
-
IPU1_DISP1_DATA22
-
rowspan=4 31 rowspan=4 CSPI2_CLK rowspan=4 H24 EIM_CS0_B rowspan=4 3.3V
-
IPU1_DI1_PIN05
-
ECSPI2_SCLK
-
GPIO2_IO23
-
rowspan=8 32 rowspan=8 UART2_RXD rowspan=8 E25 EIM_DATA27 rowspan=8 3.3V
-
IPU1_DI1_PIN13
-
IPU1_CSI0_DATA00
-
IPU2_CSI1_DATA13
-
UART2_RX_DATA
-
GPIO3_IO27
-
IPU1_SISG3
-
IPU1_DISP1_DATA23
-
rowspan=5 33 rowspan=5 CSPI2_CS1 rowspan=5 K22 EIM_LBA_B rowspan=5 3.3V
-
IPU1_DI1_PIN17
-
ECSPI2_SS1
-
GPIO2_IO27
-
SRC_BOOT_CFG26
-
rowspan=8 34 rowspan=8 UART3_CTS rowspan=8 D25 EIM_DATA23 rowspan=8 3.3V
-
IPU1_DI0_D0_CS
-
UART3_CTS_B
-
UART1_DCD_B
-
IPU2_CSI1_DATA_EN
-
GPIO3_IO23
-
IPU1_DI1_PIN02
-
IPU1_DI1_PIN14
-
rowspan=4 35 rowspan=4 CSPI2_MISO rowspan=4 J24 EIM_OE_B rowspan=4 3.3V
-
IPU1_DI1_PIN07
-
ECSPI2_MISO
-
GPIO2_IO25
-
rowspan=7 36 rowspan=7 UART3_RTS rowspan=7 H21 EIM_DATA31 rowspan=7 3.3V
-
IPU1_DISP1_DATA20
-
IPU1_DI0_PIN12
-
IPU1_CSI0_DATA02
-
UART3_RTS_B
-
GPIO3_IO31
-
USB_H1_PWR
-
37 BOOT_MODE0 D12 SRC_BOOT_MODE0 3.3V
-
rowspan=8 38 rowspan=8 UART3_TXD rowspan=8 F22 EIM_DATA24 rowspan=8 3.3V
-
ECSPI4_SS2
-
UART3_TX_DATA
-
ECSPI1_SS2
-
ECSPI2_SS2
-
GPIO3_IO24
-
AUD5_RXFS
-
UART1_DTR_
-
39 NRESET --- --- 3.3V
-
rowspan=8 40 rowspan=8 UART3_RXD rowspan=8 G22 EIM_DATA25 rowspan=8 3.3V
-
ECSPI4_SS3
-
UART3_RX_DA
-
ECSPI1_SS3
-
ECSPI2_SS3
-
GPIO3_IO25
-
AUD5_RXC
-
UART1_DSR_B
-
rowspan=7 41 rowspan=7 CSPI1_CS0 rowspan=7 E22 EIM_EB2_B rowspan=7 3.3V
-
ECSPI1_SS0
-
IPU2_CSI1_DATA19
-
HDMI_TX_DDC_SCL
-
GPIO2_IO30
-
I2C2_SCL
-
SRC_BOOT_CFG30
-
rowspan=6 42 rowspan=6 SD2_DATA2 rowspan=6 A23 EIM_EB2_B rowspan=6 3.3V
-
ECSPI5_SS1
-
EIM_CS3_B
-
AUD4_TXD
-
KEY_ROW6
-
GPIO1_IO13
-
rowspan=7 43 rowspan=7 CSPI1_MISO rowspan=7 F21 EIM_DATA17 rowspan=7 3.3V
-
ECSPI1_MISO
-
IPU1_DI0_PIN06
-
IPU2_CSI1_PIXCLK
-
DCIC1_OUT
-
GPIO3_IO17
-
I2C3_SCL
-
rowspan=6 44 rowspan=6 SD2_DATA0 rowspan=6 A22 SD2_DATA0 rowspan=6 3.3V
-
ECSPI5_MISO
-
AUD4_RXD
-
KEY_ROW7
-
GPIO1_IO15
-
DCIC2_OUT
-
rowspan=7 45 rowspan=7 CSPI1_MOSI rowspan=7 D24 EIM_DATA18 rowspan=7 3.3V
-
ECSPI1_MOSI
-
IPU1_DI0_PIN07
-
IPU2_CSI1_DATA17
-
IPU1_DI1_D0_CS
-
GPIO3_IO18
-
I2C3_SDA
-
rowspan=5 46 rowspan=5 SD2_CLK rowspan=5 C21 SD2_CLK rowspan=5 3.3V
-
ECSPI5_SCLK
-
KEY_COL5
-
AUD4_RXFS
-
GPIO1_IO10
-
rowspan=7 47 rowspan=7 CSPI1_CLK rowspan=7 C25 EIM_DATA16 rowspan=7 3.3V
-
ECSPI1_SCLK
-
IPU1_DI0_PIN05
-
IPU2_CSI1_DATA18
-
HDMI_TX_DDC_SDA
-
GPIO3_IO16
-
I2C2_SDA
-
rowspan=5 48 rowspan=5 SD2_DATA3 rowspan=5 B22 SD2_DATA3 rowspan=5 3.3V
-
ECSPI5_SS3
-
KEY_COL6
-
AUD4_TXC
-
GPIO1_IO12
-
rowspan=7 49 rowspan=7 CSPI1_RDY rowspan=7 P5 KEY_COL5 rowspan=7 3.3V
-
ENET_1588_EVENT0_OUT
-
SPDIF_OUT
-
CCM_CLKO1
-
ECSPI1_RDY
-
GPIO4_IO05
-
ENET_TX_ER
-
rowspan=5 50 rowspan=5 SD2_CMD rowspan=5 F19 SD2_CMD rowspan=5 3.3V
-
ECSPI5_MOSI
-
KEY_ROW5
-
AUD4_RXC
-
GPIO1_IO11
-
51 GND --- --- ---
-
rowspan=6 52 rowspan=6 SD2_DATA1 rowspan=6 E20 SD2_DATA1 rowspan=6 3.3V
-
ECSPI5_SS0
-
EIM_CS2_B
-
AUD4_TXFS
-
KEY_COL7
-
GPIO1_IO14
-
rowspan=3 53 rowspan=3 SD3_DATA3 rowspan=3 B15 SD3_DATA3 rowspan=3 3.3V
-
UART3_CTS_B
-
GPIO7_IO07
-
54 SATA_RXP B14 SATA_PHY_RX_P 2.5V
-
rowspan=2 55 rowspan=2 SD3_DATA2 rowspan=2 A15 SD3_DATA2 rowspan=2 3.3V
-
GPIO7_IO06
-
56 SATA_RXN B13 SATA_PHY_RX_N 2.5V
-
rowspan=4 57 rowspan=4 SD3_CMD rowspan=4 B13 SD3_CMD rowspan=4 3.3V
-
UART2_CTS_B
-
FLEXCAN1_TX
-
GPIO7_IO02
-
58 SATA_TXN B12 SATA_PHY_TX_N 2.5V
-
rowspan=4 59 rowspan=4 SD3_CLK rowspan=4 D14 SD3_CLK rowspan=4 3.3V
-
UART2_RTS_B
-
FLEXCAN1_RX
-
GPIO7_IO03
-
60 SATA_TXP A12 SATA_PHY_TX_P 2.5V
-
rowspan=4 61 rowspan=4 SD3_DATA1 rowspan=4 F14 SD3_DATA1 rowspan=4 3.3V
-
UART1_RTS_B
-
FLEXCAN2_RX
-
GPIO7_IO05
-
rowspan=8 62 rowspan=8 USB_OTG_OC rowspan=8 H20 EIM_DATA21 rowspan=8 3.3V
-
ECSPI4_SCLK
-
IPU1_DI0_PIN17
-
IPU2_CSI1_DATA11
-
USB_OTG_OC
-
GPIO3_IO21
-
I2C1_SCL
-
SPDIF_IN
-
rowspan=4 63 rowspan=4 SD3_DATA0 rowspan=4 E14 SD3_DATA0 rowspan=4 3.3V
-
UART1_CTS_B
-
FLEXCAN2_TX
-
GPIO7_IO04
-
rowspan=7 64 rowspan=7 USB_OTG_PWR_EN rowspan=7 E23 EIM_DATA22 rowspan=7 3.3V
-
ECSPI4_MISO
-
IPU1_DI0_PIN01
-
IPU2_CSI1_DATA10
-
USB_OTG_PWR
-
GPIO3_IO22
-
SPDIF_OUT
-
65 GND --- --- ---
-
66 USB_OTG_DN B6 USB_OTG_DN 2.5V
-
rowspan=3 67 rowspan=3 USB_H1_PWR_EN rowspan=3 C13 SD3_DATA5 rowspan=3 3.3V
-
UART2_TX_DATA
-
GPIO7_IO00
-
68 USB_OTG_DP A6 USB_OTG_DP 2.5V
-
69 USB_HOST_DN F10 USB_H1_DN 2.5V
-
70 USB_OTG_VBUS E9 USB_OTG_VBUS 5V
-
71 USB_HOST_DP E10 USB_H1_DP 2.5V
-
rowspan=7 72 rowspan=7 USB_OTG_ID rowspan=7 T4 ESAI_RX_CLK rowspan=7 3.3V
-
WDOG2_B
-
KEY_ROW5
-
USB_OTG_ID
-
PWM2_OUT
-
GPIO1_IO01
-
SD1_CD_B
-
rowspan=7 73 rowspan=7 USB_H1_OC rowspan=7 J20 EIM_DATA30 rowspan=7 3.3V
-
IPU1_DISP1_DATA21
-
IPU1_DI0_PIN11
-
IPU1_CSI0_DATA03
-
UART3_CTS_B
-
GPIO3_IO30
-
USB_H1_OC
-
74 PCIE_RXP B2 PCIE_RX_P 2.5V
-
75 USB_H1_VBUS D10 USB_H1_VBUS 5V
-
76 PCIE_RXM B1 PCIE_RX_N rowspan=13 2.5V
-
77 CSI_D1M D1 CSI_DATA1_N
-
78 PCIE_TXP B3 PCIE_TX_P
-
79 CSI_D1P D2 CSI_DATA1_P
-
80 PCIE_TXM A3 PCIE_TX_N
-
81 CSI_D0M E4 CSI_DATA0_N
-
82 CLK1_P D7 XTALOSC_CLK1_P
-
83 CSI_D0P E3 CSI_DATA0_P
-
84 CLK1_N C7 XTALOSC_CLK2_N
-
85 CSI_CLK0M F4 CSI_CLK0_N
-
86 HDMI_D2P K4 HDMI_TX_DATA2_P
-
87 CSI_CLK0P F3 CSI_CLK0_P
-
88 HDMI_D2M K3 HDMI_TX_DATA2_N
-
rowspan=6 89 rowspan=6 UART1_RX rowspan=6 M3 IPU1_CSI0_DATA11 rowspan=6 2.5V
-
AUD3_RXFS
-
ECSPI2_SS0
-
UART1_RX_DATA
-
GPIO5_IO29
-
ARM_TRACE08
-
90 HDMI_CEC_IN W4 HDMI_TX_DDC_CEC 2.5V
-
rowspan=7 91 rowspan=7 UART1_TX rowspan=7 M1 IPU1_CSI0_DATA10 rowspan=7 2.5V
-
AUD3_RXC
-
ECSPI2_MISO
-
UART1_TX_DATA
-
UART1_TX_DATA
-
GPIO5_IO28
-
ARM_TRACE07
-
92 HDMI_HPD K1 HDMI_TX_HPD 2.5V
-
93 GND --- --- ---
-
94 HDMI_H1P J4 HDMI_TX_DATA1_P 2.5V
-
rowspan=5 95 rowspan=5 CSI0_DAT17 rowspan=5 L3 IPU1_CSI0_DATA17 rowspan=5 2.5V
-
EIM_DATA13
-
UART4_CTS_B
-
GPIO6_IO03
-
ARM_TRACE14
-
96 HDMI_D1M J3 HDMI_TX_DATA1_N 2.5V
-
rowspan=5 97 rowspan=5 CSI0_DAT16 rowspan=5 L4 IPU1_CSI0_DATA16 rowspan=5 2.5V
-
EIM_DATA12
-
UART4_RTS_B
-
GPIO6_IO02
-
ARM_TRACE13
-
98 HDMI_CLKP J6 HDMI_TX_CLK_P 2.5V
-
rowspan=5 99 rowspan=5 CSI0_DAT14 rowspan=5 M4 IPU1_CSI0_DATA14 rowspan=5 2.5V
-
EIM_DATA10
-
UART5_TX_DATA
-
GPIO6_IO00
-
ARM_TRACE11
-
100 HDMI_CLKM J5 HDMI_TX_CLK_N 2.5V
-
rowspan=4 101 rowspan=4 CSI0_DAT19 rowspan=4 L6 IPU1_CSI0_DATA19 rowspan=4 2.5V
-
EIM_DATA15
-
UART5_CTS_B
-
GPIO6_IO05
-
102 HDMI_D0P K6 HDMI_TX_DATA0_P 2.5V
-
rowspan=5 103 rowspan=5 CSI0_DATA18 rowspan=5 M6 IPU1_CSI0_DATA18 rowspan=5 2.5V
-
EIM_DATA14
-
UART5_RTS_B
-
GPIO6_IO04
-
ARM_TRACE15
-
104 HDMI_D0M K5 HDMI_TX_DATA0_NP 2.5V
-
rowspan=5 105 rowspan=5 CSI0_DATA13 rowspan=5 L1 IPU1_CSI0_DATA13 rowspan=5 2.5V
-
EIM_DATA09
-
UART4_RX_DATA
-
GPIO5_IO31
-
ARM_TRACE10
-
rowspan=7 106 rowspan=7 I2C1_SCL rowspan=7 N5 IPU1_CSI0_DATA09 rowspan=7 2.5V
-
EIM_DATA07
-
ECSPI2_MOSI
-
KEY_ROW7
-
I2C1_SCL
-
GPIO5_IO27
-
ARM_TRACE06
-
rowspan=5 107 rowspan=5 CSI0_DAT12 rowspan=5 M2 IPU1_CSI0_DATA12 rowspan=5 2.5V
-
EIM_DATA08
-
UART4_TX_DATA
-
GPIO5_IO30
-
ARM_TRACE09
-
rowspan=7 108 rowspan=7 I2C1_SDA rowspan=7 N6 IPU1_CSI0_DATA08 rowspan=7 2.5V
-
EIM_DATA06
-
ECSPI2_SCLK
-
KEY_COL7
-
I2C1_SDA
-
GPIO5_IO26
-
ARM_TRACE05
-
rowspan=4 109 rowspan=4 CSI0_VSYNCH rowspan=4 N2 IPU1_CSI0_VSYNC rowspan=4 2.5V
-
EIM_DATA01
-
GPIO5_IO21
-
ARM_TRACE00
-
rowspan=7 110 rowspan=7 AUD3_TXC rowspan=7 N1 IPU1_CSI0_DATA04 rowspan=7 2.5V
-
EIM_DATA02
-
ECSPI1_SCLK
-
KEY_COL5
-
AUD3_TXC
-
GPIO5_IO22
-
ARM_TRACE01
-
rowspan=3 111 rowspan=3 CSI0_PIXCLK rowspan=3 P1 IPU1_CSI0_PIXCLK rowspan=3 2.5V
-
GPIO5_IO18
-
ARM_EVENTO
-
rowspan=7 112 rowspan=7 AUD3_TXD rowspan=7 P2 IPU1_CSI0_DATA05 rowspan=7 2.5V
-
EIM_DATA03
-
ECSPI1_MOSI
-
KEY_ROW5
-
AUD3_TXD
-
GPIO5_IO23
-
ARM_TRACE02
-
rowspan=4 113 rowspan=4 CSI0_HSYNCH rowspan=4 P4 IPU1_CSI0_HSYNC rowspan=4 2.5V
-
CCM_CLKO1
-
GPIO5_IO19
-
ARM_TRACE_CTL
-
rowspan=7 114 rowspan=7 AUD3_RXD rowspan=7 N3 IPU1_CSI0_DATA07 rowspan=7 2.5V
-
EIM_DATA05
-
ECSPI1_SS0
-
KEY_ROW6
-
AUD3_RXD
-
GPIO5_IO25
-
ARM_TRACE04
-
rowspan=5 115 rowspan=5 CSI0_DAT15 rowspan=5 M5 IPU1_CSI0_DATA15 rowspan=5 2.5V
-
EIM_DATA11
-
UART5_RX_DATA
-
GPIO6_IO01
-
ARM_TRACE12
-
rowspan=7 116 rowspan=7 AUD3_TXFS rowspan=7 N4 IPU1_CSI0_DATA06 rowspan=7 2.5V
-
EIM_DATA04
-
ECSPI1_MISO
-
KEY_COL6
-
AUD3_TXFS
-
GPIO5_IO24
-
ARM_TRACE03
-
rowspan=8 117 rowspan=8 CAN1_TX rowspan=8 R3 ESAI_TX4_RX1 rowspan=8 3.3V
-
ECSPI5_RDY
-
EPIT1_OUT
-
FLEXCAN1_TX
-
UART2_TX_DATA
-
GPIO1_IO07
-
SPDIF_LOCK
-
USB_OTG_HOST_MODE
-
rowspan=7 118 rowspan=7 I2C3_SCL rowspan=7 R7 ESAI_RX_HF_CLK rowspan=7 3.3V
-
I2C3_SCL
-
XTALOSC_REF_CLK_24M
-
CCM_CLKO2
-
GPIO1_IO03
-
USB_H1_OC
-
MLB_CLK
-
rowspan=8 119 rowspan=8 CAN1_RX rowspan=8 R5 ESAI_TX5_RX0 rowspan=8 3.3V
-
XTALOSC_REF_CLK_32K
-
EPIT2_OUT
-
FLEXCAN1_RX
-
UART2_RX_DATA
-
GPIO1_IO08
-
SPDIF_SR_CLK
-
USB_OTG_PWR_CTL_WAKE
-
rowspan=5 120 rowspan=5 I2C3_SDA rowspan=5 T3 ESAI_TX_CLK rowspan=5 3.3V
-
I2C3_SDA
-
GPIO1_IO06
-
SD2_LCTL
-
MLB_SIG
-
rowspan=7 121 rowspan=7 UART4_TXD rowspan=7 W5 ECSPI1_SCLK rowspan=7 3.3V
-
ENET_RX_DATA3
-
AUD5_TXC
-
KEY_COL0
-
UART4_TX_DATA
-
GPIO4_IO06
-
DCIC1_OUT
-
rowspan=6 122 rowspan=6 CAN2_TX rowspan=6 T6 FLEXCAN2_TX rowspan=6 3.3V
-
IPU1_SISG4
-
USB_OTG_OC
-
KEY_COL4
-
UART5_RTS_B
-
GPIO4_IO14
-
rowspan=7 123 rowspan=7 UART4_RXD rowspan=7 V6 ECSPI1_MOSI rowspan=7 3.3V
-
ENET_TX_DATA3
-
AUD5_TXD
-
KEY_ROW0
-
UART4_RX_DATA
-
GPIO4_IO07
-
DCIC2_OUT
-
rowspan=6 124 rowspan=6 CAN2_RX rowspan=6 V5 FLEXCAN2_RX rowspan=6 3.3V
-
IPU1_SISG5
-
USB_OTG_PWR
-
KEY_ROW4
-
UART5_CTS_B
-
GPIO4_IO15
-
rowspan=7 125 rowspan=7 UART5_RXD rowspan=7 U6 ECSPI1_SS0 rowspan=7 3.3V
-
ENET_COL
-
AUD5_RXD
-
KEY_ROW1
-
UART5_RX_DATA
-
GPIO4_IO09
-
SD2_VSELECT
-
rowspan=7 126 rowspan=7 GPIO_0_CLKO rowspan=7 T5 CCM_CLKO1 rowspan=7 3.3V
-
KEY_COL5
-
ASRC_EXT_CLK
-
EPIT1_OUT
-
GPIO1_IO00
-
USB_H1_PWR
-
SNVS_VIO_5
-
rowspan=7 127 rowspan=7 UART5_TXD rowspan=7 U7 ECSPI1_MISO rowspan=7 3.3V
-
ENET_MDIO
-
AUD5_TXFS
-
KEY_COL1
-
UART5_TX_DATA
-
GPIO4_IO08
-
SD1_VSELECT
-
128 GND --- --- ---
-
129 LVDS0_TX2_P V1 LVDS0_DATA2_P rowspan=20 2.5V
-
130 LVDS1_TX1_N AA2 LVDS1_DATA1_N
-
131 LVDS0_TX2_N V2 LVDS0_DATA2_N
-
132 LVDS1_TX1_P AA1 LVDS1_DATA1_P
-
133 LVDS0_TX0_N U2 LVDS0_DATA0_N
-
134 LVDS1_TX0_P Y2 LVDS1_DATA0_P
-
135 LVDS0_TX0_P U1 LVDS0_DATA0_P
-
136 LVDS1_TX0_N Y1 LVDS1_DATA0_N
-
137 LVDS0_TX3_N W2 LVDS0_DATA3_N
-
138 LVDS1_TX3_N AA3 LVDS1_DATA3_N
-
139 LVDS0_TX3_P W1 LVDS0_DATA3_P
-
140 LVDS1_TX3_P AA4 LVDS1_DATA3_P
-
141 LVDS0_CLK_N V4 LVDS0_CLK_N
-
142 LVDS1_TX2_P AB2 LVDS1_DATA2_P
-
143 LVDS0_CLK_P V3 LVDS0_CLK_P
-
144 LVDS1_TX2_N AB1 LVDS1_DATA2_N
-
145 LVDS0_TX1_N U4 LVDS0_DATA1_N
-
146 LVDS1_CLK_N Y3 LVDS1_CLK_N
-
147 LVDS0_TX1_P U3 LVDS0_DATA1_P
-
148 LVDS1_CLK_P Y4 LVDS1_CLK_P
-
149 GND --- --- ---
-
rowspan=3 150 rowspan=3 NANDF_ALE rowspan=3 A16 NAND_ALE rowspan=3 3.3V
-
SD4_RESET
-
GPIO6_IO08
-
rowspan=5 151 rowspan=5 SD1_DAT1/TOUCH_NEINT1 rowspan=5 C20 SD1_DATA1 rowspan=5 3.3V
-
ECSPI5_SS0
-
PWM3_OUT
-
GPT_CAPTURE2
-
GPIO1_IO17
-
rowspan=3 152 rowspan=3 NANDF_CLE rowspan=3 C15 NAND_CLE rowspan=3 3.3V
-
IPU2_SISG4
-
GPIO6_IO07
-
rowspan=7 153 rowspan=7 SD1_DATA2 rowspan=7 E19 SD1_DATA2 rowspan=7 3.3V
-
ECSPI5_SS1
-
GPT_COMPARE2
-
PWM2_OUT
-
WDOG1_B
-
GPIO1_IO19
-
WDOG1_RESET_B_DEB
-
rowspan=3 154 rowspan=3 NANDF_WP_B rowspan=3 E15 NAND_WP_B rowspan=3 3.3V
-
IPU2_SISG5
-
GPIO6_IO09
-
rowspan=6 155 rowspan=6 NANDF_CS3 rowspan=6 D16 NAND_CE3_B rowspan=6 3.3V
-
IPU1_SISG1
-
ESAI_TX1
-
EIM_ADDR26
-
GPIO6_IO16
-
IPU2_SISG1
-
rowspan=5 156 rowspan=5 SD1_CLK rowspan=5 D20 SD1_CLK rowspan=5 3.3V
-
ECSPI5_SCLK
-
XTALOSC_OSC32K_32K_OUT
-
GPT_CLKIN
-
GPIO1_IO20
-
rowspan=6 157 rowspan=6 DISP0_DAT16 rowspan=6 T21 IPU1_DISP0_DATA16 rowspan=6 3.3V
-
IPU2_DISP0_DATA16
-
ECSPI2_MOSI
-
AUD5_TXC
-
SDMA_EXT_EVENT0
-
GPIO5_IO10
-
rowspan=7 158 rowspan=7 I2C2_SCL rowspan=7 U5 ECSPI1_SS1 rowspan=7 3.3V
-
ENET_RX_DATA2
-
FLEXCAN1_TX
-
KEY_COL2
-
ENET_MDC
-
GPIO4_IO10
-
USB_H1_PWR_CTL_WAKE
-
rowspan=5 159 rowspan=5 DISP0_DAT23 rowspan=5 W24 IPU1_DISP0_DATA23 rowspan=5 3.3V
-
IPU2_DISP0_DATA23
-
ECSPI1_SS0
-
AUD4_RXD
-
GPIO5_IO17
-
rowspan=7 160 rowspan=7 I2C2_SDA rowspan=7 T7 XTALOSC_OSC32K_32K_OUT rowspan=7 3.3V
-
ASRC_EXT_CLK
-
HDMI_TX_DDC_SDA
-
KEY_ROW3
-
I2C2_SDA
-
GPIO4_IO13
-
SD1_VSELECT
-
rowspan=3 161 rowspan=3 DISP0_DAT11 rowspan=3 T23 IPU1_DISP0_DATA11 rowspan=3 3.3V
-
IPU2_DISP0_DATA11
-
GPIO5_IO05
-
rowspan=7 162 rowspan=7 DISP0_DAT19 rowspan=7 U23 IPU1_DISP0_DATA19 rowspan=7 3.3V
-
IPU2_DISP0_DATA19
-
ECSPI2_SCLK
-
AUD5_RXD
-
AUD4_RXC
-
GPIO5_IO13
-
EIM_CS3_B
-
rowspan=5 163 rowspan=5 DISP0_DAT15 rowspan=5 T22 IPU1_DISP0_DATA15 rowspan=5 3.3V
-
IPU2_DISP0_DATA15
-
ECSPI1_SS1
-
ECSPI2_SS1
-
GPIO5_IO09
-
rowspan=5 164 rowspan=5 DISP0_DAT20 rowspan=5 U22 IPU1_DISP0_DATA20 rowspan=5 3.3V
-
IPU2_DISP0_DATA20
-
ECSPI1_SCLK
-
AUD4_TXC
-
GPIO5_IO14
-
rowspan=4 165 rowspan=4 DISP0_DAT13 rowspan=4 R20 IPU1_DISP0_DATA13 rowspan=4 3.3V
-
IPU2_DISP0_DATA13
-
AUD5_RXFS
-
GPIO5_IO0
-
rowspan=5 166 rowspan=5 DISP0_DAT6 rowspan=5 R23 IPU1_DISP0_DATA06 rowspan=5 3.3V
-
IPU2_DISP0_DATA06
-
ECSPI3_SS3
-
AUD6_RXC
-
GPIO4_IO27
-
rowspan=5 167 rowspan=5 DISP0_DAT8 rowspan=5 R22 IPU1_DISP0_DATA08 rowspan=5 3.3V
-
IPU2_DISP0_DATA08
-
PWM1_OUT
-
WDOG1_B
-
GPIO4_IO29
-
rowspan=5 168 rowspan=5 DISP0_DAT21 rowspan=5 T20 IPU1_DISP0_DATA21 rowspan=5 3.3V
-
IPU2_DISP0_DATA21
-
ECSPI1_MOSI
-
AUD4_TXD
-
GPIO5_IO15
-
rowspan=4 169 rowspan=4 DISP0_DAT3 rowspan=4 P21 IPU1_DISP0_DATA03 rowspan=4 3.3V
-
IPU2_DISP0_DATA03
-
ECSPI3_SS0
-
GPIO4_IO24
-
rowspan=4 170 rowspan=4 DISP0_DAT2 rowspan=4 P23 IPU1_DISP0_DATA02 rowspan=4 3.3V
-
IPU2_DISP0_DATA02
-
ECSPI3_MISO
-
GPIO4_IO23
-
rowspan=4 171 rowspan=4 DISP0_DAT1 rowspan=4 P22 IPU1_DISP0_DATA01 rowspan=4 3.3V
-
IPU2_DISP0_DATA01
-
ECSPI3_MOSI
-
GPIO4_IO22
-
rowspan=4 172 rowspan=4 DISP0_DAT10 rowspan=4 R21 IPU1_DISP0_DATA00 rowspan=4 3.3V
-
IPU2_DISP0_DATA00
-
ECSPI3_SCLK
-
GPIO4_IO21
-
rowspan=4 173 rowspan=4 DISP0_DRDY rowspan=4 N21 IPU1_DI0_PIN15 rowspan=4 3.3V
-
IPU2_DI0_PIN15
-
AUD6_TXC
-
GPIO4_IO17
-
rowspan=4 174 rowspan=4 DISP0_DAT4 rowspan=4 P20 IPU1_DISP0_DATA04 rowspan=4 3.3V
-
IPU2_DISP0_DATA04
-
ECSPI3_SS1
-
GPIO4_IO25
-
rowspan=4 175 rowspan=4 DISP0_VSYNCH rowspan=4 N20 IPU1_DI0_PIN03 rowspan=4 3.3V
-
IPU2_DI0_PIN03
-
AUD6_TXFS
-
GPIO4_IO19
-
176 GND --- --- ---
-
rowspan=7 177 rowspan=7 DISP0_CONTRAST rowspan=7 F18 SD1_DATA3 rowspan=7 3.3V
-
ECSPI5_SS2
-
GPT_COMPARE3
-
PWM1_OUT
-
WDOG2_B
-
GPIO1_IO21
-
WDOG2_RESET_B_DEB
-
rowspan=4 178 rowspan=4 ENET_REF_CLK rowspan=4 R2 ENET_TX_CLK rowspan=4 3.3V
-
ESAI_RX_FS
-
GPIO1_IO23
-
SPDIF_SR_CLK
-
rowspan=3 179 rowspan=3 DISP0_CLK rowspan=3 N19 IPU1_DI0_DISP_CLK rowspan=3 3.3V
-
IPU2_DI0_DISP_CLK
-
GPIO4_IO16
-
rowspan=7 180 rowspan=7 ENET_NINT rowspan=7 P6 ESAI_TX1 rowspan=7 3.3V
-
ENET_RX_CLK
-
SD3_VSELECT
-
SDMA_EXT_EVENT1
-
ASRC_EXT_CLK
-
GPIO7_IO13
-
SNVS_VIO_5_CTL
-
rowspan=7 181 rowspan=7 DISP0_DAT18 rowspan=7 V25 IPU1_DISP0_DATA18 rowspan=7 3.3V
-
IPU2_DISP0_DATA18
-
ECSPI2_SS0
-
AUD5_TXFS
-
AUD4_RXFS
-
GPIO5_IO12
-
EIM_CS2_B
-
rowspan=5 182 rowspan=5 ENET_RXD1 rowspan=5 W22 MLB_SIG rowspan=5 3.3V
-
ENET_RX_DATA1
-
ESAI_TX_FS
-
ENET_1588_EVENT3_OUT
-
GPIO1_IO26
-
rowspan=5 183 rowspan=5 DISP0_DAT22 rowspan=5 V24 IPU1_DISP0_DATA22 rowspan=5 3.3V
-
IPU2_DISP0_DATA22
-
ECSPI1_MISO
-
AUD4_TXFS
-
GPIO5_IO16
-
rowspan=6 184 rowspan=6 ENET_RX_ER rowspan=6 W23 USB_OTG_ID rowspan=6 3.3V
-
ENET_RX_ER
-
ESAI_RX_HF_CLK
-
SPDIF_IN
-
ENET_1588_EVENT2_OUT
-
GPIO1_IO24
-
rowspan=4 185 rowspan=4 DISP0_DAT14 rowspan=4 U25 IPU1_DISP0_DATA14 rowspan=4 3.3V
-
IPU2_DISP0_DATA14
-
AUD5_RXC
-
GPIO5_IO08
-
rowspan=4 186 rowspan=4 ENET_NRST rowspan=4 V22 ENET_TX_CLK rowspan=4 3.3V
-
ESAI_RX_FS
-
GPIO1_IO23
-
SPDIF_SR_CLK
-
rowspan=6 187 rowspan=6 DISP0_DAT17 rowspan=6 U24 IPU1_DISP0_DATA17 rowspan=6 3.3V
-
IPU2_DISP0_DATA17
-
ECSPI2_MISO
-
AUD5_TXD
-
SDMA_EXT_EVENT1
-
GPIO5_IO11
-
rowspan=5 188 rowspan=5 ENET_MDIO rowspan=5 V23 ENET_MDIO rowspan=5 3.3V
-
ESAI_RX_CLK
-
ENET_1588_EVENT1_OUT
-
GPIO1_IO22
-
SPDIF_LOCK
-
rowspan=5 189 rowspan=5 DISP0_DAT9 rowspan=5 T25 IPU1_DISP0_DATA09 rowspan=5 3.3V
-
IPU2_DISP0_DATA09
-
PWM2_OUT
-
WDOG2_B
-
GPIO4_IO30
-
rowspan=4 190 rowspan=4 ENET_CRS_DV rowspan=4 U21 ENET_RX_EN rowspan=4 3.3V
-
ESAI_TX_CLK
-
SPDIF_EXT_CLK
-
GPIO1_IO25
-
rowspan=3 191 rowspan=3 DISP0_DAT12 rowspan=3 T24 IPU1_DISP0_DATA12 rowspan=3 3.3V
-
IPU2_DISP0_DATA12
-
GPIO5_IO06
-
rowspan=3 192 rowspan=3 ENET_TX_EN rowspan=3 V21 ENET_TX_EN rowspan=3 3.3V
-
ESAI_TX3_RX2
-
GPIO1_IO28
-
rowspan=5 193 rowspan=5 DISP0_DAT5 rowspan=5 R25 IPU1_DISP0_DATA05 rowspan=5 3.3V
-
DISP0_DATA05
-
ECSPI3_SS2
-
AUD6_RXFS
-
GPIO4_IO26
-
rowspan=5 194 rowspan=5 ENET_TXD1 rowspan=5 W20 MLB_CLK rowspan=5 3.3V
-
ENET_TX_DATA1
-
ESAI_TX2_RX3
-
ENET_1588_EVENT0_IN
-
GPIO1_IO29
-
rowspan=4 195 rowspan=4 DISP0_DAT7 rowspan=4 R24 IPU1_DISP0_DATA07 rowspan=4 3.3V
-
IPU2_DISP0_DATA07
-
ECSPI3_RDY
-
GPIO4_IO28
-
rowspan=3 196 rowspan=3 ENET_RXD0 rowspan=3 W21 ENET_TX_DATA0 rowspan=3 3.3V
-
ESAI_TX4_RX1
-
GPIO1_IO30
-
rowspan=4 197 rowspan=4 DISP0_DAT0 rowspan=4 P24 IPU1_DISP0_DATA00 rowspan=4 3.3V
-
IPU2_DISP0_DATA00
-
ECSPI3_SCLK
-
GPIO4_IO21
-
rowspan=5 198 rowspan=5 ENET_MDC rowspan=5 V20 MLB_DATA rowspan=5 3.3V
-
ENET_MDC
-
ESAI_TX5_RX0
-
ENET_1588_EVENT1_IN
-
GPIO1_IO31
-
rowspan=4 199 rowspan=4 DISP0_HSYNCH rowspan=4 N25 IPU1_DI0_PIN02 rowspan=4 3.3V
-
IPU2_DI0_PIN02
-
AUD6_TXD
-
GPIO4_IO18
-
rowspan=3 200 rowspan=3 ENET_TXD0 rowspan=3 U20 ENET_TX_DATA0 rowspan=3 3.3V
-
ESAI_TX4_RX1
-
GPIO1_IO30
}

= 应用领域(Application area) =

通讯(Communication)

MY-I.MX6核心模块的作用包括在读取不同的传感器来监视系统的运行状况，以及在不间断电源的条件下，通过GSM发送数据到服务器。结构紧凑、经济高效、高度可靠的MY-I.MX6核心模块功耗仅为0.35瓦。它提供了多种接口，如以太网、SPI、通用异步收发器（UART）、多个GPIO和SD卡接口，并提供了丰富的开发工具，包括CAN以及SPI库
The role of the MY-I.MX6 core module includes reading different sensors to monitor the operation of the system and sending data to the server via GSM under uninterruptible power supply. The cost-effective, highly reliable MY-I.MX6 core module consumes only 0.35 watts of power. It provides multiple interfaces, such as Ethernet, SPI, Universal Asynchronous Transceiver (UART). Multiple GPIO and SD card interfaces, and a wealth of development tools, including CAN and the SPI library.

机器人与工业自动化(Robot and Industrial automation)

具备硬实时功能的Linux系统结合工业接口，如CAN和RS485，使MY-I.MX6模块是机器人和工业自动化应用的理想解决方案。在Linux上可以更快、更灵活地实现自动化的解决方案，或是利用众多可利用的GPIO，通过摄像头接口连接您的视觉系统，或通过以太网云安全地备份过程中的数据。无论您的应用是什么，我们很高兴在您选择合适的MY-I.MX6计算机模块时提供产品咨询服务
Linux systems with hard real-time functions are integrated with industrial interfaces such as CAN and RS485. MY-I.MX6 module is an ideal solution for robot and industrial automation applications. It can be implemented more quickly and flexibly on Linux. Or using a variety of available GPIOs, connect to your visual system via a camera interface, or safely back up the data in the process through the Ethernet cloud. Whatever your application is, We are pleased to provide product consulting services when you select the appropriate MY-I.MX6 computer module.

物流与运输(Logistics transportation)

每天无数的人乘坐公交车、地铁、火车、电车或出租车，通行在北京、上海、广州等这样的国际都市，这些都可以靠MY-I.MX6功能完善的核心模块得以实现。在救护车、警察、卡车甚至包括废物处理系统的仪表板以及可移动车队管理系统中均可以采用我们的计算机模块。
Every day countless people take bus , subway , train , tramway or taxi , which can be implemented in such international cities as Beijing , Shanghai , Guangzhou , etc . These can be realized by the core module of MY - I . MX6 . In ambulances , police , trucks and even the instrument panel of the waste disposal system and the mobile fleet management system , also can use our computer module .

数字标牌与娱乐(Digital signage & entertainment)

无论是机场、火车站还是商场和城市中心 - 数字标牌（Digital Signage）显示的信息有可以根据时间的变化和不同的个人需求来显示不同的内容。一些数字标牌可以通过触摸屏或其他输入设备和访问者互动， 鉴于其它系统可能需要进行同步的更新，并在很宽的范围内的多个屏幕上同时显示。未来对显示图形的数字标牌将有极大地需求，或者您只想显示文本信息，并且要求系统尽可能低功耗。我们的MY-I.MX6核心模块成本和最佳的电力消耗，提供令人惊讶的多屏视频和图形处理能力以及广泛的连接性能，包括快速以太网。请联系我们来找到最适合您的需求计算机模块
Whether it's the airport. Railway station or shopping mall and city center-. Digital signs display information that can display different content depending on time and individual needs. Some digital signs can interact with visitors via touch screens or other input devices. Given that other systems may need to update synchronously and display simultaneously on a wide range of screens, there will be great demand for digital signs to display graphics in the future, or you just want to display text information. Our MY-I.MX6 core module cost and optimal power consumption provide amazing multi-screen video and graphics processing capabilities as well as a wide range of connectivity capabilities. Including fast ethernet. Please contact us to find the most suitable computer module for your needs < br >

医疗与健康护理(Medical & Health care)

从医院监测病人到家庭医疗护理，医疗器械领域中广泛使用了嵌入式计算机。你希望通过屏幕上易于理解的图形来获取复杂的结果吗？或者，你需要从各种各样的传感器来计算获取的数据。无论哪种方式，MY-I.MX6核心模块都是根据最高可靠性原则来设计和制造的。我们的许多行业领先的客户已经成功地获得了3C和CE等产品认证。 我们怎样才能为您找到合适的产品实现您心目中的产品？
From hospital monitoring to home care, embedded computers are widely used in the field of medical devices. Do you want to get complex results from graphics that are easy to understand on the screen? Or, you need to compute the data from a variety of sensors. Either way, the MY-I.MX6 core module is designed and manufactured according to the principle of maximum reliability. Many of our industry-leading customers have successfully obtained 3C and CE products certification. How can we find the right product for you to achieve your mind product?

环境监测(Environmental monitoring)

尽管MY-I.MX6核心模块计算能力很强大，但是只有很低的能耗，可以无风扇应用。他们是手持设备、低维护远程系统或智能传感器的完美解决方案。各种不同的传感器输入通道，再加上方便地连接到共同的网络和低功耗的优势，使明远智睿系列模块的成为室外环境监测的应用的不二之选， 如海啸预警系统。该模块为很多接口，如I2C，SPI，RS232等提供方便的连接。
Although the MY-I.MX6 core module is powerful in computing, it has very low energy consumption and no fan applications. They are perfect solution for handheld devices, low maintenance remote systems or smart sensors. Various sensor input channels, coupled with the advantages of easy connectivity to common networks and low power consumption. Make MYZR series module as the best choice for outdoor environmental monitoring applications, such as tsunami warning system. This module is for many interfaces, such as I2CU SPI. RS232 and others provide convenient connections. < br >

能源与电力(Energy & Power)

电厂：无论他们上运行的是可再生能源、核能还是化石燃料均需要可靠的过程监测、控制和仪器仪表显示。计算机模块已成功地应用于这个领域，并获得许多客户的认证。应用包括：数据记录仪、智能电表、管理系统、智能传感器、远程监控和通信接口。我们的计算机模块在每年连续365天和极端环境条件下运行可靠，请与我们联系，根据您的特殊需求，为您提供解决方案
The power plant: whether they run on renewable energy, nuclear or fossil fuels require reliable process monitoring, control and instrumentation. Core modules have been successfully applied in this field, and receive many certifications from our customers . Applications include: data recorder, smart meter, management system, intelligent sensor, remote monitoring and communication interface. Our core module has reliable operation in each of the last 365 days and extreme environmental condition. Please contact us and we can provide solutions for you according to your special requirements.

零售票务(Retail & Ticketing)

电子秤、条码阅读器、库存管理系统和收银机 、计算机模块产品还可用于阵列的零售设备
Electronic scale, bar code reader, inventory management system and cash register, core modules can also be used in the array of retail equipment

大量门票在停车场、收费道路等场合进行分配和使用。不只是把票交给你，还需要在回收的同时收取适当的费用，在餐厅常用的热水器和咖啡机，餐饮设备可以协助客人获得他们所需
A large number of tickets are allocated and used in parking lots, toll roads and other places. Not only for the tickets, but also for collecting the appropriate fees at the same time of recycling, the commonly used water heaters and coffee machines in restaurants, catering facilities can help guests get their required
.

航空(Aviation)

嵌入式计算机在航空应用领域扮演了重要的角色。它们存在于各种机载传感器和仪表中，在一些商用领域，也为乘客提供机上娱乐和信息服务。MY-I.MX6核心模块轻便且紧凑，系统的关键数据被存储在非易失性闪存中，确保系统几乎不可能发生故障。高性能、加上种类繁多的输入和输出能力，可以使我们的客户使用MY-I.MX6核心模块在飞机舱内及周边实现各种各样的应用，如：机载计算机、仪器仪表、碰撞检测、自动紧急着陆系统、视频传输、雷达、座舱控制和娱乐信息系统。
Embedded computers play an important role in aviation applications. They exist in a variety of airborne sensors and instruments. In some commercial areas, it also provides on-board entertainment and information services. MY-I.MX6 core modules are portable and compact, and system critical data is stored in non-volatile flash memory. Ensures that the system is almost impossible to fail. High performance, coupled with a wide variety of input and output capabilities. Our customers can use the MY-I.MX6 core module to achieve a variety of applications in and around the aircraft cabin, such as: airborne computers, instrumentation, collision detection, automatic emergency landing system. Video transmission, radar, cockpit control and entertainment information systems-< br >

实验室仪器(Laboratory equipment)

从众多的质谱仪到电子秤，MY-I.MX6核心模块可以被广泛用在各自不同领域市场领导者的科学实验室仪器产品中。根据你对正在设计的设备所需要的功能、处理能力、接口，或内存量可能是您选择的模块化产品的重要特征。你是否需要输出到某种特定类型的显示器，或者产品从不同类型的传感器接收数据？对于其中的每个模块，你需要选择不同的功能。您可能需要一个触摸屏接口、摄像头接口、、USB主机和客户端，多个SD卡接口，内部固态存储器等。请联系我们，我们会告诉你哪些模块最符合您的要求。
From mass spectrometers to electronic scales. MY-I.MX6 core modules can be widely used in scientific laboratory instrumentation products of market leaders in their respective fields. Depending on the functionality, processing power, and interfaces you need for the device you are designing. Or the amount of memory may be an important feature of the modular product you choose. Do you need to output to a particular type of display or do the product receive data from different types of sensors? For each of these modules, you need to select a different feature. You may need a touch screen interface, a camera interface for USB hosts and clients, and multiple SD card interfaces. Internal solid state storage, etc. Please contact us, we will tell you which modules best meet your requirements. < br >

访问控制与安全系统(Access & Security Control)

每天数以百万计的人通过安全系统和门禁装置。这些产品所具备的微型尺寸、低功耗和连接许多不同的视频输入系统的特点，使其成为此类设备的理想平台，如视频监控系统、指纹和虹膜扫描仪等生物识别设备，用于停车场或者出入闸机控制设备。MY-I.MX6核心模块带有图像传感器接口、无线连接解决方案和连接众多外围设备的接口。高性能、低功耗和处理器无风扇设计、无需严格温度控制的极端工作温度，可以使其成为银行和商业活动组织者、海关、警察和军用警戒领域可靠的解决方案。
Millions of people a day use security systems and access control devices. These products feature miniature sizes, low power consumption and connections to many different video input systems, making them an ideal platform for such devices. Biometric devices, such as video surveillance systems, fingerprints and iris scanners, are used in parking lots or in and out of gate control equipment. MY-I.MX6 core modules have image sensor interfaces. Wireless connection solution and interface to many peripherals. High performance, low power consumption and processor without fan design, no strict temperature control extreme operating temperature. It can be a reliable solution in the areas of banking and commercial activity organizers, customs, police and military alert. < br >

航海(Voyage)

苛刻的抗震动性能和可运行于工业温度范围，一直是舰船设备用来选择计算机模块的先觉条件。 我们的模块产品被客户集成到声纳系统、船队管理、通信单元和船舶柴油控制器，MY-I.MX6核心模块同样可以满足海洋认证机构最严格的要求
Harsh anti vibration and can operate in industrial temperature range, has been the ship equipment used to select computer module prerequisites for our products by customers. The module is integrated into the sonar system, fleet management, communication unit and marine diesel engine controller. MY-I.MX6 core module also can meet the most stringent requirements of marine certification agency.

楼宇自动化控制(Building automation control)

越来越多地楼宇自动化控制应用提供了舒适性、节能和安全性。移动远程控制设备将这些状态信息通过计算机实现可视化显示。用户只需预先设定控制条件和规则。MY-I.MX6核心模块具有丰富的图形和视频流接口的处理能力，提供许多接口，如I2C、USB、以太网、ADC、SPI。同时由于其功耗很低，使得它成为楼宇自动化领域、PoE供电的控制面板和其它应用程序的理想选择
More and more building automation control applications provide comfort, energy saving and security. Mobile remote control devices to visualize these state information by computer. Users only need to set control conditions and rules in advance. MY-I.MX6 core module has rich graphics and the processing power of the video stream interface. It provides many interfaces, such as I2C, USB, Ethernet, ADC, SPI. And because of its low power consumption, it becomes ideal selection for the field of building automation, PoE powered Control panels and other applications < br >

汽车娱乐(Automotive & entertainment)

MY-I.MX6核心模块可在汽车领域的广泛应用，如车队管理、汽车拉力赛汽车发动机诊断、信息娱乐系统和乘客信息管理，得益于符合工业温度范围、具备防振硬件设计。惊人的视频和3D图形处理能力、极高的视频输出分辨率、CAN接口，全方位实现计算机模块对各个应用领域的吸引力。无论你正在生产的产品是高档私家车，还是需要跟踪管理商业车队，明远智睿生产的MY-I.MX6核心模块均有大量的应用实例。通过这些实例，可以帮助你找到合适的计算机模块产品来满足预期用途。
MY-I.MX6 core modules can be widely used in the automotive field, such as fleet management, automotive rally car engine diagnosis, information entertainment system and passenger information management, thanks to industrial temperature range. With anti-vibration hardware design, amazing video and 3D graphics processing capabilities, extremely high video output resolution, CAN interface. Achieve the full range of computer modules that appeal to all applications, whether you are producing high-end private cars or having to track and manage commercial fleets. The MY-I.MX6 core modules produced by MYZR have a large number of application examples. Through these examples, you can find the right computer module products to meet the intended use. < br >

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